Tidy up x86 assembler and fix byte register encoding.
Also fix reg storage int size issues.
Also fix bad use of byte registers in GenInlinedCas.
Change-Id: Id47424f36f9000e051110553e0b51816910e2fe8
diff --git a/compiler/dex/quick/x86/x86_lir.h b/compiler/dex/quick/x86/x86_lir.h
index e550488..9b88853 100644
--- a/compiler/dex/quick/x86/x86_lir.h
+++ b/compiler/dex/quick/x86/x86_lir.h
@@ -620,7 +620,7 @@
Binary0fOpCode(kX86Imul64), // 64bit multiply
kX86CmpxchgRR, kX86CmpxchgMR, kX86CmpxchgAR, // compare and exchange
kX86LockCmpxchgMR, kX86LockCmpxchgAR, // locked compare and exchange
- kX86LockCmpxchg8bM, kX86LockCmpxchg8bA, // locked compare and exchange
+ kX86LockCmpxchg64M, kX86LockCmpxchg64A, // locked compare and exchange
kX86XchgMR, // exchange memory with register (automatically locked)
Binary0fOpCode(kX86Movzx8), // zero-extend 8-bit value
Binary0fOpCode(kX86Movzx16), // zero-extend 16-bit value
@@ -654,7 +654,6 @@
kData, // Special case for raw data.
kNop, // Special case for variable length nop.
kNullary, // Opcode that takes no arguments.
- kPrefix2Nullary, // Opcode that takes no arguments, but 2 prefixes.
kRegOpcode, // Shorter form of R instruction kind (opcode+rd)
kReg, kMem, kArray, // R, M and A instruction kinds.
kMemReg, kArrayReg, kThreadReg, // MR, AR and TR instruction kinds.
@@ -663,11 +662,11 @@
kRegImm, kMemImm, kArrayImm, kThreadImm, // RI, MI, AI and TI instruction kinds.
kRegRegImm, kRegMemImm, kRegArrayImm, // RRI, RMI and RAI instruction kinds.
kMovRegImm, // Shorter form move RI.
- kRegRegImmRev, // RRI with first reg in r/m
+ kRegRegImmStore, // RRI following the store modrm reg-reg encoding rather than the load.
kMemRegImm, // MRI instruction kinds.
kShiftRegImm, kShiftMemImm, kShiftArrayImm, // Shift opcode with immediate.
kShiftRegCl, kShiftMemCl, kShiftArrayCl, // Shift opcode with register CL.
- kRegRegReg, kRegRegMem, kRegRegArray, // RRR, RRM, RRA instruction kinds.
+ // kRegRegReg, kRegRegMem, kRegRegArray, // RRR, RRM, RRA instruction kinds.
kRegCond, kMemCond, kArrayCond, // R, M, A instruction kinds following by a condition.
kRegRegCond, // RR instruction kind followed by a condition.
kRegMemCond, // RM instruction kind followed by a condition.
@@ -680,19 +679,25 @@
/* Struct used to define the EncodingMap positions for each X86 opcode */
struct X86EncodingMap {
X86OpCode opcode; // e.g. kOpAddRI
- X86EncodingKind kind; // Used to discriminate in the union below
+ // The broad category the instruction conforms to, such as kRegReg. Identifies which LIR operands
+ // hold meaning for the opcode.
+ X86EncodingKind kind;
uint64_t flags;
struct {
- uint8_t prefix1; // non-zero => a prefix byte
- uint8_t prefix2; // non-zero => a second prefix byte
- uint8_t opcode; // 1 byte opcode
- uint8_t extra_opcode1; // possible extra opcode byte
- uint8_t extra_opcode2; // possible second extra opcode byte
- // 3bit opcode that gets encoded in the register bits of the modrm byte, use determined by the
- // encoding kind
+ uint8_t prefix1; // Non-zero => a prefix byte.
+ uint8_t prefix2; // Non-zero => a second prefix byte.
+ uint8_t opcode; // 1 byte opcode.
+ uint8_t extra_opcode1; // Possible extra opcode byte.
+ uint8_t extra_opcode2; // Possible second extra opcode byte.
+ // 3-bit opcode that gets encoded in the register bits of the modrm byte, use determined by the
+ // encoding kind.
uint8_t modrm_opcode;
- uint8_t ax_opcode; // non-zero => shorter encoding for AX as a destination
- uint8_t immediate_bytes; // number of bytes of immediate
+ uint8_t ax_opcode; // Non-zero => shorter encoding for AX as a destination.
+ uint8_t immediate_bytes; // Number of bytes of immediate.
+ // Does the instruction address a byte register? In 32-bit mode the registers ah, bh, ch and dh
+ // are not used. In 64-bit mode the REX prefix is used to normalize and allow any byte register
+ // to be addressed.
+ bool r8_form;
} skeleton;
const char *name;
const char* fmt;
@@ -726,6 +731,7 @@
#define IS_SIMM8(v) ((-128 <= (v)) && ((v) <= 127))
#define IS_SIMM16(v) ((-32768 <= (v)) && ((v) <= 32767))
+#define IS_SIMM32(v) ((INT64_C(-2147483648) <= (v)) && ((v) <= INT64_C(2147483647)))
extern X86EncodingMap EncodingMap[kX86Last];
extern X86ConditionCode X86ConditionEncoding(ConditionCode cond);