Implement CFI for Quick.
CFI is necessary for stack unwinding in gdb, lldb, and libunwind.
Change-Id: Ic3b84c9dc91c4bae80e27cda02190f3274e95ae8
diff --git a/compiler/dex/quick/x86/call_x86.cc b/compiler/dex/quick/x86/call_x86.cc
index 18fae17..7f42536 100644
--- a/compiler/dex/quick/x86/call_x86.cc
+++ b/compiler/dex/quick/x86/call_x86.cc
@@ -150,6 +150,10 @@
FreeTemp(reg_card_no);
}
+static dwarf::Reg DwarfCoreReg(bool is_x86_64, int num) {
+ return is_x86_64 ? dwarf::Reg::X86_64Core(num) : dwarf::Reg::X86Core(num);
+}
+
void X86Mir2Lir::GenEntrySequence(RegLocation* ArgLocs, RegLocation rl_method) {
/*
* On entry, rX86_ARG0, rX86_ARG1, rX86_ARG2 are live. Let the register
@@ -184,7 +188,9 @@
}
/* Build frame, return address already on stack */
+ cfi_.SetCurrentCFAOffset(GetInstructionSetPointerSize(cu_->instruction_set));
OpRegImm(kOpSub, rs_rSP, frame_size_ - GetInstructionSetPointerSize(cu_->instruction_set));
+ cfi_.DefCFAOffset(frame_size_);
/* Spill core callee saves */
SpillCoreRegs();
@@ -201,10 +207,12 @@
GenerateTargetLabel(kPseudoThrowTarget);
const RegStorage local_rs_rSP = cu_->target64 ? rs_rX86_SP_64 : rs_rX86_SP_32;
m2l_->OpRegImm(kOpAdd, local_rs_rSP, sp_displace_);
+ m2l_->cfi().AdjustCFAOffset(-sp_displace_);
m2l_->ClobberCallerSave();
// Assumes codegen and target are in thumb2 mode.
m2l_->CallHelper(RegStorage::InvalidReg(), kQuickThrowStackOverflow,
false /* MarkSafepointPC */, false /* UseLink */);
+ m2l_->cfi().AdjustCFAOffset(sp_displace_);
}
private:
@@ -251,6 +259,7 @@
}
void X86Mir2Lir::GenExitSequence() {
+ cfi_.RememberState();
/*
* In the exit path, rX86_RET0/rX86_RET1 are live - make sure they aren't
* allocated by the register utilities as temps.
@@ -264,7 +273,12 @@
const RegStorage rs_rSP = cu_->target64 ? rs_rX86_SP_64 : rs_rX86_SP_32;
int adjust = frame_size_ - GetInstructionSetPointerSize(cu_->instruction_set);
OpRegImm(kOpAdd, rs_rSP, adjust);
+ cfi_.AdjustCFAOffset(-adjust);
+ // There is only the return PC on the stack now.
NewLIR0(kX86Ret);
+ // The CFI should be restored for any code that follows the exit block.
+ cfi_.RestoreState();
+ cfi_.DefCFAOffset(frame_size_);
}
void X86Mir2Lir::GenSpecialExitSequence() {
@@ -275,6 +289,8 @@
// Keep 16-byte stack alignment, there's already the return address, so
// - for 32-bit push EAX, i.e. ArtMethod*, ESI, EDI,
// - for 64-bit push RAX, i.e. ArtMethod*.
+ const int kRegSize = cu_->target64 ? 8 : 4;
+ cfi_.SetCurrentCFAOffset(kRegSize); // Return address.
if (!cu_->target64) {
DCHECK(!IsTemp(rs_rSI));
DCHECK(!IsTemp(rs_rDI));
@@ -292,17 +308,29 @@
fp_vmap_table_.clear();
if (!cu_->target64) {
NewLIR1(kX86Push32R, rs_rDI.GetReg());
+ cfi_.AdjustCFAOffset(kRegSize);
+ cfi_.RelOffset(DwarfCoreReg(cu_->target64, rs_rDI.GetRegNum()), 0);
NewLIR1(kX86Push32R, rs_rSI.GetReg());
+ cfi_.AdjustCFAOffset(kRegSize);
+ cfi_.RelOffset(DwarfCoreReg(cu_->target64, rs_rSI.GetRegNum()), 0);
}
NewLIR1(kX86Push32R, TargetReg(kArg0, kRef).GetReg()); // ArtMethod*
+ cfi_.AdjustCFAOffset(kRegSize);
+ // Do not generate CFI for scratch register.
}
void X86Mir2Lir::GenSpecialExitForSuspend() {
+ const int kRegSize = cu_->target64 ? 8 : 4;
// Pop the frame. (ArtMethod* no longer needed but restore it anyway.)
NewLIR1(kX86Pop32R, TargetReg(kArg0, kRef).GetReg()); // ArtMethod*
+ cfi_.AdjustCFAOffset(-kRegSize);
if (!cu_->target64) {
NewLIR1(kX86Pop32R, rs_rSI.GetReg());
+ cfi_.AdjustCFAOffset(-kRegSize);
+ cfi_.Restore(DwarfCoreReg(cu_->target64, rs_rSI.GetRegNum()));
NewLIR1(kX86Pop32R, rs_rDI.GetReg());
+ cfi_.AdjustCFAOffset(-kRegSize);
+ cfi_.Restore(DwarfCoreReg(cu_->target64, rs_rDI.GetRegNum()));
}
}