Revert "ART: Allow PackedSwitch instructions with zero targets"
This fixed Optimizing but revealed the same issue in the interpreter.
This reverts commit 241f9c41924e33e0c3bab9a7c4306397458749ca.
Change-Id: Iad5a28b24f2c21d3575cf8ecc8b7c8fbf98d1132
diff --git a/compiler/optimizing/builder.cc b/compiler/optimizing/builder.cc
index cdd7636..1f9287c 100644
--- a/compiler/optimizing/builder.cc
+++ b/compiler/optimizing/builder.cc
@@ -1210,20 +1210,14 @@
}
void HGraphBuilder::BuildPackedSwitch(const Instruction& instruction, uint32_t dex_pc) {
- // Verifier guarantees that the payload for PackedSwitch contains:
- // (a) number of entries (may be zero)
- // (b) first and lowest switch case value (entry 0, always present)
- // (c) list of target pcs (entries 1 <= i <= N)
SwitchTable table(instruction, dex_pc, false);
// Value to test against.
HInstruction* value = LoadLocal(instruction.VRegA(), Primitive::kPrimInt);
- // Retrieve number of entries.
uint16_t num_entries = table.GetNumEntries();
- if (num_entries == 0) {
- return;
- }
+ // There should be at least one entry here.
+ DCHECK_GT(num_entries, 0U);
// Chained cmp-and-branch, starting from starting_key.
int32_t starting_key = table.GetEntryAt(0);
@@ -1235,10 +1229,6 @@
}
void HGraphBuilder::BuildSparseSwitch(const Instruction& instruction, uint32_t dex_pc) {
- // Verifier guarantees that the payload for SparseSwitch contains:
- // (a) number of entries (may be zero)
- // (b) sorted key values (entries 0 <= i < N)
- // (c) target pcs corresponding to the switch values (entries N <= i < 2*N)
SwitchTable table(instruction, dex_pc, true);
// Value to test against.