commit 1b8464d17c2266763714ae18be7c4dc26e28bf61
author Alexey Frunze <Alexey.Frunze@imgtec.com> Sat Nov 12 17:22:05 2016 -0800
committer Alexey Frunze <Alexey.Frunze@imgtec.com> Tue Dec 06 13:57:04 2016 -0800
tree 19ab81b439fc216e289cb14be8a7618dbafb4f50
parent d7a7c7f3e93de9fa915e66d54dfc799efcc12ffb

MIPS32: Pass more arguments in registers.

Specifically, use A0-A3,T0-T1 for non-floats and F8-F19 for floats.

Test: booted MIPS32R2 in QEMU
Test: test-art-target-run-test-optimizing (MIPS32R2) on CI20
Test: test-art-target-gtest (MIPS32R2) on CI20
Test: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU
Test: test-art-target-run-test-optimizing (MIPS32R6) in QEMU
Test: test-art-target-gtest (MIPS32R6) in QEMU
Test: test-art-host-gtest

Change-Id: Ib8b0310a109d9f3d70119c1e605e54b013e60728

runtime/arch/stub_test.cc

diff --git a/runtime/arch/stub_test.cc b/runtime/arch/stub_test.cc
index 6665897..9e385f8 100644
--- a/runtime/arch/stub_test.cc
+++ b/runtime/arch/stub_test.cc
@@ -355,7 +355,7 @@
         "lw $a2, 8($sp)\n\t"
         "lw $t9, 12($sp)\n\t"
         "lw $s1, 16($sp)\n\t"
-        "lw $t0, 20($sp)\n\t"
+        "lw $t7, 20($sp)\n\t"
         "addiu $sp, $sp, 24\n\t"
 
         "jalr $t9\n\t"             // Call the stub.