Continuing Quick compiler refactoring
With this CL, we no longer include any .cc files - all source
files compile stand-alone. We still build a separate .so for
each target, but all code in the target-independent "codegen"
directory is now truly independent and doesn't rely on any
target-specific macros to compile.
Header file inclusion is still a bit of a mess, but that will be
addressed in a subsequent CL.
Next up: create a codegen class to hold code generator routines
overrideable by target.
Change-Id: I3a93118d11afeab11f310950a6a73381a99e26e1
diff --git a/src/compiler/codegen/x86/backend_x86.cc b/src/compiler/codegen/x86/backend_x86.cc
deleted file mode 100644
index 13388ff..0000000
--- a/src/compiler/codegen/x86/backend_x86.cc
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * Copyright (C) 2012 The Android Open Source Project
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#define _CODEGEN_C
-
-#include "x86_lir.h"
-#include "../ralloc_util.h"
-
-/* Common codegen utility code */
-#include "../codegen_util.cc"
-
-#include "utility_x86.cc"
-#include "../gen_loadstore.cc"
-#include "../gen_common.cc"
-#include "../gen_invoke.cc"
-#include "call_x86.cc"
-#include "fp_x86.cc"
-#include "int_x86.cc"
-
-/* Bitcode conversion */
-#include "../method_bitcode.cc"
-
-/* MIR2LIR dispatcher and architectural independent codegen routines */
-#include "../method_codegen_driver.cc"
-
-/* Target-independent local optimizations */
-#include "../local_optimizations.cc"
diff --git a/src/compiler/codegen/x86/call_x86.cc b/src/compiler/codegen/x86/call_x86.cc
index c2b456f..51dda66 100644
--- a/src/compiler/codegen/x86/call_x86.cc
+++ b/src/compiler/codegen/x86/call_x86.cc
@@ -16,6 +16,10 @@
/* This file contains codegen for the X86 ISA */
+#include "x86_lir.h"
+#include "../codegen_util.h"
+#include "../ralloc_util.h"
+
namespace art {
void genSpecialCase(CompilationUnit* cUnit, BasicBlock* bb, MIR* mir,
diff --git a/src/compiler/codegen/x86/fp_x86.cc b/src/compiler/codegen/x86/fp_x86.cc
index 37e9168..92190cc 100644
--- a/src/compiler/codegen/x86/fp_x86.cc
+++ b/src/compiler/codegen/x86/fp_x86.cc
@@ -14,6 +14,10 @@
* limitations under the License.
*/
+#include "x86_lir.h"
+#include "../codegen_util.h"
+#include "../ralloc_util.h"
+
namespace art {
bool genArithOpFloat(CompilationUnit *cUnit, Instruction::Code opcode,
diff --git a/src/compiler/codegen/x86/int_x86.cc b/src/compiler/codegen/x86/int_x86.cc
index bcb51c4..adde482 100644
--- a/src/compiler/codegen/x86/int_x86.cc
+++ b/src/compiler/codegen/x86/int_x86.cc
@@ -16,6 +16,10 @@
/* This file contains codegen for the X86 ISA */
+#include "x86_lir.h"
+#include "../codegen_util.h"
+#include "../ralloc_util.h"
+
namespace art {
/*
diff --git a/src/compiler/codegen/x86/target_x86.cc b/src/compiler/codegen/x86/target_x86.cc
index b6440a7..7c2adf1 100644
--- a/src/compiler/codegen/x86/target_x86.cc
+++ b/src/compiler/codegen/x86/target_x86.cc
@@ -451,7 +451,7 @@
return true;
}
-void oatGenMemBarrier(CompilationUnit *cUnit, int /* barrierKind */)
+void oatGenMemBarrier(CompilationUnit *cUnit, MemBarrierKind barrierKind)
{
#if ANDROID_SMP != 0
// TODO: optimize fences
@@ -605,4 +605,19 @@
return INVALID_REG;
}
+uint64_t getTargetInstFlags(int opcode)
+{
+ return EncodingMap[opcode].flags;
+}
+
+const char* getTargetInstName(int opcode)
+{
+ return EncodingMap[opcode].name;
+}
+
+const char* getTargetInstFmt(int opcode)
+{
+ return EncodingMap[opcode].fmt;
+}
+
} // namespace art
diff --git a/src/compiler/codegen/x86/utility_x86.cc b/src/compiler/codegen/x86/utility_x86.cc
index 418a6fe..9d24dda 100644
--- a/src/compiler/codegen/x86/utility_x86.cc
+++ b/src/compiler/codegen/x86/utility_x86.cc
@@ -14,6 +14,10 @@
* limitations under the License.
*/
+#include "x86_lir.h"
+#include "../codegen_util.h"
+#include "../ralloc_util.h"
+
namespace art {
/* This file contains codegen for the X86 ISA */
diff --git a/src/compiler/codegen/x86/x86_lir.h b/src/compiler/codegen/x86/x86_lir.h
index 9f29d08..53d69ad 100644
--- a/src/compiler/codegen/x86/x86_lir.h
+++ b/src/compiler/codegen/x86/x86_lir.h
@@ -220,8 +220,6 @@
#define rX86_COUNT rCX
#define rX86_PC INVALID_REG
-#define isPseudoOpcode(opCode) (static_cast<int>(opCode) < 0)
-
/*
* The following enum defines the list of supported X86 instructions by the
* assembler. Their corresponding EncodingMap positions will be defined in