diff --git a/src/compiler/codegen/arm/assemble_arm.cc b/src/compiler/codegen/arm/assemble_arm.cc
index f89915b..8cb0b97 100644
--- a/src/compiler/codegen/arm/assemble_arm.cc
+++ b/src/compiler/codegen/arm/assemble_arm.cc
@@ -993,7 +993,7 @@
   LIR* lir;
   AssemblerStatus res = kSuccess;  // Assume success
 
-  for (lir = cu->first_lir_insn; lir; lir = NEXT_LIR(lir)) {
+  for (lir = cu->first_lir_insn; lir != NULL; lir = NEXT_LIR(lir)) {
 
     if (lir->opcode < 0) {
       /* 1 means padding is needed */
@@ -1374,7 +1374,7 @@
   LIR* arm_lir;
   int offset = 0;
 
-  for (arm_lir = cu->first_lir_insn; arm_lir; arm_lir = NEXT_LIR(arm_lir)) {
+  for (arm_lir = cu->first_lir_insn; arm_lir != NULL; arm_lir = NEXT_LIR(arm_lir)) {
     arm_lir->offset = offset;
     if (arm_lir->opcode >= 0) {
       if (!arm_lir->flags.is_nop) {
diff --git a/src/compiler/codegen/codegen_util.cc b/src/compiler/codegen/codegen_util.cc
index 9373291..9af5578 100644
--- a/src/compiler/codegen/codegen_util.cc
+++ b/src/compiler/codegen/codegen_util.cc
@@ -312,10 +312,10 @@
   LOG(INFO) << "expansion factor: "
             << static_cast<float>(cu->total_size) / static_cast<float>(insns_size * 2);
   DumpPromotionMap(cu);
-  for (lir_insn = cu->first_lir_insn; lir_insn; lir_insn = lir_insn->next) {
+  for (lir_insn = cu->first_lir_insn; lir_insn != NULL; lir_insn = lir_insn->next) {
     DumpLIRInsn(cu, lir_insn, 0);
   }
-  for (lir_insn = cu->literal_list; lir_insn; lir_insn = lir_insn->next) {
+  for (lir_insn = cu->literal_list; lir_insn != NULL; lir_insn = lir_insn->next) {
     LOG(INFO) << StringPrintf("%x (%04x): .word (%#x)", lir_insn->offset, lir_insn->offset,
                               lir_insn->operands[0]);
   }
diff --git a/src/compiler/codegen/local_optimizations.cc b/src/compiler/codegen/local_optimizations.cc
index d1a7444..cf04b21 100644
--- a/src/compiler/codegen/local_optimizations.cc
+++ b/src/compiler/codegen/local_optimizations.cc
@@ -78,9 +78,7 @@
 
   if (head_lir == tail_lir) return;
 
-  for (this_lir = PREV_LIR(tail_lir);
-      this_lir != head_lir;
-      this_lir = PREV_LIR(this_lir)) {
+  for (this_lir = PREV_LIR(tail_lir); this_lir != head_lir; this_lir = PREV_LIR(this_lir)) {
     int sink_distance = 0;
 
     /* Skip non-interesting instructions */
@@ -124,9 +122,7 @@
         stop_use_reg_mask = (GetPCUseDefEncoding() | this_lir->use_mask) & ~ENCODE_MEM;
     }
 
-    for (check_lir = NEXT_LIR(this_lir);
-        check_lir != tail_lir;
-        check_lir = NEXT_LIR(check_lir)) {
+    for (check_lir = NEXT_LIR(this_lir); check_lir != tail_lir; check_lir = NEXT_LIR(check_lir)) {
 
       /*
        * Skip already dead instructions (whose dataflow information is
@@ -275,9 +271,7 @@
   if (head_lir == tail_lir) return;
 
   /* Start from the second instruction */
-  for (this_lir = NEXT_LIR(head_lir);
-     this_lir != tail_lir;
-     this_lir = NEXT_LIR(this_lir)) {
+  for (this_lir = NEXT_LIR(head_lir); this_lir != tail_lir; this_lir = NEXT_LIR(this_lir)) {
 
     /* Skip non-interesting instructions */
     if ((this_lir->flags.is_nop == true) ||
@@ -308,9 +302,7 @@
     bool stop_here = false;
 
     /* Try to hoist the load to a good spot */
-    for (check_lir = PREV_LIR(this_lir);
-        check_lir != head_lir;
-        check_lir = PREV_LIR(check_lir)) {
+    for (check_lir = PREV_LIR(this_lir); check_lir != head_lir; check_lir = PREV_LIR(check_lir)) {
 
       /*
        * Skip already dead instructions (whose dataflow information is
diff --git a/src/compiler/codegen/method_bitcode.cc b/src/compiler/codegen/method_bitcode.cc
index cedf3b7..7a9446f 100644
--- a/src/compiler/codegen/method_bitcode.cc
+++ b/src/compiler/codegen/method_bitcode.cc
@@ -1856,7 +1856,7 @@
     return false;
   }
 
-  for (MIR* mir = bb->first_mir_insn; mir; mir = mir->next) {
+  for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
 
     SetDexOffset(cu, mir->offset);
 
@@ -3385,8 +3385,7 @@
     static_cast<LIR*>(NewMem(cu, sizeof(LIR) * num_basic_blocks, true, kAllocLIR));
   LIR* label_list = cu->block_label_list;
   int next_label = 0;
-  for (llvm::Function::iterator i = func->begin(),
-       e = func->end(); i != e; ++i) {
+  for (llvm::Function::iterator i = func->begin(), e = func->end(); i != e; ++i) {
     cu->block_to_label_map.Put(static_cast<llvm::BasicBlock*>(i),
                                &label_list[next_label++]);
   }
@@ -3397,8 +3396,7 @@
    */
   cu->loc_map.clear();  // Start fresh
   cu->reg_location = NULL;
-  for (int i = 0; i < cu->num_dalvik_registers + cu->num_compiler_temps + 1;
-       i++) {
+  for (int i = 0; i < cu->num_dalvik_registers + cu->num_compiler_temps + 1; i++) {
     cu->promotion_map[i].core_location = kLocDalvikFrame;
     cu->promotion_map[i].fp_location = kLocDalvikFrame;
   }
@@ -3416,8 +3414,7 @@
    * be the first instruction we encounter, so we won't have to iterate
    * through everything.
    */
-  for (llvm::inst_iterator i = llvm::inst_begin(func),
-       e = llvm::inst_end(func); i != e; ++i) {
+  for (llvm::inst_iterator i = llvm::inst_begin(func), e = llvm::inst_end(func); i != e; ++i) {
     llvm::CallInst* call_inst = llvm::dyn_cast<llvm::CallInst>(&*i);
     if (call_inst != NULL) {
       llvm::Function* callee = call_inst->getCalledFunction();
@@ -3489,8 +3486,7 @@
     CreateLocFromValue(cu, val);
   }
   // Create RegLocations for all non-argument defintions
-  for (llvm::inst_iterator i = llvm::inst_begin(func),
-       e = llvm::inst_end(func); i != e; ++i) {
+  for (llvm::inst_iterator i = llvm::inst_begin(func), e = llvm::inst_end(func); i != e; ++i) {
     llvm::Value* val = &*i;
     if (val->hasName() && (val->getName().str().c_str()[0] == 'v')) {
       CreateLocFromValue(cu, val);
@@ -3498,8 +3494,7 @@
   }
 
   // Walk the blocks, generating code.
-  for (llvm::Function::iterator i = cu->func->begin(),
-       e = cu->func->end(); i != e; ++i) {
+  for (llvm::Function::iterator i = cu->func->begin(), e = cu->func->end(); i != e; ++i) {
     BitcodeBlockCodeGen(cu, static_cast<llvm::BasicBlock*>(i));
   }
 
diff --git a/src/compiler/codegen/method_codegen_driver.cc b/src/compiler/codegen/method_codegen_driver.cc
index 9f7f692..fe5d522 100644
--- a/src/compiler/codegen/method_codegen_driver.cc
+++ b/src/compiler/codegen/method_codegen_driver.cc
@@ -729,7 +729,7 @@
     GenExitSequence(cu);
   }
 
-  for (mir = bb->first_mir_insn; mir; mir = mir->next) {
+  for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
     ResetRegPool(cu);
     if (cu->disable_opt & (1 << kTrackLiveTemps)) {
       ClobberAllRegs(cu);
diff --git a/src/compiler/codegen/mips/assemble_mips.cc b/src/compiler/codegen/mips/assemble_mips.cc
index b80784f..933cb60 100644
--- a/src/compiler/codegen/mips/assemble_mips.cc
+++ b/src/compiler/codegen/mips/assemble_mips.cc
@@ -520,7 +520,7 @@
   LIR *lir;
   AssemblerStatus res = kSuccess;  // Assume success
 
-  for (lir = cu->first_lir_insn; lir; lir = NEXT_LIR(lir)) {
+  for (lir = cu->first_lir_insn; lir != NULL; lir = NEXT_LIR(lir)) {
     if (lir->opcode < 0) {
       continue;
     }
@@ -723,7 +723,7 @@
   LIR* mips_lir;
   int offset = 0;
 
-  for (mips_lir = cu->first_lir_insn; mips_lir; mips_lir = NEXT_LIR(mips_lir)) {
+  for (mips_lir = cu->first_lir_insn; mips_lir != NULL; mips_lir = NEXT_LIR(mips_lir)) {
     mips_lir->offset = offset;
     if (mips_lir->opcode >= 0) {
       if (!mips_lir->flags.is_nop) {
diff --git a/src/compiler/codegen/x86/assemble_x86.cc b/src/compiler/codegen/x86/assemble_x86.cc
index 78ba331..2363c20 100644
--- a/src/compiler/codegen/x86/assemble_x86.cc
+++ b/src/compiler/codegen/x86/assemble_x86.cc
@@ -1194,7 +1194,7 @@
   AssemblerStatus res = kSuccess;  // Assume success
 
   const bool kVerbosePcFixup = false;
-  for (lir = cu->first_lir_insn; lir; lir = NEXT_LIR(lir)) {
+  for (lir = cu->first_lir_insn; lir != NULL; lir = NEXT_LIR(lir)) {
     if (lir->opcode < 0) {
       continue;
     }
@@ -1420,21 +1420,21 @@
  */
 int AssignInsnOffsets(CompilationUnit* cu)
 {
-    LIR* x86LIR;
+    LIR* x86_lir;
     int offset = 0;
 
-    for (x86LIR = cu->first_lir_insn; x86LIR; x86LIR = NEXT_LIR(x86LIR)) {
-        x86LIR->offset = offset;
-        if (x86LIR->opcode >= 0) {
-            if (!x86LIR->flags.is_nop) {
-                offset += x86LIR->flags.size;
+    for (x86_lir = cu->first_lir_insn; x86_lir != NULL; x86_lir = NEXT_LIR(x86_lir)) {
+        x86_lir->offset = offset;
+        if (x86_lir->opcode >= 0) {
+            if (!x86_lir->flags.is_nop) {
+                offset += x86_lir->flags.size;
             }
-        } else if (x86LIR->opcode == kPseudoPseudoAlign4) {
+        } else if (x86_lir->opcode == kPseudoPseudoAlign4) {
             if (offset & 0x2) {
                 offset += 2;
-                x86LIR->operands[0] = 1;
+                x86_lir->operands[0] = 1;
             } else {
-                x86LIR->operands[0] = 0;
+                x86_lir->operands[0] = 0;
             }
         }
         /* Pseudo opcodes don't consume space */
diff --git a/src/compiler/codegen/x86/target_x86.cc b/src/compiler/codegen/x86/target_x86.cc
index c51e9e9..ee5c215 100644
--- a/src/compiler/codegen/x86/target_x86.cc
+++ b/src/compiler/codegen/x86/target_x86.cc
@@ -512,7 +512,7 @@
   for (int i = 0; i < cu->num_ssa_regs; i++) {
     cu->phi_alias_map[i] = i;
   }
-  for (MIR* phi = cu->phi_list; phi; phi = phi->meta.phi_next) {
+  for (MIR* phi = cu->phi_list; phi != NULL; phi = phi->meta.phi_next) {
     int def_reg = phi->ssa_rep->defs[0];
     for (int i = 0; i < phi->ssa_rep->num_uses; i++) {
       for (int j = 0; j < cu->num_ssa_regs; j++) {
diff --git a/src/compiler/dataflow.cc b/src/compiler/dataflow.cc
index 2bca167..810e6c6 100644
--- a/src/compiler/dataflow.cc
+++ b/src/compiler/dataflow.cc
@@ -1131,7 +1131,7 @@
       AllocBitVector(cu, cu->num_dalvik_registers, false,
                         kBitMapLiveIn);
 
-  for (mir = bb->first_mir_insn; mir; mir = mir->next) {
+  for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
     int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
     DecodedInstruction *d_insn = &mir->dalvikInsn;
 
@@ -1249,7 +1249,7 @@
 
   if (bb->data_flow_info == NULL) return false;
 
-  for (mir = bb->first_mir_insn; mir; mir = mir->next) {
+  for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
     mir->ssa_rep = static_cast<struct SSARepresentation *>(NewMem(cu, sizeof(SSARepresentation),
                                                                  true, kAllocDFInfo));
 
@@ -1394,7 +1394,7 @@
   MIR* mir;
   ArenaBitVector *is_constant_v = cu->is_constant_v;
 
-  for (mir = bb->first_mir_insn; mir; mir = mir->next) {
+  for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
     int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
 
     DecodedInstruction *d_insn = &mir->dalvikInsn;
@@ -1757,7 +1757,7 @@
 {
   int num_temps = 0;
 
-  for (MIR* mir = bb->first_mir_insn; mir; mir = mir->next) {
+  for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
     // Look for interesting opcodes, skip otherwise
     Instruction::Code opcode = mir->dalvikInsn.opcode;
     switch (opcode) {
@@ -1887,7 +1887,7 @@
 static bool CountChecks( struct CompilationUnit* cu, struct BasicBlock* bb)
 {
   if (bb->data_flow_info == NULL) return false;
-  for (MIR* mir = bb->first_mir_insn; mir; mir = mir->next) {
+  for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
     if (mir->ssa_rep == NULL) {
       continue;
     }
@@ -2059,7 +2059,7 @@
   }
 
   // Walk through the instruction in the block, updating as necessary
-  for (MIR* mir = bb->first_mir_insn; mir; mir = mir->next) {
+  for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
     if (mir->ssa_rep == NULL) {
         continue;
     }
@@ -2084,7 +2084,7 @@
         } else if (bb->fall_through) {
           // Look in next basic block
           struct BasicBlock* next_bb = bb->fall_through;
-          for (MIR* tmir = next_bb->first_mir_insn; tmir;
+          for (MIR* tmir = next_bb->first_mir_insn; tmir != NULL;
             tmir =tmir->next) {
             if (static_cast<int>(tmir->dalvikInsn.opcode) >= static_cast<int>(kMirOpFirst)) {
               continue;
@@ -2259,7 +2259,7 @@
   GrowableListIterator iter;
   GrowableListIteratorInit(bb->predecessors, &iter);
   BasicBlock* pred_bb;
-  for (pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter)); pred_bb;
+  for (pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter)); pred_bb != NULL;
        pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter))) {
     AddBlocksToLoop(cu, blocks, pred_bb, head_id);
   }
@@ -2277,7 +2277,7 @@
     GrowableListIterator iter;
     GrowableListIteratorInit(&loop->incoming_back_edges, &iter);
     BasicBlock* edge_bb;
-    for (edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter)); edge_bb;
+    for (edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter)); edge_bb != NULL;
          edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter))) {
       LOG(INFO) << "    Backedge block id " << edge_bb->id
                 << ", offset 0x" << std::hex << edge_bb->start_offset;
@@ -2306,14 +2306,14 @@
   GrowableListIteratorInit(&cu->loop_headers, &iter);
   // Add blocks to each header
   for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
-       loop; loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
+       loop != NULL; loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
     loop->blocks = AllocBitVector(cu, cu->num_blocks, true,
                                      kBitMapMisc);
     SetBit(cu, loop->blocks, loop->header->id);
     GrowableListIterator iter;
     GrowableListIteratorInit(&loop->incoming_back_edges, &iter);
     BasicBlock* edge_bb;
-    for (edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter)); edge_bb;
+    for (edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter)); edge_bb != NULL;
          edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter))) {
       AddBlocksToLoop(cu, loop->blocks, edge_bb, loop->header->id);
     }
@@ -2321,12 +2321,12 @@
   // Compute the nesting depth of each header
   GrowableListIteratorInit(&cu->loop_headers, &iter);
   for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
-       loop; loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
+       loop != NULL; loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
     GrowableListIterator iter2;
     GrowableListIteratorInit(&cu->loop_headers, &iter2);
     LoopInfo* loop2;
     for (loop2 = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter2));
-         loop2; loop2 = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter2))) {
+         loop2 != NULL; loop2 = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter2))) {
       if (IsBitSet(loop2->blocks, loop->header->id)) {
          loop->header->nesting_depth++;
       }
diff --git a/src/compiler/ralloc.cc b/src/compiler/ralloc.cc
index 4f4d489..c2e663e 100644
--- a/src/compiler/ralloc.cc
+++ b/src/compiler/ralloc.cc
@@ -74,7 +74,7 @@
       bb->block_type != kExitBlock)
     return false;
 
-  for (MIR* mir = bb->first_mir_insn; mir; mir = mir->next) {
+  for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
     SSARepresentation *ssa_rep = mir->ssa_rep;
     if (ssa_rep) {
       for (int i = 0; i < ssa_rep->num_uses; i++) {
@@ -102,7 +102,7 @@
   if (bb->block_type != kDalvikByteCode && bb->block_type != kEntryBlock)
     return false;
 
-  for (mir = bb->first_mir_insn; mir; mir = mir->next) {
+  for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
     SSARepresentation *ssa_rep = mir->ssa_rep;
     if (ssa_rep) {
       int attrs = oat_data_flow_attributes[mir->dalvikInsn.opcode];
diff --git a/src/compiler/ssa_transformation.cc b/src/compiler/ssa_transformation.cc
index 0a71cb4..2a3ceca 100644
--- a/src/compiler/ssa_transformation.cc
+++ b/src/compiler/ssa_transformation.cc
@@ -802,7 +802,7 @@
   std::vector<int> incoming_arc;
 
   /* Phi nodes are at the beginning of each block */
-  for (mir = bb->first_mir_insn; mir; mir = mir->next) {
+  for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
     if (mir->dalvikInsn.opcode != static_cast<Instruction::Code>(kMirOpPhi))
       return true;
     int ssa_reg = mir->ssa_rep->defs[0];