commit 2e4fcc99c12d09c47eb64828169211ce8c5a9a8d
author Artem Serov <artem.serov@linaro.org> Mon Jul 11 14:00:46 2016 +0100
committer Vladimir Marko <vmarko@google.com> Tue Jul 19 09:41:31 2016 +0000
tree 126d7a03e7efbcd09395f393cd19c19d64c17fdf
parent 4c489f48ef432126b8e7a84b61c1c13a7514c085

ARM: Fix shifted register offset mem address mode for load signed.

For example 'ldrsh r0, [sp, r1, LSL #2]' previously
was assembled as 'ldrh'.

Test: New test in assembler_thumb2_test.cc .
Change-Id: I1d30724f0c2745b131876bffefdc0a780d76f6a1

compiler/utils/arm/assembler_thumb2.cc

diff --git a/compiler/utils/arm/assembler_thumb2.cc b/compiler/utils/arm/assembler_thumb2.cc
index 8747dad..353c729 100644
--- a/compiler/utils/arm/assembler_thumb2.cc
+++ b/compiler/utils/arm/assembler_thumb2.cc
@@ -2456,6 +2456,9 @@
         } else if (!byte) {
           encoding |= B22;
         }
+        if (load && is_signed && (byte || half)) {
+          encoding |= B24;
+        }
         Emit32(encoding);
       } else {
         // 16 bit register offset.