commit 32ca375a5f9dcd010bafa84f829339b6b612b844
author Roland Levillain <rpl@google.com> Wed Feb 17 16:49:37 2016 +0000
committer Roland Levillain <rpl@google.com> Wed Feb 17 16:53:00 2016 +0000
tree cfb67bf6410a1223d6f4fe07fc7368559140eab8
parent d99073f2a57929b5baeb4ed2b80556f0a2aa1284

Fix uses of art::HCompare::IsGtBias on MIPS32 and MIPS64.

Do not call this method on non floating-point HCompare
instructions.

Change-Id: I262ab23f48d32295641063f897dca02cb92eb2e2

compiler/optimizing/code_generator_mips.cc

diff --git a/compiler/optimizing/code_generator_mips.cc b/compiler/optimizing/code_generator_mips.cc
index ad3e988..c500ea4 100644
--- a/compiler/optimizing/code_generator_mips.cc
+++ b/compiler/optimizing/code_generator_mips.cc
@@ -2107,7 +2107,6 @@
   LocationSummary* locations = instruction->GetLocations();
   Register res = locations->Out().AsRegister<Register>();
   Primitive::Type in_type = instruction->InputAt(0)->GetType();
-  bool gt_bias = instruction->IsGtBias();
   bool isR6 = codegen_->GetInstructionSetFeatures().IsR6();
 
   //  0 if: left == right
@@ -2141,6 +2140,7 @@
     }
 
     case Primitive::kPrimFloat: {
+      bool gt_bias = instruction->IsGtBias();
       FRegister lhs = locations->InAt(0).AsFpuRegister<FRegister>();
       FRegister rhs = locations->InAt(1).AsFpuRegister<FRegister>();
       MipsLabel done;
@@ -2180,6 +2180,7 @@
       break;
     }
     case Primitive::kPrimDouble: {
+      bool gt_bias = instruction->IsGtBias();
       FRegister lhs = locations->InAt(0).AsFpuRegister<FRegister>();
       FRegister rhs = locations->InAt(1).AsFpuRegister<FRegister>();
       MipsLabel done;

compiler/optimizing/code_generator_mips64.cc

diff --git a/compiler/optimizing/code_generator_mips64.cc b/compiler/optimizing/code_generator_mips64.cc
index 119084e..e3a44f1 100644
--- a/compiler/optimizing/code_generator_mips64.cc
+++ b/compiler/optimizing/code_generator_mips64.cc
@@ -1727,7 +1727,6 @@
   LocationSummary* locations = instruction->GetLocations();
   GpuRegister res = locations->Out().AsRegister<GpuRegister>();
   Primitive::Type in_type = instruction->InputAt(0)->GetType();
-  bool gt_bias = instruction->IsGtBias();
 
   //  0 if: left == right
   //  1 if: left  > right
@@ -1769,7 +1768,7 @@
       __ CmpEqS(FTMP, lhs, rhs);
       __ LoadConst32(res, 0);
       __ Bc1nez(FTMP, &done);
-      if (gt_bias) {
+      if (instruction->IsGtBias()) {
         __ CmpLtS(FTMP, lhs, rhs);
         __ LoadConst32(res, -1);
         __ Bc1nez(FTMP, &done);
@@ -1791,7 +1790,7 @@
       __ CmpEqD(FTMP, lhs, rhs);
       __ LoadConst32(res, 0);
       __ Bc1nez(FTMP, &done);
-      if (gt_bias) {
+      if (instruction->IsGtBias()) {
         __ CmpLtD(FTMP, lhs, rhs);
         __ LoadConst32(res, -1);
         __ Bc1nez(FTMP, &done);
@@ -4258,4 +4257,3 @@
 
 }  // namespace mips64
 }  // namespace art
-