Ensure stack maps are 4 byte aligned.
With the recent move to gcc 4.9, we are hitting alignment
SIGBUS on ARM. The reason is that gcc will optimize two consecutive
32bits loads into one 64bits load, and the instruction (ldrd)
will fail if the data is not aligned.
Also removed the emission of mapping table when a method is optimized.
The information can be found in the StackMap itself.
Change-Id: Icf79406c18a3f4db3c05d52fc2c0dd2e35bf0f8f
diff --git a/compiler/common_compiler_test.cc b/compiler/common_compiler_test.cc
index a3d9a0b..e84f65a 100644
--- a/compiler/common_compiler_test.cc
+++ b/compiler/common_compiler_test.cc
@@ -57,7 +57,7 @@
const std::vector<uint8_t>& vmap_table = compiled_method->GetVmapTable();
uint32_t vmap_table_offset = vmap_table.empty() ? 0u
: sizeof(OatQuickMethodHeader) + vmap_table.size();
- const std::vector<uint8_t>& mapping_table = compiled_method->GetMappingTable();
+ const std::vector<uint8_t>& mapping_table = *compiled_method->GetMappingTable();
uint32_t mapping_table_offset = mapping_table.empty() ? 0u
: sizeof(OatQuickMethodHeader) + vmap_table.size() + mapping_table.size();
const std::vector<uint8_t>& gc_map = *compiled_method->GetGcMap();