commit 50fa993d67f8a20322c27c1a77e7efcf826531fc
author Alex Light <allight@google.com> Mon Aug 10 15:30:07 2015 -0700
committer Alex Light <allight@google.com> Tue Aug 18 11:21:05 2015 -0700
tree 76d6b73a9d8a8ef2709aef6c01778af6a0d4ada1
parent 4500fcbe682d666a24c2e8f6e0cb90cfb35d3fa3

Svelter libart-compiler

Added new environment variable ART_{TARGET,HOST}_CODEGEN_ARCHS which
may be set to 'all', 'svelte' or a space separated list of architectures.

When compiled with ART_{TARGET,HOST}_CODEGEN_ARCHS='all' (the default
value) dex2oat will be able to generate output for all supported
architectures.

When compiled with ART_TARGET_CODEGEN_ARCHS='svelte'
only the architectures of the TARGET will be included. When
ART_HOST_CODEGEN_ARCHS='svelte' all architectures the target includes
and the host architectures will be included on the host dex2oat.

If a list of architectures is given only those will be included.

Change-Id: I87f4ad0131ab1b37544d8799e947ce4733b6daec

compiler/dex/quick/quick_compiler.cc

diff --git a/compiler/dex/quick/quick_compiler.cc b/compiler/dex/quick/quick_compiler.cc
index 39496a4..6e73ae7 100644
--- a/compiler/dex/quick/quick_compiler.cc
+++ b/compiler/dex/quick/quick_compiler.cc
@@ -43,10 +43,21 @@
 #include "runtime.h"
 
 // Specific compiler backends.
+#ifdef ART_ENABLE_CODEGEN_arm
 #include "dex/quick/arm/backend_arm.h"
+#endif
+
+#ifdef ART_ENABLE_CODEGEN_arm64
 #include "dex/quick/arm64/backend_arm64.h"
+#endif
+
+#if defined(ART_ENABLE_CODEGEN_mips) || defined(ART_ENABLE_CODEGEN_mips64)
 #include "dex/quick/mips/backend_mips.h"
+#endif
+
+#if defined(ART_ENABLE_CODEGEN_x86) || defined(ART_ENABLE_CODEGEN_x86_64)
 #include "dex/quick/x86/backend_x86.h"
+#endif
 
 namespace art {
 
@@ -844,22 +855,42 @@
   UNUSED(compilation_unit);
   Mir2Lir* mir_to_lir = nullptr;
   switch (cu->instruction_set) {
+#ifdef ART_ENABLE_CODEGEN_arm
     case kThumb2:
       mir_to_lir = ArmCodeGenerator(cu, cu->mir_graph.get(), &cu->arena);
       break;
+#endif  // ART_ENABLE_CODEGEN_arm
+#ifdef ART_ENABLE_CODEGEN_arm64
     case kArm64:
       mir_to_lir = Arm64CodeGenerator(cu, cu->mir_graph.get(), &cu->arena);
       break;
+#endif  // ART_ENABLE_CODEGEN_arm64
+#if defined(ART_ENABLE_CODEGEN_mips) || defined(ART_ENABLE_CODEGEN_mips64)
+      // Intentional 2 level ifdef. Want to fail on mips64 if it is not enabled, even if mips is
+      // and vice versa.
+#ifdef ART_ENABLE_CODEGEN_mips
     case kMips:
       // Fall-through.
+#endif  // ART_ENABLE_CODEGEN_mips
+#ifdef ART_ENABLE_CODEGEN_mips64
     case kMips64:
+#endif  // ART_ENABLE_CODEGEN_mips64
       mir_to_lir = MipsCodeGenerator(cu, cu->mir_graph.get(), &cu->arena);
       break;
+#endif  // ART_ENABLE_CODEGEN_mips || ART_ENABLE_CODEGEN_mips64
+#if defined(ART_ENABLE_CODEGEN_x86) || defined(ART_ENABLE_CODEGEN_x86_64)
+      // Intentional 2 level ifdef. Want to fail on x86_64 if it is not enabled, even if x86 is
+      // and vice versa.
+#ifdef ART_ENABLE_CODEGEN_x86
     case kX86:
       // Fall-through.
+#endif  // ART_ENABLE_CODEGEN_x86
+#ifdef ART_ENABLE_CODEGEN_x86_64
     case kX86_64:
+#endif  // ART_ENABLE_CODEGEN_x86_64
       mir_to_lir = X86CodeGenerator(cu, cu->mir_graph.get(), &cu->arena);
       break;
+#endif  // ART_ENABLE_CODEGEN_x86 || ART_ENABLE_CODEGEN_x86_64
     default:
       LOG(FATAL) << "Unexpected instruction set: " << cu->instruction_set;
   }