Add support for int-to-byte in the optimizing compiler.
- Add support for the int-to-byte Dex instruction in the
optimizing compiler.
- Implement the ARM and Thumb-2 SBFX instructions.
- Generate x86, x86-64 and ARM (but not ARM64) code for
char to byte, short to byte and int to byte
HTypeConversion nodes.
- Add related tests to test/422-type-conversion.
Change-Id: Ic8b8911b90d4b5281fad15bcee96bc3ee85dc577
diff --git a/compiler/utils/arm/assembler_arm.h b/compiler/utils/arm/assembler_arm.h
index dca2ab7..911000a 100644
--- a/compiler/utils/arm/assembler_arm.h
+++ b/compiler/utils/arm/assembler_arm.h
@@ -421,6 +421,9 @@
virtual void sdiv(Register rd, Register rn, Register rm, Condition cond = AL) = 0;
virtual void udiv(Register rd, Register rn, Register rm, Condition cond = AL) = 0;
+ virtual void sbfx(Register rd, Register rn, uint32_t lsb, uint32_t width,
+ Condition cond = AL) = 0;
+
// Load/store instructions.
virtual void ldr(Register rd, const Address& ad, Condition cond = AL) = 0;
virtual void str(Register rd, const Address& ad, Condition cond = AL) = 0;
diff --git a/compiler/utils/arm/assembler_arm32.cc b/compiler/utils/arm/assembler_arm32.cc
index c8a57b1..29cbf58 100644
--- a/compiler/utils/arm/assembler_arm32.cc
+++ b/compiler/utils/arm/assembler_arm32.cc
@@ -208,6 +208,25 @@
}
+void Arm32Assembler::sbfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond) {
+ CHECK_NE(rd, kNoRegister);
+ CHECK_NE(rn, kNoRegister);
+ CHECK_NE(cond, kNoCondition);
+ CHECK_LE(lsb, 31U);
+ CHECK(1U <= width && width <= 32U) << width;
+ uint32_t widthminus1 = width - 1;
+
+ int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) |
+ B26 | B25 | B24 | B23 | B21 |
+ (widthminus1 << 16) |
+ (static_cast<uint32_t>(rd) << 12) |
+ (lsb << 7) |
+ B6 | B4 |
+ static_cast<uint32_t>(rn);
+ Emit(encoding);
+}
+
+
void Arm32Assembler::ldr(Register rd, const Address& ad, Condition cond) {
EmitMemOp(cond, true, false, rd, ad);
}
diff --git a/compiler/utils/arm/assembler_arm32.h b/compiler/utils/arm/assembler_arm32.h
index dbabb99..b582e9e 100644
--- a/compiler/utils/arm/assembler_arm32.h
+++ b/compiler/utils/arm/assembler_arm32.h
@@ -96,6 +96,8 @@
void sdiv(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE;
void udiv(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE;
+ void sbfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond = AL) OVERRIDE;
+
// Load/store instructions.
void ldr(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
void str(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
diff --git a/compiler/utils/arm/assembler_thumb2.cc b/compiler/utils/arm/assembler_thumb2.cc
index 053e843..a309e18 100644
--- a/compiler/utils/arm/assembler_thumb2.cc
+++ b/compiler/utils/arm/assembler_thumb2.cc
@@ -264,6 +264,27 @@
}
+void Thumb2Assembler::sbfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond) {
+ CheckCondition(cond);
+ CHECK_LE(lsb, 31U);
+ CHECK(1U <= width && width <= 32U) << width;
+ uint32_t widthminus1 = width - 1;
+ uint32_t imm2 = lsb & (B1 | B0); // Bits 0-1 of `lsb`.
+ uint32_t imm3 = (lsb & (B4 | B3 | B2)) >> 2; // Bits 2-4 of `lsb`.
+
+ uint32_t op = 20U /* 0b10100 */;
+ int32_t encoding = B31 | B30 | B29 | B28 | B25 |
+ op << 20 |
+ static_cast<uint32_t>(rn) << 16 |
+ imm3 << 12 |
+ static_cast<uint32_t>(rd) << 8 |
+ imm2 << 6 |
+ widthminus1;
+
+ Emit32(encoding);
+}
+
+
void Thumb2Assembler::ldr(Register rd, const Address& ad, Condition cond) {
EmitLoadStore(cond, true, false, false, false, rd, ad);
}
diff --git a/compiler/utils/arm/assembler_thumb2.h b/compiler/utils/arm/assembler_thumb2.h
index 9ccdef7..1fc842c 100644
--- a/compiler/utils/arm/assembler_thumb2.h
+++ b/compiler/utils/arm/assembler_thumb2.h
@@ -118,6 +118,8 @@
void sdiv(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE;
void udiv(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE;
+ void sbfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond = AL) OVERRIDE;
+
// Load/store instructions.
void ldr(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
void str(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;