Quick Compiler function renaming
Move the Quick compiler's function naming to Art coding conventions. Will
be done is pieces: names first, then arguments and locals. Also removed
some dead code and marked statics for the top level source files
No logic changes aside from eliminating a few useless exported "oat"
routines.
Change-Id: Iadaddc560942a0fc1199ba5b1c261cd6ac5cfd9a
diff --git a/src/compiler/codegen/mips/int_mips.cc b/src/compiler/codegen/mips/int_mips.cc
index 297a5d92..29b08ed 100644
--- a/src/compiler/codegen/mips/int_mips.cc
+++ b/src/compiler/codegen/mips/int_mips.cc
@@ -39,29 +39,29 @@
* finish:
*
*/
-void genCmpLong(CompilationUnit* cUnit, RegLocation rlDest,
+void GenCmpLong(CompilationUnit* cUnit, RegLocation rlDest,
RegLocation rlSrc1, RegLocation rlSrc2)
{
- rlSrc1 = loadValueWide(cUnit, rlSrc1, kCoreReg);
- rlSrc2 = loadValueWide(cUnit, rlSrc2, kCoreReg);
- int t0 = oatAllocTemp(cUnit);
- int t1 = oatAllocTemp(cUnit);
- RegLocation rlResult = oatEvalLoc(cUnit, rlDest, kCoreReg, true);
- newLIR3(cUnit, kMipsSlt, t0, rlSrc1.highReg, rlSrc2.highReg);
- newLIR3(cUnit, kMipsSlt, t1, rlSrc2.highReg, rlSrc1.highReg);
- newLIR3(cUnit, kMipsSubu, rlResult.lowReg, t1, t0);
- LIR* branch = opCmpImmBranch(cUnit, kCondNe, rlResult.lowReg, 0, NULL);
- newLIR3(cUnit, kMipsSltu, t0, rlSrc1.lowReg, rlSrc2.lowReg);
- newLIR3(cUnit, kMipsSltu, t1, rlSrc2.lowReg, rlSrc1.lowReg);
- newLIR3(cUnit, kMipsSubu, rlResult.lowReg, t1, t0);
- oatFreeTemp(cUnit, t0);
- oatFreeTemp(cUnit, t1);
- LIR* target = newLIR0(cUnit, kPseudoTargetLabel);
+ rlSrc1 = LoadValueWide(cUnit, rlSrc1, kCoreReg);
+ rlSrc2 = LoadValueWide(cUnit, rlSrc2, kCoreReg);
+ int t0 = AllocTemp(cUnit);
+ int t1 = AllocTemp(cUnit);
+ RegLocation rlResult = EvalLoc(cUnit, rlDest, kCoreReg, true);
+ NewLIR3(cUnit, kMipsSlt, t0, rlSrc1.highReg, rlSrc2.highReg);
+ NewLIR3(cUnit, kMipsSlt, t1, rlSrc2.highReg, rlSrc1.highReg);
+ NewLIR3(cUnit, kMipsSubu, rlResult.lowReg, t1, t0);
+ LIR* branch = OpCmpImmBranch(cUnit, kCondNe, rlResult.lowReg, 0, NULL);
+ NewLIR3(cUnit, kMipsSltu, t0, rlSrc1.lowReg, rlSrc2.lowReg);
+ NewLIR3(cUnit, kMipsSltu, t1, rlSrc2.lowReg, rlSrc1.lowReg);
+ NewLIR3(cUnit, kMipsSubu, rlResult.lowReg, t1, t0);
+ FreeTemp(cUnit, t0);
+ FreeTemp(cUnit, t1);
+ LIR* target = NewLIR0(cUnit, kPseudoTargetLabel);
branch->target = target;
- storeValue(cUnit, rlDest, rlResult);
+ StoreValue(cUnit, rlDest, rlResult);
}
-LIR* opCmpBranch(CompilationUnit* cUnit, ConditionCode cond, int src1,
+LIR* OpCmpBranch(CompilationUnit* cUnit, ConditionCode cond, int src1,
int src2, LIR* target)
{
LIR* branch;
@@ -114,31 +114,31 @@
return NULL;
}
if (cmpZero) {
- branch = newLIR2(cUnit, brOp, src1, src2);
+ branch = NewLIR2(cUnit, brOp, src1, src2);
} else {
- int tReg = oatAllocTemp(cUnit);
+ int tReg = AllocTemp(cUnit);
if (swapped) {
- newLIR3(cUnit, sltOp, tReg, src2, src1);
+ NewLIR3(cUnit, sltOp, tReg, src2, src1);
} else {
- newLIR3(cUnit, sltOp, tReg, src1, src2);
+ NewLIR3(cUnit, sltOp, tReg, src1, src2);
}
- branch = newLIR1(cUnit, brOp, tReg);
- oatFreeTemp(cUnit, tReg);
+ branch = NewLIR1(cUnit, brOp, tReg);
+ FreeTemp(cUnit, tReg);
}
branch->target = target;
return branch;
}
-LIR* opCmpImmBranch(CompilationUnit* cUnit, ConditionCode cond, int reg,
+LIR* OpCmpImmBranch(CompilationUnit* cUnit, ConditionCode cond, int reg,
int checkValue, LIR* target)
{
LIR* branch;
if (checkValue != 0) {
// TUNING: handle s16 & kCondLt/Mi case using slti
- int tReg = oatAllocTemp(cUnit);
- loadConstant(cUnit, tReg, checkValue);
- branch = opCmpBranch(cUnit, cond, reg, tReg, target);
- oatFreeTemp(cUnit, tReg);
+ int tReg = AllocTemp(cUnit);
+ LoadConstant(cUnit, tReg, checkValue);
+ branch = OpCmpBranch(cUnit, cond, reg, tReg, target);
+ FreeTemp(cUnit, tReg);
return branch;
}
MipsOpCode opc;
@@ -152,24 +152,24 @@
case kCondNe: opc = kMipsBnez; break;
default:
// Tuning: use slti when applicable
- int tReg = oatAllocTemp(cUnit);
- loadConstant(cUnit, tReg, checkValue);
- branch = opCmpBranch(cUnit, cond, reg, tReg, target);
- oatFreeTemp(cUnit, tReg);
+ int tReg = AllocTemp(cUnit);
+ LoadConstant(cUnit, tReg, checkValue);
+ branch = OpCmpBranch(cUnit, cond, reg, tReg, target);
+ FreeTemp(cUnit, tReg);
return branch;
}
- branch = newLIR1(cUnit, opc, reg);
+ branch = NewLIR1(cUnit, opc, reg);
branch->target = target;
return branch;
}
-LIR* opRegCopyNoInsert(CompilationUnit *cUnit, int rDest, int rSrc)
+LIR* OpRegCopyNoInsert(CompilationUnit *cUnit, int rDest, int rSrc)
{
#ifdef __mips_hard_float
if (MIPS_FPREG(rDest) || MIPS_FPREG(rSrc))
- return fpRegCopy(cUnit, rDest, rSrc);
+ return FpRegCopy(cUnit, rDest, rSrc);
#endif
- LIR* res = rawLIR(cUnit, cUnit->currentDalvikOffset, kMipsMove,
+ LIR* res = RawLIR(cUnit, cUnit->currentDalvikOffset, kMipsMove,
rDest, rSrc);
if (!(cUnit->disableOpt & (1 << kSafeOptimizations)) && rDest == rSrc) {
res->flags.isNop = true;
@@ -177,14 +177,14 @@
return res;
}
-LIR* opRegCopy(CompilationUnit *cUnit, int rDest, int rSrc)
+LIR* OpRegCopy(CompilationUnit *cUnit, int rDest, int rSrc)
{
- LIR *res = opRegCopyNoInsert(cUnit, rDest, rSrc);
- oatAppendLIR(cUnit, res);
+ LIR *res = OpRegCopyNoInsert(cUnit, rDest, rSrc);
+ AppendLIR(cUnit, res);
return res;
}
-void opRegCopyWide(CompilationUnit *cUnit, int destLo, int destHi,
+void OpRegCopyWide(CompilationUnit *cUnit, int destLo, int destHi,
int srcLo, int srcHi)
{
#ifdef __mips_hard_float
@@ -194,169 +194,169 @@
assert(MIPS_FPREG(destLo) == MIPS_FPREG(destHi));
if (destFP) {
if (srcFP) {
- opRegCopy(cUnit, s2d(destLo, destHi), s2d(srcLo, srcHi));
+ OpRegCopy(cUnit, S2d(destLo, destHi), S2d(srcLo, srcHi));
} else {
/* note the operands are swapped for the mtc1 instr */
- newLIR2(cUnit, kMipsMtc1, srcLo, destLo);
- newLIR2(cUnit, kMipsMtc1, srcHi, destHi);
+ NewLIR2(cUnit, kMipsMtc1, srcLo, destLo);
+ NewLIR2(cUnit, kMipsMtc1, srcHi, destHi);
}
} else {
if (srcFP) {
- newLIR2(cUnit, kMipsMfc1, destLo, srcLo);
- newLIR2(cUnit, kMipsMfc1, destHi, srcHi);
+ NewLIR2(cUnit, kMipsMfc1, destLo, srcLo);
+ NewLIR2(cUnit, kMipsMfc1, destHi, srcHi);
} else {
// Handle overlap
if (srcHi == destLo) {
- opRegCopy(cUnit, destHi, srcHi);
- opRegCopy(cUnit, destLo, srcLo);
+ OpRegCopy(cUnit, destHi, srcHi);
+ OpRegCopy(cUnit, destLo, srcLo);
} else {
- opRegCopy(cUnit, destLo, srcLo);
- opRegCopy(cUnit, destHi, srcHi);
+ OpRegCopy(cUnit, destLo, srcLo);
+ OpRegCopy(cUnit, destHi, srcHi);
}
}
}
#else
// Handle overlap
if (srcHi == destLo) {
- opRegCopy(cUnit, destHi, srcHi);
- opRegCopy(cUnit, destLo, srcLo);
+ OpRegCopy(cUnit, destHi, srcHi);
+ OpRegCopy(cUnit, destLo, srcLo);
} else {
- opRegCopy(cUnit, destLo, srcLo);
- opRegCopy(cUnit, destHi, srcHi);
+ OpRegCopy(cUnit, destLo, srcLo);
+ OpRegCopy(cUnit, destHi, srcHi);
}
#endif
}
-void genFusedLongCmpBranch(CompilationUnit* cUnit, BasicBlock* bb, MIR* mir)
+void GenFusedLongCmpBranch(CompilationUnit* cUnit, BasicBlock* bb, MIR* mir)
{
UNIMPLEMENTED(FATAL) << "Need codegen for fused long cmp branch";
}
-LIR* genRegMemCheck(CompilationUnit* cUnit, ConditionCode cCode,
+LIR* GenRegMemCheck(CompilationUnit* cUnit, ConditionCode cCode,
int reg1, int base, int offset, ThrowKind kind)
{
- LOG(FATAL) << "Unexpected use of genRegMemCheck for Arm";
+ LOG(FATAL) << "Unexpected use of GenRegMemCheck for Arm";
return NULL;
}
-RegLocation genDivRem(CompilationUnit* cUnit, RegLocation rlDest, int reg1, int reg2, bool isDiv)
+RegLocation GenDivRem(CompilationUnit* cUnit, RegLocation rlDest, int reg1, int reg2, bool isDiv)
{
- newLIR4(cUnit, kMipsDiv, r_HI, r_LO, reg1, reg2);
- RegLocation rlResult = oatEvalLoc(cUnit, rlDest, kCoreReg, true);
+ NewLIR4(cUnit, kMipsDiv, r_HI, r_LO, reg1, reg2);
+ RegLocation rlResult = EvalLoc(cUnit, rlDest, kCoreReg, true);
if (isDiv) {
- newLIR2(cUnit, kMipsMflo, rlResult.lowReg, r_LO);
+ NewLIR2(cUnit, kMipsMflo, rlResult.lowReg, r_LO);
} else {
- newLIR2(cUnit, kMipsMfhi, rlResult.lowReg, r_HI);
+ NewLIR2(cUnit, kMipsMfhi, rlResult.lowReg, r_HI);
}
return rlResult;
}
-RegLocation genDivRemLit(CompilationUnit* cUnit, RegLocation rlDest, int reg1, int lit, bool isDiv)
+RegLocation GenDivRemLit(CompilationUnit* cUnit, RegLocation rlDest, int reg1, int lit, bool isDiv)
{
- int tReg = oatAllocTemp(cUnit);
- newLIR3(cUnit, kMipsAddiu, tReg, r_ZERO, lit);
- newLIR4(cUnit, kMipsDiv, r_HI, r_LO, reg1, tReg);
- RegLocation rlResult = oatEvalLoc(cUnit, rlDest, kCoreReg, true);
+ int tReg = AllocTemp(cUnit);
+ NewLIR3(cUnit, kMipsAddiu, tReg, r_ZERO, lit);
+ NewLIR4(cUnit, kMipsDiv, r_HI, r_LO, reg1, tReg);
+ RegLocation rlResult = EvalLoc(cUnit, rlDest, kCoreReg, true);
if (isDiv) {
- newLIR2(cUnit, kMipsMflo, rlResult.lowReg, r_LO);
+ NewLIR2(cUnit, kMipsMflo, rlResult.lowReg, r_LO);
} else {
- newLIR2(cUnit, kMipsMfhi, rlResult.lowReg, r_HI);
+ NewLIR2(cUnit, kMipsMfhi, rlResult.lowReg, r_HI);
}
- oatFreeTemp(cUnit, tReg);
+ FreeTemp(cUnit, tReg);
return rlResult;
}
-void opLea(CompilationUnit* cUnit, int rBase, int reg1, int reg2, int scale, int offset)
+void OpLea(CompilationUnit* cUnit, int rBase, int reg1, int reg2, int scale, int offset)
{
- LOG(FATAL) << "Unexpected use of opLea for Arm";
+ LOG(FATAL) << "Unexpected use of OpLea for Arm";
}
-void opTlsCmp(CompilationUnit* cUnit, int offset, int val)
+void OpTlsCmp(CompilationUnit* cUnit, int offset, int val)
{
- LOG(FATAL) << "Unexpected use of opTlsCmp for Arm";
+ LOG(FATAL) << "Unexpected use of OpTlsCmp for Arm";
}
-bool genInlinedCas32(CompilationUnit* cUnit, CallInfo* info, bool need_write_barrier) {
+bool GenInlinedCas32(CompilationUnit* cUnit, CallInfo* info, bool need_write_barrier) {
DCHECK_NE(cUnit->instructionSet, kThumb2);
return false;
}
-bool genInlinedSqrt(CompilationUnit* cUnit, CallInfo* info) {
+bool GenInlinedSqrt(CompilationUnit* cUnit, CallInfo* info) {
DCHECK_NE(cUnit->instructionSet, kThumb2);
return false;
}
-LIR* opPcRelLoad(CompilationUnit* cUnit, int reg, LIR* target) {
- LOG(FATAL) << "Unexpected use of opPcRelLoad for Mips";
+LIR* OpPcRelLoad(CompilationUnit* cUnit, int reg, LIR* target) {
+ LOG(FATAL) << "Unexpected use of OpPcRelLoad for Mips";
return NULL;
}
-LIR* opVldm(CompilationUnit* cUnit, int rBase, int count)
+LIR* OpVldm(CompilationUnit* cUnit, int rBase, int count)
{
- LOG(FATAL) << "Unexpected use of opVldm for Mips";
+ LOG(FATAL) << "Unexpected use of OpVldm for Mips";
return NULL;
}
-LIR* opVstm(CompilationUnit* cUnit, int rBase, int count)
+LIR* OpVstm(CompilationUnit* cUnit, int rBase, int count)
{
- LOG(FATAL) << "Unexpected use of opVstm for Mips";
+ LOG(FATAL) << "Unexpected use of OpVstm for Mips";
return NULL;
}
-void genMultiplyByTwoBitMultiplier(CompilationUnit* cUnit, RegLocation rlSrc,
+void GenMultiplyByTwoBitMultiplier(CompilationUnit* cUnit, RegLocation rlSrc,
RegLocation rlResult, int lit,
int firstBit, int secondBit)
{
- int tReg = oatAllocTemp(cUnit);
- opRegRegImm(cUnit, kOpLsl, tReg, rlSrc.lowReg, secondBit - firstBit);
- opRegRegReg(cUnit, kOpAdd, rlResult.lowReg, rlSrc.lowReg, tReg);
- oatFreeTemp(cUnit, tReg);
+ int tReg = AllocTemp(cUnit);
+ OpRegRegImm(cUnit, kOpLsl, tReg, rlSrc.lowReg, secondBit - firstBit);
+ OpRegRegReg(cUnit, kOpAdd, rlResult.lowReg, rlSrc.lowReg, tReg);
+ FreeTemp(cUnit, tReg);
if (firstBit != 0) {
- opRegRegImm(cUnit, kOpLsl, rlResult.lowReg, rlResult.lowReg, firstBit);
+ OpRegRegImm(cUnit, kOpLsl, rlResult.lowReg, rlResult.lowReg, firstBit);
}
}
-void genDivZeroCheck(CompilationUnit* cUnit, int regLo, int regHi)
+void GenDivZeroCheck(CompilationUnit* cUnit, int regLo, int regHi)
{
- int tReg = oatAllocTemp(cUnit);
- opRegRegReg(cUnit, kOpOr, tReg, regLo, regHi);
- genImmedCheck(cUnit, kCondEq, tReg, 0, kThrowDivZero);
- oatFreeTemp(cUnit, tReg);
+ int tReg = AllocTemp(cUnit);
+ OpRegRegReg(cUnit, kOpOr, tReg, regLo, regHi);
+ GenImmedCheck(cUnit, kCondEq, tReg, 0, kThrowDivZero);
+ FreeTemp(cUnit, tReg);
}
// Test suspend flag, return target of taken suspend branch
-LIR* opTestSuspend(CompilationUnit* cUnit, LIR* target)
+LIR* OpTestSuspend(CompilationUnit* cUnit, LIR* target)
{
- opRegImm(cUnit, kOpSub, rMIPS_SUSPEND, 1);
- return opCmpImmBranch(cUnit, (target == NULL) ? kCondEq : kCondNe, rMIPS_SUSPEND, 0, target);
+ OpRegImm(cUnit, kOpSub, rMIPS_SUSPEND, 1);
+ return OpCmpImmBranch(cUnit, (target == NULL) ? kCondEq : kCondNe, rMIPS_SUSPEND, 0, target);
}
// Decrement register and branch on condition
-LIR* opDecAndBranch(CompilationUnit* cUnit, ConditionCode cCode, int reg, LIR* target)
+LIR* OpDecAndBranch(CompilationUnit* cUnit, ConditionCode cCode, int reg, LIR* target)
{
- opRegImm(cUnit, kOpSub, reg, 1);
- return opCmpImmBranch(cUnit, cCode, reg, 0, target);
+ OpRegImm(cUnit, kOpSub, reg, 1);
+ return OpCmpImmBranch(cUnit, cCode, reg, 0, target);
}
-bool smallLiteralDivide(CompilationUnit* cUnit, Instruction::Code dalvikOpcode,
+bool SmallLiteralDivide(CompilationUnit* cUnit, Instruction::Code dalvikOpcode,
RegLocation rlSrc, RegLocation rlDest, int lit)
{
LOG(FATAL) << "Unexpected use of smallLiteralDive in Mips";
return false;
}
-LIR* opIT(CompilationUnit* cUnit, ArmConditionCode cond, const char* guide)
+LIR* OpIT(CompilationUnit* cUnit, ArmConditionCode cond, const char* guide)
{
- LOG(FATAL) << "Unexpected use of opIT in Mips";
+ LOG(FATAL) << "Unexpected use of OpIT in Mips";
return NULL;
}
-bool genAddLong(CompilationUnit* cUnit, RegLocation rlDest,
+bool GenAddLong(CompilationUnit* cUnit, RegLocation rlDest,
RegLocation rlSrc1, RegLocation rlSrc2)
{
- rlSrc1 = loadValueWide(cUnit, rlSrc1, kCoreReg);
- rlSrc2 = loadValueWide(cUnit, rlSrc2, kCoreReg);
- RegLocation rlResult = oatEvalLoc(cUnit, rlDest, kCoreReg, true);
+ rlSrc1 = LoadValueWide(cUnit, rlSrc1, kCoreReg);
+ rlSrc2 = LoadValueWide(cUnit, rlSrc2, kCoreReg);
+ RegLocation rlResult = EvalLoc(cUnit, rlDest, kCoreReg, true);
/*
* [v1 v0] = [a1 a0] + [a3 a2];
* addu v0,a2,a0
@@ -365,22 +365,22 @@
* addu v1,v1,t1
*/
- opRegRegReg(cUnit, kOpAdd, rlResult.lowReg, rlSrc2.lowReg, rlSrc1.lowReg);
- int tReg = oatAllocTemp(cUnit);
- opRegRegReg(cUnit, kOpAdd, tReg, rlSrc2.highReg, rlSrc1.highReg);
- newLIR3(cUnit, kMipsSltu, rlResult.highReg, rlResult.lowReg, rlSrc2.lowReg);
- opRegRegReg(cUnit, kOpAdd, rlResult.highReg, rlResult.highReg, tReg);
- oatFreeTemp(cUnit, tReg);
- storeValueWide(cUnit, rlDest, rlResult);
+ OpRegRegReg(cUnit, kOpAdd, rlResult.lowReg, rlSrc2.lowReg, rlSrc1.lowReg);
+ int tReg = AllocTemp(cUnit);
+ OpRegRegReg(cUnit, kOpAdd, tReg, rlSrc2.highReg, rlSrc1.highReg);
+ NewLIR3(cUnit, kMipsSltu, rlResult.highReg, rlResult.lowReg, rlSrc2.lowReg);
+ OpRegRegReg(cUnit, kOpAdd, rlResult.highReg, rlResult.highReg, tReg);
+ FreeTemp(cUnit, tReg);
+ StoreValueWide(cUnit, rlDest, rlResult);
return false;
}
-bool genSubLong(CompilationUnit* cUnit, RegLocation rlDest,
+bool GenSubLong(CompilationUnit* cUnit, RegLocation rlDest,
RegLocation rlSrc1, RegLocation rlSrc2)
{
- rlSrc1 = loadValueWide(cUnit, rlSrc1, kCoreReg);
- rlSrc2 = loadValueWide(cUnit, rlSrc2, kCoreReg);
- RegLocation rlResult = oatEvalLoc(cUnit, rlDest, kCoreReg, true);
+ rlSrc1 = LoadValueWide(cUnit, rlSrc1, kCoreReg);
+ rlSrc2 = LoadValueWide(cUnit, rlSrc2, kCoreReg);
+ RegLocation rlResult = EvalLoc(cUnit, rlDest, kCoreReg, true);
/*
* [v1 v0] = [a1 a0] - [a3 a2];
* sltu t1,a0,a2
@@ -389,21 +389,21 @@
* subu v1,v1,t1
*/
- int tReg = oatAllocTemp(cUnit);
- newLIR3(cUnit, kMipsSltu, tReg, rlSrc1.lowReg, rlSrc2.lowReg);
- opRegRegReg(cUnit, kOpSub, rlResult.lowReg, rlSrc1.lowReg, rlSrc2.lowReg);
- opRegRegReg(cUnit, kOpSub, rlResult.highReg, rlSrc1.highReg, rlSrc2.highReg);
- opRegRegReg(cUnit, kOpSub, rlResult.highReg, rlResult.highReg, tReg);
- oatFreeTemp(cUnit, tReg);
- storeValueWide(cUnit, rlDest, rlResult);
+ int tReg = AllocTemp(cUnit);
+ NewLIR3(cUnit, kMipsSltu, tReg, rlSrc1.lowReg, rlSrc2.lowReg);
+ OpRegRegReg(cUnit, kOpSub, rlResult.lowReg, rlSrc1.lowReg, rlSrc2.lowReg);
+ OpRegRegReg(cUnit, kOpSub, rlResult.highReg, rlSrc1.highReg, rlSrc2.highReg);
+ OpRegRegReg(cUnit, kOpSub, rlResult.highReg, rlResult.highReg, tReg);
+ FreeTemp(cUnit, tReg);
+ StoreValueWide(cUnit, rlDest, rlResult);
return false;
}
-bool genNegLong(CompilationUnit* cUnit, RegLocation rlDest,
+bool GenNegLong(CompilationUnit* cUnit, RegLocation rlDest,
RegLocation rlSrc)
{
- rlSrc = loadValueWide(cUnit, rlSrc, kCoreReg);
- RegLocation rlResult = oatEvalLoc(cUnit, rlDest, kCoreReg, true);
+ rlSrc = LoadValueWide(cUnit, rlSrc, kCoreReg);
+ RegLocation rlResult = EvalLoc(cUnit, rlDest, kCoreReg, true);
/*
* [v1 v0] = -[a1 a0]
* negu v0,a0
@@ -412,34 +412,34 @@
* subu v1,v1,t1
*/
- opRegReg(cUnit, kOpNeg, rlResult.lowReg, rlSrc.lowReg);
- opRegReg(cUnit, kOpNeg, rlResult.highReg, rlSrc.highReg);
- int tReg = oatAllocTemp(cUnit);
- newLIR3(cUnit, kMipsSltu, tReg, r_ZERO, rlResult.lowReg);
- opRegRegReg(cUnit, kOpSub, rlResult.highReg, rlResult.highReg, tReg);
- oatFreeTemp(cUnit, tReg);
- storeValueWide(cUnit, rlDest, rlResult);
+ OpRegReg(cUnit, kOpNeg, rlResult.lowReg, rlSrc.lowReg);
+ OpRegReg(cUnit, kOpNeg, rlResult.highReg, rlSrc.highReg);
+ int tReg = AllocTemp(cUnit);
+ NewLIR3(cUnit, kMipsSltu, tReg, r_ZERO, rlResult.lowReg);
+ OpRegRegReg(cUnit, kOpSub, rlResult.highReg, rlResult.highReg, tReg);
+ FreeTemp(cUnit, tReg);
+ StoreValueWide(cUnit, rlDest, rlResult);
return false;
}
-bool genAndLong(CompilationUnit* cUnit, RegLocation rlDest,
+bool GenAndLong(CompilationUnit* cUnit, RegLocation rlDest,
RegLocation rlSrc1, RegLocation rlSrc2)
{
- LOG(FATAL) << "Unexpected use of genAndLong for Mips";
+ LOG(FATAL) << "Unexpected use of GenAndLong for Mips";
return false;
}
-bool genOrLong(CompilationUnit* cUnit, RegLocation rlDest,
+bool GenOrLong(CompilationUnit* cUnit, RegLocation rlDest,
RegLocation rlSrc1, RegLocation rlSrc2)
{
- LOG(FATAL) << "Unexpected use of genOrLong for Mips";
+ LOG(FATAL) << "Unexpected use of GenOrLong for Mips";
return false;
}
-bool genXorLong(CompilationUnit* cUnit, RegLocation rlDest,
+bool GenXorLong(CompilationUnit* cUnit, RegLocation rlDest,
RegLocation rlSrc1, RegLocation rlSrc2)
{
- LOG(FATAL) << "Unexpected use of genXorLong for Mips";
+ LOG(FATAL) << "Unexpected use of GenXorLong for Mips";
return false;
}