commit 542451cc546779f5c67840e105c51205a1b0a8fd
author Andreas Gampe <agampe@google.com> Tue Jul 26 09:02:02 2016 -0700
committer Andreas Gampe <agampe@google.com> Mon Aug 01 18:54:48 2016 -0700
tree 11e09bb5abaee12dddffefbe7e425291076dfa7a
parent 85c4a4b8c9eabfe16e4e49f9b4aa78c1bf4be023

ART: Convert pointer size to enum

Move away from size_t to dedicated enum (class).

Bug: 30373134
Bug: 30419309
Test: m test-art-host
Change-Id: Id453c330f1065012e7d4f9fc24ac477cc9bb9269

compiler/trampolines/trampoline_compiler.cc

diff --git a/compiler/trampolines/trampoline_compiler.cc b/compiler/trampolines/trampoline_compiler.cc
index 1ee1c4d..304e56b 100644
--- a/compiler/trampolines/trampoline_compiler.cc
+++ b/compiler/trampolines/trampoline_compiler.cc
@@ -50,7 +50,7 @@
 #ifdef ART_ENABLE_CODEGEN_arm
 namespace arm {
 static std::unique_ptr<const std::vector<uint8_t>> CreateTrampoline(
-    ArenaAllocator* arena, EntryPointCallingConvention abi, ThreadOffset<4> offset) {
+    ArenaAllocator* arena, EntryPointCallingConvention abi, ThreadOffset32 offset) {
   Thumb2Assembler assembler(arena);
 
   switch (abi) {
@@ -80,7 +80,7 @@
 #ifdef ART_ENABLE_CODEGEN_arm64
 namespace arm64 {
 static std::unique_ptr<const std::vector<uint8_t>> CreateTrampoline(
-    ArenaAllocator* arena, EntryPointCallingConvention abi, ThreadOffset<8> offset) {
+    ArenaAllocator* arena, EntryPointCallingConvention abi, ThreadOffset64 offset) {
   Arm64Assembler assembler(arena);
 
   switch (abi) {
@@ -119,7 +119,7 @@
 #ifdef ART_ENABLE_CODEGEN_mips
 namespace mips {
 static std::unique_ptr<const std::vector<uint8_t>> CreateTrampoline(
-    ArenaAllocator* arena, EntryPointCallingConvention abi, ThreadOffset<4> offset) {
+    ArenaAllocator* arena, EntryPointCallingConvention abi, ThreadOffset32 offset) {
   MipsAssembler assembler(arena);
 
   switch (abi) {
@@ -151,7 +151,7 @@
 #ifdef ART_ENABLE_CODEGEN_mips64
 namespace mips64 {
 static std::unique_ptr<const std::vector<uint8_t>> CreateTrampoline(
-    ArenaAllocator* arena, EntryPointCallingConvention abi, ThreadOffset<8> offset) {
+    ArenaAllocator* arena, EntryPointCallingConvention abi, ThreadOffset64 offset) {
   Mips64Assembler assembler(arena);
 
   switch (abi) {
@@ -183,7 +183,7 @@
 #ifdef ART_ENABLE_CODEGEN_x86
 namespace x86 {
 static std::unique_ptr<const std::vector<uint8_t>> CreateTrampoline(ArenaAllocator* arena,
-                                                                    ThreadOffset<4> offset) {
+                                                                    ThreadOffset32 offset) {
   X86Assembler assembler(arena);
 
   // All x86 trampolines call via the Thread* held in fs.
@@ -204,7 +204,7 @@
 #ifdef ART_ENABLE_CODEGEN_x86_64
 namespace x86_64 {
 static std::unique_ptr<const std::vector<uint8_t>> CreateTrampoline(ArenaAllocator* arena,
-                                                                    ThreadOffset<8> offset) {
+                                                                    ThreadOffset64 offset) {
   x86_64::X86_64Assembler assembler(arena);
 
   // All x86 trampolines call via the Thread* held in gs.
@@ -224,7 +224,7 @@
 
 std::unique_ptr<const std::vector<uint8_t>> CreateTrampoline64(InstructionSet isa,
                                                                EntryPointCallingConvention abi,
-                                                               ThreadOffset<8> offset) {
+                                                               ThreadOffset64 offset) {
   ArenaPool pool;
   ArenaAllocator arena(&pool);
   switch (isa) {
@@ -250,7 +250,7 @@
 
 std::unique_ptr<const std::vector<uint8_t>> CreateTrampoline32(InstructionSet isa,
                                                                EntryPointCallingConvention abi,
-                                                               ThreadOffset<4> offset) {
+                                                               ThreadOffset32 offset) {
   ArenaPool pool;
   ArenaAllocator arena(&pool);
   switch (isa) {