commit 55bd45f4ea40b9a0af323f813d07f23d7a8ed397
author Ian Rogers <irogers@google.com> Wed Apr 04 17:31:20 2012 -0700
committer Ian Rogers <irogers@google.com> Wed Apr 04 18:23:36 2012 -0700
tree f315fc79924662e612c6825b6d9b20ba2178853e
parent 5e284224e5525ee0a8494a73d84c8ef86e022a0a

More X86 fixes.

Support for long divides and sparse switches.

Change-Id: I07cdf6a9a2e4c6156cc70a429bf58f22e0e45ef1

src/compiler/codegen/mips/Mips32/Gen.cc

diff --git a/src/compiler/codegen/mips/Mips32/Gen.cc b/src/compiler/codegen/mips/Mips32/Gen.cc
index b810f98..ade2fd8 100644
--- a/src/compiler/codegen/mips/Mips32/Gen.cc
+++ b/src/compiler/codegen/mips/Mips32/Gen.cc
@@ -63,7 +63,8 @@
  * done:
  *
  */
-void genSparseSwitch(CompilationUnit* cUnit, MIR* mir, RegLocation rlSrc)
+void genSparseSwitch(CompilationUnit* cUnit, MIR* mir, RegLocation rlSrc,
+                     LIR* labelList)
 {
     const u2* table = cUnit->insns + mir->offset + mir->dalvikInsn.vB;
     if (cUnit->printMe) {