Store resolved Strings for AOT code in .bss.
And do some related refactorings.
Bug: 20323084
Bug: 30627598
Test: Run ART test suite including gcstress on host and Nexus 9.
Test: Run ART test suite including gcstress with baker CC on host and Nexus 9.
Test: Build aosp_mips64-eng.
Change-Id: I1b12c1570fee8e5da490b47f231050142afcbd1e
diff --git a/compiler/utils/arm/assembler_arm.h b/compiler/utils/arm/assembler_arm.h
index ee5811c..0ed8a35 100644
--- a/compiler/utils/arm/assembler_arm.h
+++ b/compiler/utils/arm/assembler_arm.h
@@ -262,12 +262,6 @@
CHECK_NE(rm, PC);
}
- // LDR(literal) - pc relative load.
- explicit Address(int32_t offset) :
- rn_(PC), rm_(R0), offset_(offset),
- am_(Offset), is_immed_offset_(false), shift_(LSL) {
- }
-
static bool CanHoldLoadOffsetArm(LoadOperandType type, int offset);
static bool CanHoldStoreOffsetArm(StoreOperandType type, int offset);
diff --git a/compiler/utils/arm/assembler_thumb2.cc b/compiler/utils/arm/assembler_thumb2.cc
index 2269ba2..61b7f08 100644
--- a/compiler/utils/arm/assembler_thumb2.cc
+++ b/compiler/utils/arm/assembler_thumb2.cc
@@ -2461,58 +2461,36 @@
}
} else {
// Register shift.
- if (ad.GetRegister() == PC) {
- // PC relative literal encoding.
- int32_t offset = ad.GetOffset();
- if (must_be_32bit || offset < 0 || offset >= (1 << 10) || !load) {
- int32_t up = B23;
- if (offset < 0) {
- offset = -offset;
- up = 0;
- }
- CHECK_LT(offset, (1 << 12));
- int32_t encoding = 0x1f << 27 | 0xf << 16 | B22 | (load ? B20 : 0) |
- offset | up |
- static_cast<uint32_t>(rd) << 12;
- Emit32(encoding);
- } else {
- // 16 bit literal load.
- CHECK_GE(offset, 0);
- CHECK_LT(offset, (1 << 10));
- int32_t encoding = B14 | (load ? B11 : 0) | static_cast<uint32_t>(rd) << 8 | offset >> 2;
- Emit16(encoding);
- }
- } else {
- if (ad.GetShiftCount() != 0) {
- // If there is a shift count this must be 32 bit.
- must_be_32bit = true;
- } else if (IsHighRegister(ad.GetRegisterOffset())) {
- must_be_32bit = true;
- }
+ CHECK_NE(ad.GetRegister(), PC);
+ if (ad.GetShiftCount() != 0) {
+ // If there is a shift count this must be 32 bit.
+ must_be_32bit = true;
+ } else if (IsHighRegister(ad.GetRegisterOffset())) {
+ must_be_32bit = true;
+ }
- if (must_be_32bit) {
- int32_t encoding = 0x1f << 27 | (load ? B20 : 0) | static_cast<uint32_t>(rd) << 12 |
- ad.encodingThumb(true);
- if (half) {
- encoding |= B21;
- } else if (!byte) {
- encoding |= B22;
- }
- if (load && is_signed && (byte || half)) {
- encoding |= B24;
- }
- Emit32(encoding);
- } else {
- // 16 bit register offset.
- int32_t encoding = B14 | B12 | (load ? B11 : 0) | static_cast<uint32_t>(rd) |
- ad.encodingThumb(false);
- if (byte) {
- encoding |= B10;
- } else if (half) {
- encoding |= B9;
- }
- Emit16(encoding);
+ if (must_be_32bit) {
+ int32_t encoding = 0x1f << 27 | (load ? B20 : 0) | static_cast<uint32_t>(rd) << 12 |
+ ad.encodingThumb(true);
+ if (half) {
+ encoding |= B21;
+ } else if (!byte) {
+ encoding |= B22;
}
+ if (load && is_signed && (byte || half)) {
+ encoding |= B24;
+ }
+ Emit32(encoding);
+ } else {
+ // 16 bit register offset.
+ int32_t encoding = B14 | B12 | (load ? B11 : 0) | static_cast<uint32_t>(rd) |
+ ad.encodingThumb(false);
+ if (byte) {
+ encoding |= B10;
+ } else if (half) {
+ encoding |= B9;
+ }
+ Emit16(encoding);
}
}
}