commit 748474146da0c6484fa3dca0a700f612d47550c3
author Elliott Hughes <enh@google.com> Wed Jun 20 18:10:21 2012 -0700
committer Elliott Hughes <enh@google.com> Thu Jun 21 09:14:27 2012 -0700
tree 58837d0fa82d4099eb4b82b2fd3d2bbf4294e4aa
parent 92e3134cd84c134f167175288671a1e6838c908f

Fix a bunch of lint.

There are still about 1800 lint warnings, so don't get too excited...

Change-Id: I2394bd6e750b94060231378b3a7a88b87f70c757

src/compiler/codegen/mips/Assemble.cc

diff --git a/src/compiler/codegen/mips/Assemble.cc b/src/compiler/codegen/mips/Assemble.cc
index 39ad36b..25e13d7 100644
--- a/src/compiler/codegen/mips/Assemble.cc
+++ b/src/compiler/codegen/mips/Assemble.cc
@@ -674,7 +674,7 @@
           break;
         case kFmtDfp: {
           DCHECK(DOUBLEREG(operand));
-          DCHECK((operand & 0x1) == 0);
+          DCHECK_EQ((operand & 0x1), 0U);
           value = ((operand & FP_REG_MASK) << encoder->fieldLoc[i].start) &
               ((1 << (encoder->fieldLoc[i].end + 1)) - 1);
           bits |= value;

src/compiler/codegen/mips/Codegen.h

diff --git a/src/compiler/codegen/mips/Codegen.h b/src/compiler/codegen/mips/Codegen.h
index 6add82a..106c030 100644
--- a/src/compiler/codegen/mips/Codegen.h
+++ b/src/compiler/codegen/mips/Codegen.h
@@ -67,12 +67,11 @@
  * Must use a core register for data types narrower than word (due
  * to possible unaligned load/store.
  */
-inline RegisterClass oatRegClassBySize(OpSize size)
-{
+inline RegisterClass oatRegClassBySize(OpSize size) {
   return (size == kUnsignedHalf ||
           size == kSignedHalf ||
           size == kUnsignedByte ||
-          size == kSignedByte ) ? kCoreReg : kAnyReg;
+          size == kSignedByte) ? kCoreReg : kAnyReg;
 }
 
 /*
@@ -84,7 +83,7 @@
  */
 #if __BYTE_ORDER == __LITTLE_ENDIAN
 inline s4 s4FromSwitchData(const void* switchData) {
-  return *(s4*) switchData;
+  return *reinterpret_cast<const s4*>(switchData);
 }
 #else
 inline s4 s4FromSwitchData(const void* switchData) {