Calling convention support for cross 64/32 compilation.
Add REX support for x86-64 operands.
Change-Id: I093ae26fb8c111d54b8c72166f054984564c04c6
diff --git a/compiler/utils/arm/assembler_arm.cc b/compiler/utils/arm/assembler_arm.cc
index 59eb98e..effc38e 100644
--- a/compiler/utils/arm/assembler_arm.cc
+++ b/compiler/utils/arm/assembler_arm.cc
@@ -1436,6 +1436,8 @@
mov(rd, ShifterOperand(rm, ROR, 0), cond);
}
+constexpr size_t kFramePointerSize = 4;
+
void ArmAssembler::BuildFrame(size_t frame_size, ManagedRegister method_reg,
const std::vector<ManagedRegister>& callee_save_regs,
const ManagedRegisterEntrySpills& entry_spills) {
@@ -1453,8 +1455,8 @@
PushList(push_list);
// Increase frame to required size.
- CHECK_GT(frame_size, pushed_values * kPointerSize); // Must be at least space to push Method*
- size_t adjust = frame_size - (pushed_values * kPointerSize);
+ CHECK_GT(frame_size, pushed_values * kFramePointerSize); // Must at least have space for Method*.
+ size_t adjust = frame_size - (pushed_values * kFramePointerSize);
IncreaseFrameSize(adjust);
// Write out Method*.
@@ -1463,7 +1465,7 @@
// Write out entry spills.
for (size_t i = 0; i < entry_spills.size(); ++i) {
Register reg = entry_spills.at(i).AsArm().AsCoreRegister();
- StoreToOffset(kStoreWord, reg, SP, frame_size + kPointerSize + (i * kPointerSize));
+ StoreToOffset(kStoreWord, reg, SP, frame_size + kFramePointerSize + (i * kFramePointerSize));
}
}
@@ -1480,8 +1482,8 @@
}
// Decrease frame to start of callee saves
- CHECK_GT(frame_size, pop_values * kPointerSize);
- size_t adjust = frame_size - (pop_values * kPointerSize);
+ CHECK_GT(frame_size, pop_values * kFramePointerSize);
+ size_t adjust = frame_size - (pop_values * kFramePointerSize);
DecreaseFrameSize(adjust);
// Pop callee saves and PC