Multi-target Codegen cleanup
Trying to get a bit more consistent in the abstraction layer
naming:
genXXX -> high-level codegen, for ex: genIGet()
opXXX -> instruction-level output, for ex: opRegImm()
Also more fleshing out of the Mips codegen support.
Change-Id: Iafdf397cbb5015bfe3aa2c38680d96c7c05f8bc4
diff --git a/src/compiler/codegen/MethodCodegenDriver.cc b/src/compiler/codegen/MethodCodegenDriver.cc
index 38c2117..a1eeeae 100644
--- a/src/compiler/codegen/MethodCodegenDriver.cc
+++ b/src/compiler/codegen/MethodCodegenDriver.cc
@@ -103,7 +103,7 @@
genShowTarget(cUnit);
}
#if defined(TARGET_MIPS)
- UNIMPLEMENTED(FATAL) << "Need to handle common target register";
+ UNIMPLEMENTED(WARNING) << "Need to handle common target register";
#else
opReg(cUnit, kOpBlx, rLR);
#endif
@@ -325,7 +325,7 @@
if (bb->taken->startOffset <= mir->offset) {
genSuspendTest(cUnit, mir);
}
- genUnconditionalBranch(cUnit, &labelList[bb->taken->id]);
+ opUnconditionalBranch(cUnit, &labelList[bb->taken->id]);
break;
case OP_PACKED_SWITCH:
@@ -830,8 +830,8 @@
* Generate an unconditional branch to the fallthrough block.
*/
if (bb->fallThrough) {
- genUnconditionalBranch(cUnit,
- &labelList[bb->fallThrough->id]);
+ opUnconditionalBranch(cUnit,
+ &labelList[bb->fallThrough->id]);
}
}
return false;
@@ -856,20 +856,20 @@
/* Needed by the ld/st optmizatons */
LIR* oatRegCopyNoInsert(CompilationUnit* cUnit, int rDest, int rSrc)
{
- return genRegCopyNoInsert(cUnit, rDest, rSrc);
+ return opRegCopyNoInsert(cUnit, rDest, rSrc);
}
/* Needed by the register allocator */
void oatRegCopy(CompilationUnit* cUnit, int rDest, int rSrc)
{
- genRegCopy(cUnit, rDest, rSrc);
+ opRegCopy(cUnit, rDest, rSrc);
}
/* Needed by the register allocator */
void oatRegCopyWide(CompilationUnit* cUnit, int destLo, int destHi,
int srcLo, int srcHi)
{
- genRegCopyWide(cUnit, destLo, destHi, srcLo, srcHi);
+ opRegCopyWide(cUnit, destLo, destHi, srcLo, srcHi);
}
void oatFlushRegImpl(CompilationUnit* cUnit, int rBase,