Fix the last users of TARGET_CPU_SMP.
Everyone else assumes SMP.
Change-Id: I7ff7faef46fbec6c67d6e446812d599e473cba39
diff --git a/compiler/dex/quick/arm64/int_arm64.cc b/compiler/dex/quick/arm64/int_arm64.cc
index dfdb76b..0e00698 100644
--- a/compiler/dex/quick/arm64/int_arm64.cc
+++ b/compiler/dex/quick/arm64/int_arm64.cc
@@ -16,6 +16,7 @@
/* This file contains codegen for the Thumb2 ISA. */
+#include "arch/instruction_set_features.h"
#include "arm64_lir.h"
#include "codegen_arm64.h"
#include "dex/quick/mir_to_lir-inl.h"
@@ -978,7 +979,9 @@
}
bool Arm64Mir2Lir::GenMemBarrier(MemBarrierKind barrier_kind) {
-#if ANDROID_SMP != 0
+ if (!cu_->GetInstructionSetFeatures()->IsSmp()) {
+ return false;
+ }
// Start off with using the last LIR as the barrier. If it is not enough, then we will generate one.
LIR* barrier = last_lir_insn_;
@@ -1014,9 +1017,6 @@
DCHECK(!barrier->flags.use_def_invalid);
barrier->u.m.def_mask = &kEncodeAll;
return ret;
-#else
- return false;
-#endif
}
void Arm64Mir2Lir::GenIntToLong(RegLocation rl_dest, RegLocation rl_src) {