Fixes to x86 register promotion and load hoisting.
Fixed a check to ensure that the mvzxb source register can be byte
accessed, not the destination reg.
Disabled branch fusion for x86 since code generation for that is
unimplemented.
Changed regId mask for x86 to allow proper masking of double registers.
Also added more output to the disassembler.
Change-Id: Idc0a949755ec9ae7b6d5dba38caa5ac01fcc5713
diff --git a/src/compiler/codegen/CodegenUtil.cc b/src/compiler/codegen/CodegenUtil.cc
index 428b443..a33a162 100644
--- a/src/compiler/codegen/CodegenUtil.cc
+++ b/src/compiler/codegen/CodegenUtil.cc
@@ -74,14 +74,15 @@
{
u8 seed;
int shift;
- int regId = reg & 0x1f;
#if defined(TARGET_X86)
+ int regId = reg & 0xf;
/*
* Double registers in x86 are just a single FP register
*/
seed = 1;
#else
+ int regId = reg & 0x1f;
/*
* Each double register is equal to a pair of single-precision FP registers
*/