Revert "Rework Quick compiler's register handling"
This reverts commit 2c1ed456dcdb027d097825dd98dbe48c71599b6c.
Change-Id: If88d69ba88e0af0b407ff2240566d7e4545d8a99
diff --git a/compiler/dex/quick/mips/call_mips.cc b/compiler/dex/quick/mips/call_mips.cc
index 88f46fd..a663519 100644
--- a/compiler/dex/quick/mips/call_mips.cc
+++ b/compiler/dex/quick/mips/call_mips.cc
@@ -114,7 +114,7 @@
LIR* exit_branch = OpCmpBranch(kCondEq, rBase, rEnd, NULL);
LoadWordDisp(rBase, 0, r_key);
OpRegImm(kOpAdd, rBase, 8);
- OpCmpBranch(kCondNe, rl_src.reg.GetReg(), r_key, loop_label);
+ OpCmpBranch(kCondNe, rl_src.low_reg, r_key, loop_label);
int r_disp = AllocTemp();
LoadWordDisp(rBase, -4, r_disp);
OpRegRegReg(kOpAdd, r_RA, r_RA, r_disp);
@@ -162,7 +162,7 @@
bool large_bias = false;
int r_key;
if (low_key == 0) {
- r_key = rl_src.reg.GetReg();
+ r_key = rl_src.low_reg;
} else if ((low_key & 0xffff) != low_key) {
r_key = AllocTemp();
LoadConstant(r_key, low_key);
@@ -179,9 +179,9 @@
NewLIR0(kMipsNop);
} else {
if (large_bias) {
- OpRegRegReg(kOpSub, r_key, rl_src.reg.GetReg(), r_key);
+ OpRegRegReg(kOpSub, r_key, rl_src.low_reg, r_key);
} else {
- OpRegRegImm(kOpSub, r_key, rl_src.reg.GetReg(), low_key);
+ OpRegRegImm(kOpSub, r_key, rl_src.low_reg, low_key);
}
}
GenBarrier(); // Scheduling barrier
@@ -263,7 +263,7 @@
int ex_offset = Thread::ExceptionOffset().Int32Value();
RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true);
int reset_reg = AllocTemp();
- LoadWordDisp(rMIPS_SELF, ex_offset, rl_result.reg.GetReg());
+ LoadWordDisp(rMIPS_SELF, ex_offset, rl_result.low_reg);
LoadConstant(reset_reg, 0);
StoreWordDisp(rMIPS_SELF, ex_offset, reset_reg);
FreeTemp(reset_reg);
diff --git a/compiler/dex/quick/mips/codegen_mips.h b/compiler/dex/quick/mips/codegen_mips.h
index 61eb68d..dad8a3b 100644
--- a/compiler/dex/quick/mips/codegen_mips.h
+++ b/compiler/dex/quick/mips/codegen_mips.h
@@ -49,7 +49,7 @@
bool IsFpReg(int reg);
bool SameRegType(int reg1, int reg2);
int AllocTypedTemp(bool fp_hint, int reg_class);
- RegStorage AllocTypedTempWide(bool fp_hint, int reg_class);
+ int AllocTypedTempPair(bool fp_hint, int reg_class);
int S2d(int low_reg, int high_reg);
int TargetReg(SpecialTargetRegister reg);
int GetArgMappingToPhysicalReg(int arg_num);
diff --git a/compiler/dex/quick/mips/fp_mips.cc b/compiler/dex/quick/mips/fp_mips.cc
index cf4f19f..9e2fea9 100644
--- a/compiler/dex/quick/mips/fp_mips.cc
+++ b/compiler/dex/quick/mips/fp_mips.cc
@@ -64,7 +64,7 @@
rl_src1 = LoadValue(rl_src1, kFPReg);
rl_src2 = LoadValue(rl_src2, kFPReg);
rl_result = EvalLoc(rl_dest, kFPReg, true);
- NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg());
+ NewLIR3(op, rl_result.low_reg, rl_src1.low_reg, rl_src2.low_reg);
StoreValue(rl_dest, rl_result);
}
@@ -111,8 +111,8 @@
rl_result = EvalLoc(rl_dest, kFPReg, true);
DCHECK(rl_dest.wide);
DCHECK(rl_result.wide);
- NewLIR3(op, S2d(rl_result.reg.GetReg(), rl_result.reg.GetHighReg()), S2d(rl_src1.reg.GetReg(), rl_src1.reg.GetHighReg()),
- S2d(rl_src2.reg.GetReg(), rl_src2.reg.GetHighReg()));
+ NewLIR3(op, S2d(rl_result.low_reg, rl_result.high_reg), S2d(rl_src1.low_reg, rl_src1.high_reg),
+ S2d(rl_src2.low_reg, rl_src2.high_reg));
StoreValueWide(rl_dest, rl_result);
}
@@ -157,18 +157,18 @@
}
if (rl_src.wide) {
rl_src = LoadValueWide(rl_src, kFPReg);
- src_reg = S2d(rl_src.reg.GetReg(), rl_src.reg.GetHighReg());
+ src_reg = S2d(rl_src.low_reg, rl_src.high_reg);
} else {
rl_src = LoadValue(rl_src, kFPReg);
- src_reg = rl_src.reg.GetReg();
+ src_reg = rl_src.low_reg;
}
if (rl_dest.wide) {
rl_result = EvalLoc(rl_dest, kFPReg, true);
- NewLIR2(op, S2d(rl_result.reg.GetReg(), rl_result.reg.GetHighReg()), src_reg);
+ NewLIR2(op, S2d(rl_result.low_reg, rl_result.high_reg), src_reg);
StoreValueWide(rl_dest, rl_result);
} else {
rl_result = EvalLoc(rl_dest, kFPReg, true);
- NewLIR2(op, rl_result.reg.GetReg(), src_reg);
+ NewLIR2(op, rl_result.low_reg, src_reg);
StoreValue(rl_dest, rl_result);
}
}
@@ -221,7 +221,7 @@
RegLocation rl_result;
rl_src = LoadValue(rl_src, kCoreReg);
rl_result = EvalLoc(rl_dest, kCoreReg, true);
- OpRegRegImm(kOpAdd, rl_result.reg.GetReg(), rl_src.reg.GetReg(), 0x80000000);
+ OpRegRegImm(kOpAdd, rl_result.low_reg, rl_src.low_reg, 0x80000000);
StoreValue(rl_dest, rl_result);
}
@@ -229,8 +229,8 @@
RegLocation rl_result;
rl_src = LoadValueWide(rl_src, kCoreReg);
rl_result = EvalLoc(rl_dest, kCoreReg, true);
- OpRegRegImm(kOpAdd, rl_result.reg.GetHighReg(), rl_src.reg.GetHighReg(), 0x80000000);
- OpRegCopy(rl_result.reg.GetReg(), rl_src.reg.GetReg());
+ OpRegRegImm(kOpAdd, rl_result.high_reg, rl_src.high_reg, 0x80000000);
+ OpRegCopy(rl_result.low_reg, rl_src.low_reg);
StoreValueWide(rl_dest, rl_result);
}
diff --git a/compiler/dex/quick/mips/int_mips.cc b/compiler/dex/quick/mips/int_mips.cc
index fec801b..013041a 100644
--- a/compiler/dex/quick/mips/int_mips.cc
+++ b/compiler/dex/quick/mips/int_mips.cc
@@ -47,13 +47,13 @@
int t0 = AllocTemp();
int t1 = AllocTemp();
RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true);
- NewLIR3(kMipsSlt, t0, rl_src1.reg.GetHighReg(), rl_src2.reg.GetHighReg());
- NewLIR3(kMipsSlt, t1, rl_src2.reg.GetHighReg(), rl_src1.reg.GetHighReg());
- NewLIR3(kMipsSubu, rl_result.reg.GetReg(), t1, t0);
- LIR* branch = OpCmpImmBranch(kCondNe, rl_result.reg.GetReg(), 0, NULL);
- NewLIR3(kMipsSltu, t0, rl_src1.reg.GetReg(), rl_src2.reg.GetReg());
- NewLIR3(kMipsSltu, t1, rl_src2.reg.GetReg(), rl_src1.reg.GetReg());
- NewLIR3(kMipsSubu, rl_result.reg.GetReg(), t1, t0);
+ NewLIR3(kMipsSlt, t0, rl_src1.high_reg, rl_src2.high_reg);
+ NewLIR3(kMipsSlt, t1, rl_src2.high_reg, rl_src1.high_reg);
+ NewLIR3(kMipsSubu, rl_result.low_reg, t1, t0);
+ LIR* branch = OpCmpImmBranch(kCondNe, rl_result.low_reg, 0, NULL);
+ NewLIR3(kMipsSltu, t0, rl_src1.low_reg, rl_src2.low_reg);
+ NewLIR3(kMipsSltu, t1, rl_src2.low_reg, rl_src1.low_reg);
+ NewLIR3(kMipsSubu, rl_result.low_reg, t1, t0);
FreeTemp(t0);
FreeTemp(t1);
LIR* target = NewLIR0(kPseudoTargetLabel);
@@ -228,9 +228,9 @@
NewLIR4(kMipsDiv, r_HI, r_LO, reg1, reg2);
RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true);
if (is_div) {
- NewLIR2(kMipsMflo, rl_result.reg.GetReg(), r_LO);
+ NewLIR2(kMipsMflo, rl_result.low_reg, r_LO);
} else {
- NewLIR2(kMipsMfhi, rl_result.reg.GetReg(), r_HI);
+ NewLIR2(kMipsMfhi, rl_result.low_reg, r_HI);
}
return rl_result;
}
@@ -242,9 +242,9 @@
NewLIR4(kMipsDiv, r_HI, r_LO, reg1, t_reg);
RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true);
if (is_div) {
- NewLIR2(kMipsMflo, rl_result.reg.GetReg(), r_LO);
+ NewLIR2(kMipsMflo, rl_result.low_reg, r_LO);
} else {
- NewLIR2(kMipsMfhi, rl_result.reg.GetReg(), r_HI);
+ NewLIR2(kMipsMfhi, rl_result.low_reg, r_HI);
}
FreeTemp(t_reg);
return rl_result;
@@ -290,7 +290,7 @@
RegLocation rl_address = LoadValue(rl_src_address, kCoreReg);
RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true);
DCHECK(size == kSignedByte);
- LoadBaseDisp(rl_address.reg.GetReg(), 0, rl_result.reg.GetReg(), size, INVALID_SREG);
+ LoadBaseDisp(rl_address.low_reg, 0, rl_result.low_reg, size, INVALID_SREG);
StoreValue(rl_dest, rl_result);
return true;
}
@@ -306,7 +306,7 @@
RegLocation rl_address = LoadValue(rl_src_address, kCoreReg);
DCHECK(size == kSignedByte);
RegLocation rl_value = LoadValue(rl_src_value, kCoreReg);
- StoreBaseDisp(rl_address.reg.GetReg(), 0, rl_value.reg.GetReg(), size);
+ StoreBaseDisp(rl_address.low_reg, 0, rl_value.low_reg, size);
return true;
}
@@ -329,11 +329,11 @@
RegLocation rl_result, int lit,
int first_bit, int second_bit) {
int t_reg = AllocTemp();
- OpRegRegImm(kOpLsl, t_reg, rl_src.reg.GetReg(), second_bit - first_bit);
- OpRegRegReg(kOpAdd, rl_result.reg.GetReg(), rl_src.reg.GetReg(), t_reg);
+ OpRegRegImm(kOpLsl, t_reg, rl_src.low_reg, second_bit - first_bit);
+ OpRegRegReg(kOpAdd, rl_result.low_reg, rl_src.low_reg, t_reg);
FreeTemp(t_reg);
if (first_bit != 0) {
- OpRegRegImm(kOpLsl, rl_result.reg.GetReg(), rl_result.reg.GetReg(), first_bit);
+ OpRegRegImm(kOpLsl, rl_result.low_reg, rl_result.low_reg, first_bit);
}
}
@@ -385,11 +385,11 @@
* addu v1,v1,t1
*/
- OpRegRegReg(kOpAdd, rl_result.reg.GetReg(), rl_src2.reg.GetReg(), rl_src1.reg.GetReg());
+ OpRegRegReg(kOpAdd, rl_result.low_reg, rl_src2.low_reg, rl_src1.low_reg);
int t_reg = AllocTemp();
- OpRegRegReg(kOpAdd, t_reg, rl_src2.reg.GetHighReg(), rl_src1.reg.GetHighReg());
- NewLIR3(kMipsSltu, rl_result.reg.GetHighReg(), rl_result.reg.GetReg(), rl_src2.reg.GetReg());
- OpRegRegReg(kOpAdd, rl_result.reg.GetHighReg(), rl_result.reg.GetHighReg(), t_reg);
+ OpRegRegReg(kOpAdd, t_reg, rl_src2.high_reg, rl_src1.high_reg);
+ NewLIR3(kMipsSltu, rl_result.high_reg, rl_result.low_reg, rl_src2.low_reg);
+ OpRegRegReg(kOpAdd, rl_result.high_reg, rl_result.high_reg, t_reg);
FreeTemp(t_reg);
StoreValueWide(rl_dest, rl_result);
}
@@ -408,10 +408,10 @@
*/
int t_reg = AllocTemp();
- NewLIR3(kMipsSltu, t_reg, rl_src1.reg.GetReg(), rl_src2.reg.GetReg());
- OpRegRegReg(kOpSub, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg());
- OpRegRegReg(kOpSub, rl_result.reg.GetHighReg(), rl_src1.reg.GetHighReg(), rl_src2.reg.GetHighReg());
- OpRegRegReg(kOpSub, rl_result.reg.GetHighReg(), rl_result.reg.GetHighReg(), t_reg);
+ NewLIR3(kMipsSltu, t_reg, rl_src1.low_reg, rl_src2.low_reg);
+ OpRegRegReg(kOpSub, rl_result.low_reg, rl_src1.low_reg, rl_src2.low_reg);
+ OpRegRegReg(kOpSub, rl_result.high_reg, rl_src1.high_reg, rl_src2.high_reg);
+ OpRegRegReg(kOpSub, rl_result.high_reg, rl_result.high_reg, t_reg);
FreeTemp(t_reg);
StoreValueWide(rl_dest, rl_result);
}
@@ -427,11 +427,11 @@
* subu v1,v1,t1
*/
- OpRegReg(kOpNeg, rl_result.reg.GetReg(), rl_src.reg.GetReg());
- OpRegReg(kOpNeg, rl_result.reg.GetHighReg(), rl_src.reg.GetHighReg());
+ OpRegReg(kOpNeg, rl_result.low_reg, rl_src.low_reg);
+ OpRegReg(kOpNeg, rl_result.high_reg, rl_src.high_reg);
int t_reg = AllocTemp();
- NewLIR3(kMipsSltu, t_reg, r_ZERO, rl_result.reg.GetReg());
- OpRegRegReg(kOpSub, rl_result.reg.GetHighReg(), rl_result.reg.GetHighReg(), t_reg);
+ NewLIR3(kMipsSltu, t_reg, r_ZERO, rl_result.low_reg);
+ OpRegRegReg(kOpSub, rl_result.high_reg, rl_result.high_reg, t_reg);
FreeTemp(t_reg);
StoreValueWide(rl_dest, rl_result);
}
@@ -471,7 +471,7 @@
}
/* null object? */
- GenNullCheck(rl_array.s_reg_low, rl_array.reg.GetReg(), opt_flags);
+ GenNullCheck(rl_array.s_reg_low, rl_array.low_reg, opt_flags);
int reg_ptr = AllocTemp();
bool needs_range_check = (!(opt_flags & MIR_IGNORE_RANGE_CHECK));
@@ -479,28 +479,28 @@
if (needs_range_check) {
reg_len = AllocTemp();
/* Get len */
- LoadWordDisp(rl_array.reg.GetReg(), len_offset, reg_len);
+ LoadWordDisp(rl_array.low_reg, len_offset, reg_len);
}
/* reg_ptr -> array data */
- OpRegRegImm(kOpAdd, reg_ptr, rl_array.reg.GetReg(), data_offset);
- FreeTemp(rl_array.reg.GetReg());
+ OpRegRegImm(kOpAdd, reg_ptr, rl_array.low_reg, data_offset);
+ FreeTemp(rl_array.low_reg);
if ((size == kLong) || (size == kDouble)) {
if (scale) {
int r_new_index = AllocTemp();
- OpRegRegImm(kOpLsl, r_new_index, rl_index.reg.GetReg(), scale);
+ OpRegRegImm(kOpLsl, r_new_index, rl_index.low_reg, scale);
OpRegReg(kOpAdd, reg_ptr, r_new_index);
FreeTemp(r_new_index);
} else {
- OpRegReg(kOpAdd, reg_ptr, rl_index.reg.GetReg());
+ OpRegReg(kOpAdd, reg_ptr, rl_index.low_reg);
}
- FreeTemp(rl_index.reg.GetReg());
+ FreeTemp(rl_index.low_reg);
rl_result = EvalLoc(rl_dest, reg_class, true);
if (needs_range_check) {
- GenRegRegCheck(kCondUge, rl_index.reg.GetReg(), reg_len, kThrowArrayBounds);
+ GenRegRegCheck(kCondUge, rl_index.low_reg, reg_len, kThrowArrayBounds);
FreeTemp(reg_len);
}
- LoadBaseDispWide(reg_ptr, 0, rl_result.reg.GetReg(), rl_result.reg.GetHighReg(), INVALID_SREG);
+ LoadBaseDispWide(reg_ptr, 0, rl_result.low_reg, rl_result.high_reg, INVALID_SREG);
FreeTemp(reg_ptr);
StoreValueWide(rl_dest, rl_result);
@@ -508,10 +508,10 @@
rl_result = EvalLoc(rl_dest, reg_class, true);
if (needs_range_check) {
- GenRegRegCheck(kCondUge, rl_index.reg.GetReg(), reg_len, kThrowArrayBounds);
+ GenRegRegCheck(kCondUge, rl_index.low_reg, reg_len, kThrowArrayBounds);
FreeTemp(reg_len);
}
- LoadBaseIndexed(reg_ptr, rl_index.reg.GetReg(), rl_result.reg.GetReg(), scale, size);
+ LoadBaseIndexed(reg_ptr, rl_index.low_reg, rl_result.low_reg, scale, size);
FreeTemp(reg_ptr);
StoreValue(rl_dest, rl_result);
@@ -538,17 +538,17 @@
rl_index = LoadValue(rl_index, kCoreReg);
int reg_ptr = INVALID_REG;
bool allocated_reg_ptr_temp = false;
- if (IsTemp(rl_array.reg.GetReg()) && !card_mark) {
- Clobber(rl_array.reg.GetReg());
- reg_ptr = rl_array.reg.GetReg();
+ if (IsTemp(rl_array.low_reg) && !card_mark) {
+ Clobber(rl_array.low_reg);
+ reg_ptr = rl_array.low_reg;
} else {
reg_ptr = AllocTemp();
- OpRegCopy(reg_ptr, rl_array.reg.GetReg());
+ OpRegCopy(reg_ptr, rl_array.low_reg);
allocated_reg_ptr_temp = true;
}
/* null object? */
- GenNullCheck(rl_array.s_reg_low, rl_array.reg.GetReg(), opt_flags);
+ GenNullCheck(rl_array.s_reg_low, rl_array.low_reg, opt_flags);
bool needs_range_check = (!(opt_flags & MIR_IGNORE_RANGE_CHECK));
int reg_len = INVALID_REG;
@@ -556,7 +556,7 @@
reg_len = AllocTemp();
// NOTE: max live temps(4) here.
/* Get len */
- LoadWordDisp(rl_array.reg.GetReg(), len_offset, reg_len);
+ LoadWordDisp(rl_array.low_reg, len_offset, reg_len);
}
/* reg_ptr -> array data */
OpRegImm(kOpAdd, reg_ptr, data_offset);
@@ -565,34 +565,34 @@
// TUNING: specific wide routine that can handle fp regs
if (scale) {
int r_new_index = AllocTemp();
- OpRegRegImm(kOpLsl, r_new_index, rl_index.reg.GetReg(), scale);
+ OpRegRegImm(kOpLsl, r_new_index, rl_index.low_reg, scale);
OpRegReg(kOpAdd, reg_ptr, r_new_index);
FreeTemp(r_new_index);
} else {
- OpRegReg(kOpAdd, reg_ptr, rl_index.reg.GetReg());
+ OpRegReg(kOpAdd, reg_ptr, rl_index.low_reg);
}
rl_src = LoadValueWide(rl_src, reg_class);
if (needs_range_check) {
- GenRegRegCheck(kCondUge, rl_index.reg.GetReg(), reg_len, kThrowArrayBounds);
+ GenRegRegCheck(kCondUge, rl_index.low_reg, reg_len, kThrowArrayBounds);
FreeTemp(reg_len);
}
- StoreBaseDispWide(reg_ptr, 0, rl_src.reg.GetReg(), rl_src.reg.GetHighReg());
+ StoreBaseDispWide(reg_ptr, 0, rl_src.low_reg, rl_src.high_reg);
} else {
rl_src = LoadValue(rl_src, reg_class);
if (needs_range_check) {
- GenRegRegCheck(kCondUge, rl_index.reg.GetReg(), reg_len, kThrowArrayBounds);
+ GenRegRegCheck(kCondUge, rl_index.low_reg, reg_len, kThrowArrayBounds);
FreeTemp(reg_len);
}
- StoreBaseIndexed(reg_ptr, rl_index.reg.GetReg(), rl_src.reg.GetReg(),
+ StoreBaseIndexed(reg_ptr, rl_index.low_reg, rl_src.low_reg,
scale, size);
}
if (allocated_reg_ptr_temp) {
FreeTemp(reg_ptr);
}
if (card_mark) {
- MarkGCCard(rl_src.reg.GetReg(), rl_array.reg.GetReg());
+ MarkGCCard(rl_src.low_reg, rl_array.low_reg);
}
}
diff --git a/compiler/dex/quick/mips/mips_lir.h b/compiler/dex/quick/mips/mips_lir.h
index 59f442c..00eef96 100644
--- a/compiler/dex/quick/mips/mips_lir.h
+++ b/compiler/dex/quick/mips/mips_lir.h
@@ -141,6 +141,16 @@
#define rMIPS_LR INVALID_REG
#define rMIPS_PC INVALID_REG
+// RegisterLocation templates return values (r_V0, or r_V0/r_V1).
+#define MIPS_LOC_C_RETURN {kLocPhysReg, 0, 0, 0, 0, 0, 0, 0, 1, kVectorNotUsed, r_V0, INVALID_REG, \
+ INVALID_SREG, INVALID_SREG}
+#define MIPS_LOC_C_RETURN_FLOAT {kLocPhysReg, 0, 0, 0, 0, 0, 0, 0, 1, kVectorNotUsed, r_FRESULT0, \
+ INVALID_REG, INVALID_SREG, INVALID_SREG}
+#define MIPS_LOC_C_RETURN_WIDE {kLocPhysReg, 1, 0, 0, 0, 0, 0, 0, 1, kVectorNotUsed, r_RESULT0, \
+ r_RESULT1, INVALID_SREG, INVALID_SREG}
+#define MIPS_LOC_C_RETURN_DOUBLE {kLocPhysReg, 1, 0, 0, 0, 0, 0, 0, 1, kVectorNotUsed, r_FRESULT0, \
+ r_FRESULT1, INVALID_SREG, INVALID_SREG}
+
enum MipsResourceEncodingPos {
kMipsGPReg0 = 0,
kMipsRegSP = 29,
@@ -269,20 +279,6 @@
#define rMIPS_INVOKE_TGT r_T9
#define rMIPS_COUNT INVALID_REG
-// RegisterLocation templates return values (r_V0, or r_V0/r_V1).
-const RegLocation mips_loc_c_return
- {kLocPhysReg, 0, 0, 0, 0, 0, 0, 0, 1, kVectorNotUsed,
- RegStorage(RegStorage::k32BitSolo, r_V0), INVALID_SREG, INVALID_SREG};
-const RegLocation mips_loc_c_return_wide
- {kLocPhysReg, 1, 0, 0, 0, 0, 0, 0, 1, kVectorNotUsed,
- RegStorage(RegStorage::k64BitPair, r_V0, r_V1), INVALID_SREG, INVALID_SREG};
-const RegLocation mips_loc_c_return_float
- {kLocPhysReg, 0, 0, 0, 1, 0, 0, 0, 1, kVectorNotUsed,
- RegStorage(RegStorage::k32BitSolo, r_F0), INVALID_SREG, INVALID_SREG};
-const RegLocation mips_loc_c_return_double
- {kLocPhysReg, 1, 0, 0, 1, 0, 0, 0, 1, kVectorNotUsed,
- RegStorage(RegStorage::k64BitPair, r_F0, r_F1), INVALID_SREG, INVALID_SREG};
-
enum MipsShiftEncodings {
kMipsLsl = 0x0,
kMipsLsr = 0x1,
diff --git a/compiler/dex/quick/mips/target_mips.cc b/compiler/dex/quick/mips/target_mips.cc
index 85c250d..224e8f2 100644
--- a/compiler/dex/quick/mips/target_mips.cc
+++ b/compiler/dex/quick/mips/target_mips.cc
@@ -40,19 +40,23 @@
r_F8, r_F9, r_F10, r_F11, r_F12, r_F13, r_F14, r_F15};
RegLocation MipsMir2Lir::LocCReturn() {
- return mips_loc_c_return;
+ RegLocation res = MIPS_LOC_C_RETURN;
+ return res;
}
RegLocation MipsMir2Lir::LocCReturnWide() {
- return mips_loc_c_return_wide;
+ RegLocation res = MIPS_LOC_C_RETURN_WIDE;
+ return res;
}
RegLocation MipsMir2Lir::LocCReturnFloat() {
- return mips_loc_c_return_float;
+ RegLocation res = MIPS_LOC_C_RETURN_FLOAT;
+ return res;
}
RegLocation MipsMir2Lir::LocCReturnDouble() {
- return mips_loc_c_return_double;
+ RegLocation res = MIPS_LOC_C_RETURN_DOUBLE;
+ return res;
}
// Return a target-dependent special register.
@@ -437,20 +441,27 @@
#endif
}
-// Alloc a pair of core registers, or a double.
-RegStorage MipsMir2Lir::AllocTypedTempWide(bool fp_hint, int reg_class) {
+/*
+ * Alloc a pair of core registers, or a double. Low reg in low byte,
+ * high reg in next byte.
+ */
+int MipsMir2Lir::AllocTypedTempPair(bool fp_hint,
+ int reg_class) {
int high_reg;
int low_reg;
+ int res = 0;
if (((reg_class == kAnyReg) && fp_hint) || (reg_class == kFPReg)) {
low_reg = AllocTempDouble();
high_reg = low_reg + 1;
- return RegStorage(RegStorage::k64BitPair, low_reg, high_reg);
+ res = (low_reg & 0xff) | ((high_reg & 0xff) << 8);
+ return res;
}
low_reg = AllocTemp();
high_reg = AllocTemp();
- return RegStorage(RegStorage::k64BitPair, low_reg, high_reg);
+ res = (low_reg & 0xff) | ((high_reg & 0xff) << 8);
+ return res;
}
int MipsMir2Lir::AllocTypedTemp(bool fp_hint, int reg_class) {
@@ -494,11 +505,11 @@
}
void MipsMir2Lir::FreeRegLocTemps(RegLocation rl_keep, RegLocation rl_free) {
- if ((rl_free.reg.GetReg() != rl_keep.reg.GetReg()) && (rl_free.reg.GetReg() != rl_keep.reg.GetHighReg()) &&
- (rl_free.reg.GetHighReg() != rl_keep.reg.GetReg()) && (rl_free.reg.GetHighReg() != rl_keep.reg.GetHighReg())) {
+ if ((rl_free.low_reg != rl_keep.low_reg) && (rl_free.low_reg != rl_keep.high_reg) &&
+ (rl_free.high_reg != rl_keep.low_reg) && (rl_free.high_reg != rl_keep.high_reg)) {
// No overlap, free both
- FreeTemp(rl_free.reg.GetReg());
- FreeTemp(rl_free.reg.GetHighReg());
+ FreeTemp(rl_free.low_reg);
+ FreeTemp(rl_free.high_reg);
}
}
/*