commit 949c91fb91f40a4a80b2b492913cf8541008975e
author Vladimir Marko <vmarko@google.com> Tue Jan 27 10:48:44 2015 +0000
committer Vladimir Marko <vmarko@google.com> Tue Jan 27 13:41:29 2015 +0000
tree 45c840d1d6fd0ab71d96cb6c61931f468b3a0adf
parent aeb47bb12420e65b4b5f61164e6396ea93734a0a

Revert "ART: Implement X86 hard float (Quick/JNI/Baseline)"

And the 3 Mac build fixes. Fix conflicts in context_x86.* .

This reverts commits
  3d2c8e74c27efee58e24ec31441124f3f21384b9 ,
  34eda1dd66b92a361797c63d57fa19e83c08a1b4 ,
  f601d1954348b71186fa160a0ae6a1f4f1c5aee6 ,
  bc503348a1da573488503cc2819c9e30807bea31 .

Bug: 19150481
Change-Id: I6650ee30a7d261159380fe2119e14379e4dc9970

compiler/utils/x86/assembler_x86.cc

diff --git a/compiler/utils/x86/assembler_x86.cc b/compiler/utils/x86/assembler_x86.cc
index 1f0dba5..3f266fe 100644
--- a/compiler/utils/x86/assembler_x86.cc
+++ b/compiler/utils/x86/assembler_x86.cc
@@ -1537,12 +1537,8 @@
 
   uint32_t reg_offset = 1;
   CHECK_ALIGNED(frame_size, kStackAlignment);
-  int gpr_count = 0;
   for (int i = spill_regs.size() - 1; i >= 0; --i) {
-    x86::X86ManagedRegister spill = spill_regs.at(i).AsX86();
-    DCHECK(spill.IsCpuRegister());
-    pushl(spill.AsCpuRegister());
-    gpr_count++;
+    pushl(spill_regs.at(i).AsX86().AsCpuRegister());
 
     // DW_CFA_advance_loc
     DW_CFA_advance_loc(&cfi_info_, buffer_.Size() - cfi_pc_);
@@ -1556,7 +1552,7 @@
   }
 
   // return address then method on stack
-  int32_t adjust = frame_size - (gpr_count * kFramePointerSize) -
+  int32_t adjust = frame_size - (spill_regs.size() * kFramePointerSize) -
                    sizeof(StackReference<mirror::ArtMethod>) /*method*/ -
                    kFramePointerSize /*return address*/;
   addl(ESP, Immediate(-adjust));
@@ -1576,18 +1572,9 @@
   DW_CFA_def_cfa_offset(&cfi_info_, cfi_cfa_offset_);
 
   for (size_t i = 0; i < entry_spills.size(); ++i) {
-    ManagedRegisterSpill spill = entry_spills.at(i);
-    if (spill.AsX86().IsCpuRegister()) {
-      movl(Address(ESP, frame_size + spill.getSpillOffset()), spill.AsX86().AsCpuRegister());
-    } else {
-      DCHECK(spill.AsX86().IsXmmRegister());
-      if (spill.getSize() == 8) {
-        movsd(Address(ESP, frame_size + spill.getSpillOffset()), spill.AsX86().AsXmmRegister());
-      } else {
-        CHECK_EQ(spill.getSize(), 4);
-        movss(Address(ESP, frame_size + spill.getSpillOffset()), spill.AsX86().AsXmmRegister());
-      }
-    }
+    movl(Address(ESP, frame_size + sizeof(StackReference<mirror::ArtMethod>) +
+                 (i * kFramePointerSize)),
+         entry_spills.at(i).AsX86().AsCpuRegister());
   }
 }
 
@@ -1597,9 +1584,7 @@
   addl(ESP, Immediate(frame_size - (spill_regs.size() * kFramePointerSize) -
                       sizeof(StackReference<mirror::ArtMethod>)));
   for (size_t i = 0; i < spill_regs.size(); ++i) {
-    x86::X86ManagedRegister spill = spill_regs.at(i).AsX86();
-    DCHECK(spill.IsCpuRegister());
-    popl(spill.AsCpuRegister());
+    popl(spill_regs.at(i).AsX86().AsCpuRegister());
   }
   ret();
 }