[Compiler] use Art indentation standard
First of several CLs to bring code closer to alignment with Art and LLVM
standards. Move to 2-space indenting. Sticking with 80-col line
length (which LLVM apparently also wants). LLVM also prefers camel
case names, so keeping Dalvik convention there as well (for now).
Change-Id: I351ab234e640678d97747377cccdd6df0a770f4a
diff --git a/src/compiler/codegen/mips/Mips32/Factory.cc b/src/compiler/codegen/mips/Mips32/Factory.cc
index 1162702..0a7dd9d 100644
--- a/src/compiler/codegen/mips/Mips32/Factory.cc
+++ b/src/compiler/codegen/mips/Mips32/Factory.cc
@@ -52,32 +52,32 @@
#ifdef __mips_hard_float
LIR *fpRegCopy(CompilationUnit *cUnit, int rDest, int rSrc)
{
- int opcode;
- /* must be both DOUBLE or both not DOUBLE */
- DCHECK_EQ(DOUBLEREG(rDest),DOUBLEREG(rSrc));
- if (DOUBLEREG(rDest)) {
- opcode = kMipsFmovd;
+ int opcode;
+ /* must be both DOUBLE or both not DOUBLE */
+ DCHECK_EQ(DOUBLEREG(rDest),DOUBLEREG(rSrc));
+ if (DOUBLEREG(rDest)) {
+ opcode = kMipsFmovd;
+ } else {
+ if (SINGLEREG(rDest)) {
+ if (SINGLEREG(rSrc)) {
+ opcode = kMipsFmovs;
+ } else {
+ /* note the operands are swapped for the mtc1 instr */
+ int tOpnd = rSrc;
+ rSrc = rDest;
+ rDest = tOpnd;
+ opcode = kMipsMtc1;
+ }
} else {
- if (SINGLEREG(rDest)) {
- if (SINGLEREG(rSrc)) {
- opcode = kMipsFmovs;
- } else {
- /* note the operands are swapped for the mtc1 instr */
- int tOpnd = rSrc;
- rSrc = rDest;
- rDest = tOpnd;
- opcode = kMipsMtc1;
- }
- } else {
- DCHECK(SINGLEREG(rSrc));
- opcode = kMipsMfc1;
- }
+ DCHECK(SINGLEREG(rSrc));
+ opcode = kMipsMfc1;
}
- LIR* res = rawLIR(cUnit, cUnit->currentDalvikOffset, opcode, rSrc, rDest);
- if (!(cUnit->disableOpt & (1 << kSafeOptimizations)) && rDest == rSrc) {
- res->flags.isNop = true;
- }
- return res;
+ }
+ LIR* res = rawLIR(cUnit, cUnit->currentDalvikOffset, opcode, rSrc, rDest);
+ if (!(cUnit->disableOpt & (1 << kSafeOptimizations)) && rDest == rSrc) {
+ res->flags.isNop = true;
+ }
+ return res;
}
#endif
@@ -90,445 +90,443 @@
* 1) rDest is freshly returned from oatAllocTemp or
* 2) The codegen is under fixed register usage
*/
-LIR *loadConstantNoClobber(CompilationUnit *cUnit, int rDest,
- int value)
+LIR *loadConstantNoClobber(CompilationUnit *cUnit, int rDest, int value)
{
- LIR *res;
+ LIR *res;
#ifdef __mips_hard_float
- int rDestSave = rDest;
- int isFpReg = FPREG(rDest);
- if (isFpReg) {
- DCHECK(SINGLEREG(rDest));
- rDest = oatAllocTemp(cUnit);
- }
+ int rDestSave = rDest;
+ int isFpReg = FPREG(rDest);
+ if (isFpReg) {
+ DCHECK(SINGLEREG(rDest));
+ rDest = oatAllocTemp(cUnit);
+ }
#endif
- /* See if the value can be constructed cheaply */
- if (value == 0) {
- res = newLIR2(cUnit, kMipsMove, rDest, r_ZERO);
- } else if ((value > 0) && (value <= 65535)) {
- res = newLIR3(cUnit, kMipsOri, rDest, r_ZERO, value);
- } else if ((value < 0) && (value >= -32768)) {
- res = newLIR3(cUnit, kMipsAddiu, rDest, r_ZERO, value);
- } else {
- res = newLIR2(cUnit, kMipsLui, rDest, value>>16);
- if (value & 0xffff)
- newLIR3(cUnit, kMipsOri, rDest, rDest, value);
- }
+ /* See if the value can be constructed cheaply */
+ if (value == 0) {
+ res = newLIR2(cUnit, kMipsMove, rDest, r_ZERO);
+ } else if ((value > 0) && (value <= 65535)) {
+ res = newLIR3(cUnit, kMipsOri, rDest, r_ZERO, value);
+ } else if ((value < 0) && (value >= -32768)) {
+ res = newLIR3(cUnit, kMipsAddiu, rDest, r_ZERO, value);
+ } else {
+ res = newLIR2(cUnit, kMipsLui, rDest, value>>16);
+ if (value & 0xffff)
+ newLIR3(cUnit, kMipsOri, rDest, rDest, value);
+ }
#ifdef __mips_hard_float
- if (isFpReg) {
- newLIR2(cUnit, kMipsMtc1, rDest, rDestSave);
- oatFreeTemp(cUnit, rDest);
- }
+ if (isFpReg) {
+ newLIR2(cUnit, kMipsMtc1, rDest, rDestSave);
+ oatFreeTemp(cUnit, rDest);
+ }
#endif
- return res;
+ return res;
}
LIR *opBranchUnconditional(CompilationUnit *cUnit, OpKind op)
{
- DCHECK_EQ(op, kOpUncondBr);
- return newLIR1(cUnit, kMipsB, 0 /* offset to be patched */ );
+ DCHECK_EQ(op, kOpUncondBr);
+ return newLIR1(cUnit, kMipsB, 0 /* offset to be patched */ );
}
LIR *loadMultiple(CompilationUnit *cUnit, int rBase, int rMask);
LIR *opReg(CompilationUnit *cUnit, OpKind op, int rDestSrc)
{
- MipsOpCode opcode = kMipsNop;
- switch (op) {
- case kOpBlx:
- opcode = kMipsJalr;
- break;
- case kOpBx:
- return newLIR1(cUnit, kMipsJr, rDestSrc);
- break;
- default:
- LOG(FATAL) << "Bad case in opReg";
- }
- return newLIR2(cUnit, opcode, r_RA, rDestSrc);
+ MipsOpCode opcode = kMipsNop;
+ switch (op) {
+ case kOpBlx:
+ opcode = kMipsJalr;
+ break;
+ case kOpBx:
+ return newLIR1(cUnit, kMipsJr, rDestSrc);
+ break;
+ default:
+ LOG(FATAL) << "Bad case in opReg";
+ }
+ return newLIR2(cUnit, opcode, r_RA, rDestSrc);
}
LIR *opRegRegImm(CompilationUnit *cUnit, OpKind op, int rDest,
- int rSrc1, int value);
+ int rSrc1, int value);
LIR *opRegImm(CompilationUnit *cUnit, OpKind op, int rDestSrc1,
- int value)
+ int value)
{
- LIR *res;
- bool neg = (value < 0);
- int absValue = (neg) ? -value : value;
- bool shortForm = (absValue & 0xff) == absValue;
- MipsOpCode opcode = kMipsNop;
- switch (op) {
- case kOpAdd:
- return opRegRegImm(cUnit, op, rDestSrc1, rDestSrc1, value);
- break;
- case kOpSub:
- return opRegRegImm(cUnit, op, rDestSrc1, rDestSrc1, value);
- break;
- default:
- LOG(FATAL) << "Bad case in opRegImm";
- break;
- }
- if (shortForm)
- res = newLIR2(cUnit, opcode, rDestSrc1, absValue);
- else {
- int rScratch = oatAllocTemp(cUnit);
- res = loadConstant(cUnit, rScratch, value);
- if (op == kOpCmp)
- newLIR2(cUnit, opcode, rDestSrc1, rScratch);
- else
- newLIR3(cUnit, opcode, rDestSrc1, rDestSrc1, rScratch);
- }
- return res;
+ LIR *res;
+ bool neg = (value < 0);
+ int absValue = (neg) ? -value : value;
+ bool shortForm = (absValue & 0xff) == absValue;
+ MipsOpCode opcode = kMipsNop;
+ switch (op) {
+ case kOpAdd:
+ return opRegRegImm(cUnit, op, rDestSrc1, rDestSrc1, value);
+ break;
+ case kOpSub:
+ return opRegRegImm(cUnit, op, rDestSrc1, rDestSrc1, value);
+ break;
+ default:
+ LOG(FATAL) << "Bad case in opRegImm";
+ break;
+ }
+ if (shortForm)
+ res = newLIR2(cUnit, opcode, rDestSrc1, absValue);
+ else {
+ int rScratch = oatAllocTemp(cUnit);
+ res = loadConstant(cUnit, rScratch, value);
+ if (op == kOpCmp)
+ newLIR2(cUnit, opcode, rDestSrc1, rScratch);
+ else
+ newLIR3(cUnit, opcode, rDestSrc1, rDestSrc1, rScratch);
+ }
+ return res;
}
LIR *opRegRegReg(CompilationUnit *cUnit, OpKind op, int rDest,
- int rSrc1, int rSrc2)
+ int rSrc1, int rSrc2)
{
- MipsOpCode opcode = kMipsNop;
- switch (op) {
- case kOpAdd:
- opcode = kMipsAddu;
- break;
- case kOpSub:
- opcode = kMipsSubu;
- break;
- case kOpAnd:
- opcode = kMipsAnd;
- break;
- case kOpMul:
- opcode = kMipsMul;
- break;
- case kOpOr:
- opcode = kMipsOr;
- break;
- case kOpXor:
- opcode = kMipsXor;
- break;
- case kOpLsl:
- opcode = kMipsSllv;
- break;
- case kOpLsr:
- opcode = kMipsSrlv;
- break;
- case kOpAsr:
- opcode = kMipsSrav;
- break;
- case kOpAdc:
- case kOpSbc:
- LOG(FATAL) << "No carry bit on MIPS";
- break;
- default:
- LOG(FATAL) << "bad case in opRegRegReg";
- break;
- }
- return newLIR3(cUnit, opcode, rDest, rSrc1, rSrc2);
+ MipsOpCode opcode = kMipsNop;
+ switch (op) {
+ case kOpAdd:
+ opcode = kMipsAddu;
+ break;
+ case kOpSub:
+ opcode = kMipsSubu;
+ break;
+ case kOpAnd:
+ opcode = kMipsAnd;
+ break;
+ case kOpMul:
+ opcode = kMipsMul;
+ break;
+ case kOpOr:
+ opcode = kMipsOr;
+ break;
+ case kOpXor:
+ opcode = kMipsXor;
+ break;
+ case kOpLsl:
+ opcode = kMipsSllv;
+ break;
+ case kOpLsr:
+ opcode = kMipsSrlv;
+ break;
+ case kOpAsr:
+ opcode = kMipsSrav;
+ break;
+ case kOpAdc:
+ case kOpSbc:
+ LOG(FATAL) << "No carry bit on MIPS";
+ break;
+ default:
+ LOG(FATAL) << "bad case in opRegRegReg";
+ break;
+ }
+ return newLIR3(cUnit, opcode, rDest, rSrc1, rSrc2);
}
LIR *opRegRegImm(CompilationUnit *cUnit, OpKind op, int rDest,
- int rSrc1, int value)
+ int rSrc1, int value)
{
- LIR *res;
- MipsOpCode opcode = kMipsNop;
- bool shortForm = true;
+ LIR *res;
+ MipsOpCode opcode = kMipsNop;
+ bool shortForm = true;
- switch (op) {
- case kOpAdd:
- if (IS_SIMM16(value)) {
- opcode = kMipsAddiu;
- }
- else {
- shortForm = false;
- opcode = kMipsAddu;
- }
- break;
- case kOpSub:
- if (IS_SIMM16((-value))) {
- value = -value;
- opcode = kMipsAddiu;
- }
- else {
- shortForm = false;
- opcode = kMipsSubu;
- }
- break;
- case kOpLsl:
- DCHECK(value >= 0 && value <= 31);
- opcode = kMipsSll;
- break;
- case kOpLsr:
- DCHECK(value >= 0 && value <= 31);
- opcode = kMipsSrl;
- break;
- case kOpAsr:
- DCHECK(value >= 0 && value <= 31);
- opcode = kMipsSra;
- break;
- case kOpAnd:
- if (IS_UIMM16((value))) {
- opcode = kMipsAndi;
- }
- else {
- shortForm = false;
- opcode = kMipsAnd;
- }
- break;
- case kOpOr:
- if (IS_UIMM16((value))) {
- opcode = kMipsOri;
- }
- else {
- shortForm = false;
- opcode = kMipsOr;
- }
- break;
- case kOpXor:
- if (IS_UIMM16((value))) {
- opcode = kMipsXori;
- }
- else {
- shortForm = false;
- opcode = kMipsXor;
- }
- break;
- case kOpMul:
- shortForm = false;
- opcode = kMipsMul;
- break;
- default:
- LOG(FATAL) << "Bad case in opRegRegImm";
- break;
- }
+ switch (op) {
+ case kOpAdd:
+ if (IS_SIMM16(value)) {
+ opcode = kMipsAddiu;
+ }
+ else {
+ shortForm = false;
+ opcode = kMipsAddu;
+ }
+ break;
+ case kOpSub:
+ if (IS_SIMM16((-value))) {
+ value = -value;
+ opcode = kMipsAddiu;
+ }
+ else {
+ shortForm = false;
+ opcode = kMipsSubu;
+ }
+ break;
+ case kOpLsl:
+ DCHECK(value >= 0 && value <= 31);
+ opcode = kMipsSll;
+ break;
+ case kOpLsr:
+ DCHECK(value >= 0 && value <= 31);
+ opcode = kMipsSrl;
+ break;
+ case kOpAsr:
+ DCHECK(value >= 0 && value <= 31);
+ opcode = kMipsSra;
+ break;
+ case kOpAnd:
+ if (IS_UIMM16((value))) {
+ opcode = kMipsAndi;
+ }
+ else {
+ shortForm = false;
+ opcode = kMipsAnd;
+ }
+ break;
+ case kOpOr:
+ if (IS_UIMM16((value))) {
+ opcode = kMipsOri;
+ }
+ else {
+ shortForm = false;
+ opcode = kMipsOr;
+ }
+ break;
+ case kOpXor:
+ if (IS_UIMM16((value))) {
+ opcode = kMipsXori;
+ }
+ else {
+ shortForm = false;
+ opcode = kMipsXor;
+ }
+ break;
+ case kOpMul:
+ shortForm = false;
+ opcode = kMipsMul;
+ break;
+ default:
+ LOG(FATAL) << "Bad case in opRegRegImm";
+ break;
+ }
- if (shortForm)
- res = newLIR3(cUnit, opcode, rDest, rSrc1, value);
- else {
- if (rDest != rSrc1) {
- res = loadConstant(cUnit, rDest, value);
- newLIR3(cUnit, opcode, rDest, rSrc1, rDest);
- } else {
- int rScratch = oatAllocTemp(cUnit);
- res = loadConstant(cUnit, rScratch, value);
- newLIR3(cUnit, opcode, rDest, rSrc1, rScratch);
- }
+ if (shortForm)
+ res = newLIR3(cUnit, opcode, rDest, rSrc1, value);
+ else {
+ if (rDest != rSrc1) {
+ res = loadConstant(cUnit, rDest, value);
+ newLIR3(cUnit, opcode, rDest, rSrc1, rDest);
+ } else {
+ int rScratch = oatAllocTemp(cUnit);
+ res = loadConstant(cUnit, rScratch, value);
+ newLIR3(cUnit, opcode, rDest, rSrc1, rScratch);
}
- return res;
+ }
+ return res;
}
-LIR *opRegReg(CompilationUnit *cUnit, OpKind op, int rDestSrc1,
- int rSrc2)
+LIR *opRegReg(CompilationUnit *cUnit, OpKind op, int rDestSrc1, int rSrc2)
{
- MipsOpCode opcode = kMipsNop;
- LIR *res;
- switch (op) {
- case kOpMov:
- opcode = kMipsMove;
- break;
- case kOpMvn:
- return newLIR3(cUnit, kMipsNor, rDestSrc1, rSrc2, r_ZERO);
- case kOpNeg:
- return newLIR3(cUnit, kMipsSubu, rDestSrc1, r_ZERO, rSrc2);
- case kOpAdd:
- case kOpAnd:
- case kOpMul:
- case kOpOr:
- case kOpSub:
- case kOpXor:
- return opRegRegReg(cUnit, op, rDestSrc1, rDestSrc1, rSrc2);
- case kOp2Byte:
+ MipsOpCode opcode = kMipsNop;
+ LIR *res;
+ switch (op) {
+ case kOpMov:
+ opcode = kMipsMove;
+ break;
+ case kOpMvn:
+ return newLIR3(cUnit, kMipsNor, rDestSrc1, rSrc2, r_ZERO);
+ case kOpNeg:
+ return newLIR3(cUnit, kMipsSubu, rDestSrc1, r_ZERO, rSrc2);
+ case kOpAdd:
+ case kOpAnd:
+ case kOpMul:
+ case kOpOr:
+ case kOpSub:
+ case kOpXor:
+ return opRegRegReg(cUnit, op, rDestSrc1, rDestSrc1, rSrc2);
+ case kOp2Byte:
#if __mips_isa_rev>=2
- res = newLIR2(cUnit, kMipsSeb, rDestSrc1, rSrc2);
+ res = newLIR2(cUnit, kMipsSeb, rDestSrc1, rSrc2);
#else
- res = opRegRegImm(cUnit, kOpLsl, rDestSrc1, rSrc2, 24);
- opRegRegImm(cUnit, kOpAsr, rDestSrc1, rDestSrc1, 24);
+ res = opRegRegImm(cUnit, kOpLsl, rDestSrc1, rSrc2, 24);
+ opRegRegImm(cUnit, kOpAsr, rDestSrc1, rDestSrc1, 24);
#endif
- return res;
- case kOp2Short:
+ return res;
+ case kOp2Short:
#if __mips_isa_rev>=2
- res = newLIR2(cUnit, kMipsSeh, rDestSrc1, rSrc2);
+ res = newLIR2(cUnit, kMipsSeh, rDestSrc1, rSrc2);
#else
- res = opRegRegImm(cUnit, kOpLsl, rDestSrc1, rSrc2, 16);
- opRegRegImm(cUnit, kOpAsr, rDestSrc1, rDestSrc1, 16);
+ res = opRegRegImm(cUnit, kOpLsl, rDestSrc1, rSrc2, 16);
+ opRegRegImm(cUnit, kOpAsr, rDestSrc1, rDestSrc1, 16);
#endif
- return res;
- case kOp2Char:
- return newLIR3(cUnit, kMipsAndi, rDestSrc1, rSrc2, 0xFFFF);
- default:
- LOG(FATAL) << "Bad case in opRegReg";
- break;
- }
- return newLIR2(cUnit, opcode, rDestSrc1, rSrc2);
+ return res;
+ case kOp2Char:
+ return newLIR3(cUnit, kMipsAndi, rDestSrc1, rSrc2, 0xFFFF);
+ default:
+ LOG(FATAL) << "Bad case in opRegReg";
+ break;
+ }
+ return newLIR2(cUnit, opcode, rDestSrc1, rSrc2);
}
LIR *loadConstantValueWide(CompilationUnit *cUnit, int rDestLo,
- int rDestHi, int valLo, int valHi)
+ int rDestHi, int valLo, int valHi)
{
- LIR *res;
- res = loadConstantNoClobber(cUnit, rDestLo, valLo);
- loadConstantNoClobber(cUnit, rDestHi, valHi);
- return res;
+ LIR *res;
+ res = loadConstantNoClobber(cUnit, rDestLo, valLo);
+ loadConstantNoClobber(cUnit, rDestHi, valHi);
+ return res;
}
/* Load value from base + scaled index. */
LIR *loadBaseIndexed(CompilationUnit *cUnit, int rBase,
- int rIndex, int rDest, int scale, OpSize size)
+ int rIndex, int rDest, int scale, OpSize size)
{
- LIR *first = NULL;
- LIR *res;
- MipsOpCode opcode = kMipsNop;
- int tReg = oatAllocTemp(cUnit);
+ LIR *first = NULL;
+ LIR *res;
+ MipsOpCode opcode = kMipsNop;
+ int tReg = oatAllocTemp(cUnit);
#ifdef __mips_hard_float
- if (FPREG(rDest)) {
- DCHECK(SINGLEREG(rDest));
- DCHECK((size == kWord) || (size == kSingle));
- size = kSingle;
- } else {
- if (size == kSingle)
- size = kWord;
- }
+ if (FPREG(rDest)) {
+ DCHECK(SINGLEREG(rDest));
+ DCHECK((size == kWord) || (size == kSingle));
+ size = kSingle;
+ } else {
+ if (size == kSingle)
+ size = kWord;
+ }
#endif
- if (!scale) {
- first = newLIR3(cUnit, kMipsAddu, tReg , rBase, rIndex);
- } else {
- first = opRegRegImm(cUnit, kOpLsl, tReg, rIndex, scale);
- newLIR3(cUnit, kMipsAddu, tReg , rBase, tReg);
- }
+ if (!scale) {
+ first = newLIR3(cUnit, kMipsAddu, tReg , rBase, rIndex);
+ } else {
+ first = opRegRegImm(cUnit, kOpLsl, tReg, rIndex, scale);
+ newLIR3(cUnit, kMipsAddu, tReg , rBase, tReg);
+ }
- switch (size) {
+ switch (size) {
#ifdef __mips_hard_float
- case kSingle:
- opcode = kMipsFlwc1;
- break;
+ case kSingle:
+ opcode = kMipsFlwc1;
+ break;
#endif
- case kWord:
- opcode = kMipsLw;
- break;
- case kUnsignedHalf:
- opcode = kMipsLhu;
- break;
- case kSignedHalf:
- opcode = kMipsLh;
- break;
- case kUnsignedByte:
- opcode = kMipsLbu;
- break;
- case kSignedByte:
- opcode = kMipsLb;
- break;
- default:
- LOG(FATAL) << "Bad case in loadBaseIndexed";
- }
+ case kWord:
+ opcode = kMipsLw;
+ break;
+ case kUnsignedHalf:
+ opcode = kMipsLhu;
+ break;
+ case kSignedHalf:
+ opcode = kMipsLh;
+ break;
+ case kUnsignedByte:
+ opcode = kMipsLbu;
+ break;
+ case kSignedByte:
+ opcode = kMipsLb;
+ break;
+ default:
+ LOG(FATAL) << "Bad case in loadBaseIndexed";
+ }
- res = newLIR3(cUnit, opcode, rDest, 0, tReg);
- oatFreeTemp(cUnit, tReg);
- return (first) ? first : res;
+ res = newLIR3(cUnit, opcode, rDest, 0, tReg);
+ oatFreeTemp(cUnit, tReg);
+ return (first) ? first : res;
}
/* store value base base + scaled index. */
LIR *storeBaseIndexed(CompilationUnit *cUnit, int rBase,
- int rIndex, int rSrc, int scale, OpSize size)
+ int rIndex, int rSrc, int scale, OpSize size)
{
- LIR *first = NULL;
- LIR *res;
- MipsOpCode opcode = kMipsNop;
- int rNewIndex = rIndex;
- int tReg = oatAllocTemp(cUnit);
+ LIR *first = NULL;
+ LIR *res;
+ MipsOpCode opcode = kMipsNop;
+ int rNewIndex = rIndex;
+ int tReg = oatAllocTemp(cUnit);
#ifdef __mips_hard_float
- if (FPREG(rSrc)) {
- DCHECK(SINGLEREG(rSrc));
- DCHECK((size == kWord) || (size == kSingle));
- size = kSingle;
- } else {
- if (size == kSingle)
- size = kWord;
- }
+ if (FPREG(rSrc)) {
+ DCHECK(SINGLEREG(rSrc));
+ DCHECK((size == kWord) || (size == kSingle));
+ size = kSingle;
+ } else {
+ if (size == kSingle)
+ size = kWord;
+ }
#endif
- if (!scale) {
- first = newLIR3(cUnit, kMipsAddu, tReg , rBase, rIndex);
- } else {
- first = opRegRegImm(cUnit, kOpLsl, tReg, rIndex, scale);
- newLIR3(cUnit, kMipsAddu, tReg , rBase, tReg);
- }
+ if (!scale) {
+ first = newLIR3(cUnit, kMipsAddu, tReg , rBase, rIndex);
+ } else {
+ first = opRegRegImm(cUnit, kOpLsl, tReg, rIndex, scale);
+ newLIR3(cUnit, kMipsAddu, tReg , rBase, tReg);
+ }
- switch (size) {
+ switch (size) {
#ifdef __mips_hard_float
- case kSingle:
- opcode = kMipsFswc1;
- break;
+ case kSingle:
+ opcode = kMipsFswc1;
+ break;
#endif
- case kWord:
- opcode = kMipsSw;
- break;
- case kUnsignedHalf:
- case kSignedHalf:
- opcode = kMipsSh;
- break;
- case kUnsignedByte:
- case kSignedByte:
- opcode = kMipsSb;
- break;
- default:
- LOG(FATAL) << "Bad case in storeBaseIndexed";
- }
- res = newLIR3(cUnit, opcode, rSrc, 0, tReg);
- oatFreeTemp(cUnit, rNewIndex);
- return first;
+ case kWord:
+ opcode = kMipsSw;
+ break;
+ case kUnsignedHalf:
+ case kSignedHalf:
+ opcode = kMipsSh;
+ break;
+ case kUnsignedByte:
+ case kSignedByte:
+ opcode = kMipsSb;
+ break;
+ default:
+ LOG(FATAL) << "Bad case in storeBaseIndexed";
+ }
+ res = newLIR3(cUnit, opcode, rSrc, 0, tReg);
+ oatFreeTemp(cUnit, rNewIndex);
+ return first;
}
LIR *loadMultiple(CompilationUnit *cUnit, int rBase, int rMask)
{
- int i;
- int loadCnt = 0;
- LIR *res = NULL ;
- genBarrier(cUnit);
+ int i;
+ int loadCnt = 0;
+ LIR *res = NULL ;
+ genBarrier(cUnit);
- for (i = 0; i < 8; i++, rMask >>= 1) {
- if (rMask & 0x1) { /* map r0 to MIPS r_A0 */
- newLIR3(cUnit, kMipsLw, i+r_A0, loadCnt*4, rBase);
- loadCnt++;
- }
+ for (i = 0; i < 8; i++, rMask >>= 1) {
+ if (rMask & 0x1) { /* map r0 to MIPS r_A0 */
+ newLIR3(cUnit, kMipsLw, i+r_A0, loadCnt*4, rBase);
+ loadCnt++;
}
+ }
- if (loadCnt) {/* increment after */
- newLIR3(cUnit, kMipsAddiu, rBase, rBase, loadCnt*4);
- }
+ if (loadCnt) {/* increment after */
+ newLIR3(cUnit, kMipsAddiu, rBase, rBase, loadCnt*4);
+ }
- genBarrier(cUnit);
- return res; /* NULL always returned which should be ok since no callers use it */
+ genBarrier(cUnit);
+ return res; /* NULL always returned which should be ok since no callers use it */
}
LIR *storeMultiple(CompilationUnit *cUnit, int rBase, int rMask)
{
- int i;
- int storeCnt = 0;
- LIR *res = NULL ;
- genBarrier(cUnit);
+ int i;
+ int storeCnt = 0;
+ LIR *res = NULL ;
+ genBarrier(cUnit);
- for (i = 0; i < 8; i++, rMask >>= 1) {
- if (rMask & 0x1) { /* map r0 to MIPS r_A0 */
- newLIR3(cUnit, kMipsSw, i+r_A0, storeCnt*4, rBase);
- storeCnt++;
- }
+ for (i = 0; i < 8; i++, rMask >>= 1) {
+ if (rMask & 0x1) { /* map r0 to MIPS r_A0 */
+ newLIR3(cUnit, kMipsSw, i+r_A0, storeCnt*4, rBase);
+ storeCnt++;
}
+ }
- if (storeCnt) { /* increment after */
- newLIR3(cUnit, kMipsAddiu, rBase, rBase, storeCnt*4);
- }
+ if (storeCnt) { /* increment after */
+ newLIR3(cUnit, kMipsAddiu, rBase, rBase, storeCnt*4);
+ }
- genBarrier(cUnit);
- return res; /* NULL always returned which should be ok since no callers use it */
+ genBarrier(cUnit);
+ return res; /* NULL always returned which should be ok since no callers use it */
}
LIR *loadBaseDispBody(CompilationUnit *cUnit, MIR *mir, int rBase,
- int displacement, int rDest, int rDestHi,
- OpSize size, int sReg)
+ int displacement, int rDest, int rDestHi,
+ OpSize size, int sReg)
/*
* Load value from base + displacement. Optionally perform null check
* on base (which must have an associated sReg and MIR). If not
@@ -538,221 +536,222 @@
* rlp and then restore.
*/
{
- LIR *res;
- LIR *load = NULL;
- LIR *load2 = NULL;
- MipsOpCode opcode = kMipsNop;
- bool shortForm = IS_SIMM16(displacement);
- bool pair = false;
+ LIR *res;
+ LIR *load = NULL;
+ LIR *load2 = NULL;
+ MipsOpCode opcode = kMipsNop;
+ bool shortForm = IS_SIMM16(displacement);
+ bool pair = false;
- switch (size) {
- case kLong:
- case kDouble:
- pair = true;
- opcode = kMipsLw;
+ switch (size) {
+ case kLong:
+ case kDouble:
+ pair = true;
+ opcode = kMipsLw;
#ifdef __mips_hard_float
- if (FPREG(rDest)) {
- opcode = kMipsFlwc1;
- if (DOUBLEREG(rDest)) {
- rDest = rDest - FP_DOUBLE;
- } else {
- DCHECK(FPREG(rDestHi));
- DCHECK(rDest == (rDestHi - 1));
- }
- rDestHi = rDest + 1;
- }
-#endif
- shortForm = IS_SIMM16_2WORD(displacement);
- DCHECK_EQ((displacement & 0x3), 0);
- break;
- case kWord:
- case kSingle:
- opcode = kMipsLw;
-#ifdef __mips_hard_float
- if (FPREG(rDest)) {
- opcode = kMipsFlwc1;
- DCHECK(SINGLEREG(rDest));
- }
-#endif
- DCHECK_EQ((displacement & 0x3), 0);
- break;
- case kUnsignedHalf:
- opcode = kMipsLhu;
- DCHECK_EQ((displacement & 0x1), 0);
- break;
- case kSignedHalf:
- opcode = kMipsLh;
- DCHECK_EQ((displacement & 0x1), 0);
- break;
- case kUnsignedByte:
- opcode = kMipsLbu;
- break;
- case kSignedByte:
- opcode = kMipsLb;
- break;
- default:
- LOG(FATAL) << "Bad case in loadBaseIndexedBody";
- }
-
- if (shortForm) {
- if (!pair) {
- load = res = newLIR3(cUnit, opcode, rDest, displacement, rBase);
+ if (FPREG(rDest)) {
+ opcode = kMipsFlwc1;
+ if (DOUBLEREG(rDest)) {
+ rDest = rDest - FP_DOUBLE;
} else {
- load = res = newLIR3(cUnit, opcode, rDest, displacement + LOWORD_OFFSET, rBase);
- load2 = newLIR3(cUnit, opcode, rDestHi, displacement + HIWORD_OFFSET, rBase);
+ DCHECK(FPREG(rDestHi));
+ DCHECK(rDest == (rDestHi - 1));
}
+ rDestHi = rDest + 1;
+ }
+#endif
+ shortForm = IS_SIMM16_2WORD(displacement);
+ DCHECK_EQ((displacement & 0x3), 0);
+ break;
+ case kWord:
+ case kSingle:
+ opcode = kMipsLw;
+#ifdef __mips_hard_float
+ if (FPREG(rDest)) {
+ opcode = kMipsFlwc1;
+ DCHECK(SINGLEREG(rDest));
+ }
+#endif
+ DCHECK_EQ((displacement & 0x3), 0);
+ break;
+ case kUnsignedHalf:
+ opcode = kMipsLhu;
+ DCHECK_EQ((displacement & 0x1), 0);
+ break;
+ case kSignedHalf:
+ opcode = kMipsLh;
+ DCHECK_EQ((displacement & 0x1), 0);
+ break;
+ case kUnsignedByte:
+ opcode = kMipsLbu;
+ break;
+ case kSignedByte:
+ opcode = kMipsLb;
+ break;
+ default:
+ LOG(FATAL) << "Bad case in loadBaseIndexedBody";
+ }
+
+ if (shortForm) {
+ if (!pair) {
+ load = res = newLIR3(cUnit, opcode, rDest, displacement, rBase);
} else {
- if (pair) {
- int rTmp = oatAllocFreeTemp(cUnit);
- res = opRegRegImm(cUnit, kOpAdd, rTmp, rBase, displacement);
- load = newLIR3(cUnit, opcode, rDest, LOWORD_OFFSET, rTmp);
- load2 = newLIR3(cUnit, opcode, rDestHi, HIWORD_OFFSET, rTmp);
- oatFreeTemp(cUnit, rTmp);
- } else {
- int rTmp = (rBase == rDest) ? oatAllocFreeTemp(cUnit)
- : rDest;
- res = loadConstant(cUnit, rTmp, displacement);
- load = newLIR3(cUnit, opcode, rDest, rBase, rTmp);
- if (rTmp != rDest)
- oatFreeTemp(cUnit, rTmp);
- }
+ load = res = newLIR3(cUnit, opcode, rDest,
+ displacement + LOWORD_OFFSET, rBase);
+ load2 = newLIR3(cUnit, opcode, rDestHi,
+ displacement + HIWORD_OFFSET, rBase);
}
+ } else {
+ if (pair) {
+ int rTmp = oatAllocFreeTemp(cUnit);
+ res = opRegRegImm(cUnit, kOpAdd, rTmp, rBase, displacement);
+ load = newLIR3(cUnit, opcode, rDest, LOWORD_OFFSET, rTmp);
+ load2 = newLIR3(cUnit, opcode, rDestHi, HIWORD_OFFSET, rTmp);
+ oatFreeTemp(cUnit, rTmp);
+ } else {
+ int rTmp = (rBase == rDest) ? oatAllocFreeTemp(cUnit) : rDest;
+ res = loadConstant(cUnit, rTmp, displacement);
+ load = newLIR3(cUnit, opcode, rDest, rBase, rTmp);
+ if (rTmp != rDest)
+ oatFreeTemp(cUnit, rTmp);
+ }
+ }
- if (rBase == rSP) {
- annotateDalvikRegAccess(load, (displacement + (pair ? LOWORD_OFFSET : 0)) >> 2,
- true /* isLoad */, pair /* is64bit */);
- if (pair) {
- annotateDalvikRegAccess(load2, (displacement + HIWORD_OFFSET) >> 2,
- true /* isLoad */, pair /* is64bit */);
- }
+ if (rBase == rSP) {
+ annotateDalvikRegAccess(load,
+ (displacement + (pair ? LOWORD_OFFSET : 0)) >> 2,
+ true /* isLoad */, pair /* is64bit */);
+ if (pair) {
+ annotateDalvikRegAccess(load2, (displacement + HIWORD_OFFSET) >> 2,
+ true /* isLoad */, pair /* is64bit */);
}
- return load;
+ }
+ return load;
}
LIR *loadBaseDisp(CompilationUnit *cUnit, MIR *mir, int rBase,
- int displacement, int rDest, OpSize size,
- int sReg)
+ int displacement, int rDest, OpSize size, int sReg)
{
- return loadBaseDispBody(cUnit, mir, rBase, displacement, rDest, -1,
- size, sReg);
+ return loadBaseDispBody(cUnit, mir, rBase, displacement, rDest, -1,
+ size, sReg);
}
LIR *loadBaseDispWide(CompilationUnit *cUnit, MIR *mir, int rBase,
- int displacement, int rDestLo, int rDestHi,
- int sReg)
+ int displacement, int rDestLo, int rDestHi, int sReg)
{
- return loadBaseDispBody(cUnit, mir, rBase, displacement, rDestLo, rDestHi,
- kLong, sReg);
+ return loadBaseDispBody(cUnit, mir, rBase, displacement, rDestLo, rDestHi,
+ kLong, sReg);
}
LIR *storeBaseDispBody(CompilationUnit *cUnit, int rBase,
- int displacement, int rSrc, int rSrcHi,
- OpSize size)
+ int displacement, int rSrc, int rSrcHi, OpSize size)
{
- LIR *res;
- LIR *store = NULL;
- LIR *store2 = NULL;
- MipsOpCode opcode = kMipsNop;
- bool shortForm = IS_SIMM16(displacement);
- bool pair = false;
+ LIR *res;
+ LIR *store = NULL;
+ LIR *store2 = NULL;
+ MipsOpCode opcode = kMipsNop;
+ bool shortForm = IS_SIMM16(displacement);
+ bool pair = false;
- switch (size) {
- case kLong:
- case kDouble:
- pair = true;
- opcode = kMipsSw;
+ switch (size) {
+ case kLong:
+ case kDouble:
+ pair = true;
+ opcode = kMipsSw;
#ifdef __mips_hard_float
- if (FPREG(rSrc)) {
- opcode = kMipsFswc1;
- if (DOUBLEREG(rSrc)) {
- rSrc = rSrc - FP_DOUBLE;
- } else {
- DCHECK(FPREG(rSrcHi));
- DCHECK_EQ(rSrc, (rSrcHi - 1));
- }
- rSrcHi = rSrc + 1;
- }
-#endif
- shortForm = IS_SIMM16_2WORD(displacement);
- DCHECK_EQ((displacement & 0x3), 0);
- break;
- case kWord:
- case kSingle:
- opcode = kMipsSw;
-#ifdef __mips_hard_float
- if (FPREG(rSrc)) {
- opcode = kMipsFswc1;
- DCHECK(SINGLEREG(rSrc));
- }
-#endif
- DCHECK_EQ((displacement & 0x3), 0);
- break;
- case kUnsignedHalf:
- case kSignedHalf:
- opcode = kMipsSh;
- DCHECK_EQ((displacement & 0x1), 0);
- break;
- case kUnsignedByte:
- case kSignedByte:
- opcode = kMipsSb;
- break;
- default:
- LOG(FATAL) << "Bad case in storeBaseIndexedBody";
- }
-
- if (shortForm) {
- if (!pair) {
- store = res = newLIR3(cUnit, opcode, rSrc, displacement, rBase);
+ if (FPREG(rSrc)) {
+ opcode = kMipsFswc1;
+ if (DOUBLEREG(rSrc)) {
+ rSrc = rSrc - FP_DOUBLE;
} else {
- store = res = newLIR3(cUnit, opcode, rSrc, displacement + LOWORD_OFFSET, rBase);
- store2 = newLIR3(cUnit, opcode, rSrcHi, displacement + HIWORD_OFFSET, rBase);
+ DCHECK(FPREG(rSrcHi));
+ DCHECK_EQ(rSrc, (rSrcHi - 1));
}
+ rSrcHi = rSrc + 1;
+ }
+#endif
+ shortForm = IS_SIMM16_2WORD(displacement);
+ DCHECK_EQ((displacement & 0x3), 0);
+ break;
+ case kWord:
+ case kSingle:
+ opcode = kMipsSw;
+#ifdef __mips_hard_float
+ if (FPREG(rSrc)) {
+ opcode = kMipsFswc1;
+ DCHECK(SINGLEREG(rSrc));
+ }
+#endif
+ DCHECK_EQ((displacement & 0x3), 0);
+ break;
+ case kUnsignedHalf:
+ case kSignedHalf:
+ opcode = kMipsSh;
+ DCHECK_EQ((displacement & 0x1), 0);
+ break;
+ case kUnsignedByte:
+ case kSignedByte:
+ opcode = kMipsSb;
+ break;
+ default:
+ LOG(FATAL) << "Bad case in storeBaseIndexedBody";
+ }
+
+ if (shortForm) {
+ if (!pair) {
+ store = res = newLIR3(cUnit, opcode, rSrc, displacement, rBase);
} else {
- int rScratch = oatAllocTemp(cUnit);
- res = opRegRegImm(cUnit, kOpAdd, rScratch, rBase, displacement);
- if (!pair) {
- store = newLIR3(cUnit, opcode, rSrc, 0, rScratch);
- } else {
- store = newLIR3(cUnit, opcode, rSrc, LOWORD_OFFSET, rScratch);
- store2 = newLIR3(cUnit, opcode, rSrcHi, HIWORD_OFFSET, rScratch);
- }
- oatFreeTemp(cUnit, rScratch);
+ store = res = newLIR3(cUnit, opcode, rSrc, displacement + LOWORD_OFFSET,
+ rBase);
+ store2 = newLIR3(cUnit, opcode, rSrcHi, displacement + HIWORD_OFFSET,
+ rBase);
}
-
- if (rBase == rSP) {
- annotateDalvikRegAccess(store, (displacement + (pair ? LOWORD_OFFSET : 0)) >> 2,
- false /* isLoad */, pair /* is64bit */);
- if (pair) {
- annotateDalvikRegAccess(store2, (displacement + HIWORD_OFFSET) >> 2,
- false /* isLoad */, pair /* is64bit */);
- }
+ } else {
+ int rScratch = oatAllocTemp(cUnit);
+ res = opRegRegImm(cUnit, kOpAdd, rScratch, rBase, displacement);
+ if (!pair) {
+ store = newLIR3(cUnit, opcode, rSrc, 0, rScratch);
+ } else {
+ store = newLIR3(cUnit, opcode, rSrc, LOWORD_OFFSET, rScratch);
+ store2 = newLIR3(cUnit, opcode, rSrcHi, HIWORD_OFFSET, rScratch);
}
+ oatFreeTemp(cUnit, rScratch);
+ }
- return res;
+ if (rBase == rSP) {
+ annotateDalvikRegAccess(store, (displacement + (pair ? LOWORD_OFFSET : 0))
+ >> 2, false /* isLoad */, pair /* is64bit */);
+ if (pair) {
+ annotateDalvikRegAccess(store2, (displacement + HIWORD_OFFSET) >> 2,
+ false /* isLoad */, pair /* is64bit */);
+ }
+ }
+
+ return res;
}
LIR *storeBaseDisp(CompilationUnit *cUnit, int rBase,
- int displacement, int rSrc, OpSize size)
+ int displacement, int rSrc, OpSize size)
{
- return storeBaseDispBody(cUnit, rBase, displacement, rSrc, -1, size);
+ return storeBaseDispBody(cUnit, rBase, displacement, rSrc, -1, size);
}
LIR *storeBaseDispWide(CompilationUnit *cUnit, int rBase,
- int displacement, int rSrcLo, int rSrcHi)
+ int displacement, int rSrcLo, int rSrcHi)
{
- return storeBaseDispBody(cUnit, rBase, displacement, rSrcLo, rSrcHi, kLong);
+ return storeBaseDispBody(cUnit, rBase, displacement, rSrcLo, rSrcHi, kLong);
}
void storePair(CompilationUnit *cUnit, int base, int lowReg, int highReg)
{
- storeWordDisp(cUnit, base, LOWORD_OFFSET, lowReg);
- storeWordDisp(cUnit, base, HIWORD_OFFSET, highReg);
+ storeWordDisp(cUnit, base, LOWORD_OFFSET, lowReg);
+ storeWordDisp(cUnit, base, HIWORD_OFFSET, highReg);
}
void loadPair(CompilationUnit *cUnit, int base, int lowReg, int highReg)
{
- loadWordDisp(cUnit, base, LOWORD_OFFSET , lowReg);
- loadWordDisp(cUnit, base, HIWORD_OFFSET , highReg);
+ loadWordDisp(cUnit, base, LOWORD_OFFSET , lowReg);
+ loadWordDisp(cUnit, base, HIWORD_OFFSET , highReg);
}
} // namespace art
diff --git a/src/compiler/codegen/mips/Mips32/Gen.cc b/src/compiler/codegen/mips/Mips32/Gen.cc
index ade2fd8..46c90f8 100644
--- a/src/compiler/codegen/mips/Mips32/Gen.cc
+++ b/src/compiler/codegen/mips/Mips32/Gen.cc
@@ -64,69 +64,69 @@
*
*/
void genSparseSwitch(CompilationUnit* cUnit, MIR* mir, RegLocation rlSrc,
- LIR* labelList)
+ LIR* labelList)
{
- const u2* table = cUnit->insns + mir->offset + mir->dalvikInsn.vB;
- if (cUnit->printMe) {
- dumpSparseSwitchTable(table);
- }
- // Add the table to the list - we'll process it later
- SwitchTable *tabRec = (SwitchTable *)oatNew(cUnit, sizeof(SwitchTable),
- true, kAllocData);
- tabRec->table = table;
- tabRec->vaddr = mir->offset;
- int elements = table[1];
- tabRec->targets = (LIR* *)oatNew(cUnit, elements * sizeof(LIR*), true,
- kAllocLIR);
- oatInsertGrowableList(cUnit, &cUnit->switchTables, (intptr_t)tabRec);
+ const u2* table = cUnit->insns + mir->offset + mir->dalvikInsn.vB;
+ if (cUnit->printMe) {
+ dumpSparseSwitchTable(table);
+ }
+ // Add the table to the list - we'll process it later
+ SwitchTable *tabRec = (SwitchTable *)oatNew(cUnit, sizeof(SwitchTable),
+ true, kAllocData);
+ tabRec->table = table;
+ tabRec->vaddr = mir->offset;
+ int elements = table[1];
+ tabRec->targets = (LIR* *)oatNew(cUnit, elements * sizeof(LIR*), true,
+ kAllocLIR);
+ oatInsertGrowableList(cUnit, &cUnit->switchTables, (intptr_t)tabRec);
- // The table is composed of 8-byte key/disp pairs
- int byteSize = elements * 8;
+ // The table is composed of 8-byte key/disp pairs
+ int byteSize = elements * 8;
- int sizeHi = byteSize >> 16;
- int sizeLo = byteSize & 0xffff;
+ int sizeHi = byteSize >> 16;
+ int sizeLo = byteSize & 0xffff;
- int rEnd = oatAllocTemp(cUnit);
- if (sizeHi) {
- newLIR2(cUnit, kMipsLui, rEnd, sizeHi);
- }
- // Must prevent code motion for the curr pc pair
- genBarrier(cUnit); // Scheduling barrier
- newLIR0(cUnit, kMipsCurrPC); // Really a jal to .+8
- // Now, fill the branch delay slot
- if (sizeHi) {
- newLIR3(cUnit, kMipsOri, rEnd, rEnd, sizeLo);
- } else {
- newLIR3(cUnit, kMipsOri, rEnd, r_ZERO, sizeLo);
- }
- genBarrier(cUnit); // Scheduling barrier
+ int rEnd = oatAllocTemp(cUnit);
+ if (sizeHi) {
+ newLIR2(cUnit, kMipsLui, rEnd, sizeHi);
+ }
+ // Must prevent code motion for the curr pc pair
+ genBarrier(cUnit); // Scheduling barrier
+ newLIR0(cUnit, kMipsCurrPC); // Really a jal to .+8
+ // Now, fill the branch delay slot
+ if (sizeHi) {
+ newLIR3(cUnit, kMipsOri, rEnd, rEnd, sizeLo);
+ } else {
+ newLIR3(cUnit, kMipsOri, rEnd, r_ZERO, sizeLo);
+ }
+ genBarrier(cUnit); // Scheduling barrier
- // Construct BaseLabel and set up table base register
- LIR* baseLabel = newLIR0(cUnit, kPseudoTargetLabel);
- // Remember base label so offsets can be computed later
- tabRec->anchor = baseLabel;
- int rBase = oatAllocTemp(cUnit);
- newLIR4(cUnit, kMipsDelta, rBase, 0, (intptr_t)baseLabel, (intptr_t)tabRec);
- opRegRegReg(cUnit, kOpAdd, rEnd, rEnd, rBase);
+ // Construct BaseLabel and set up table base register
+ LIR* baseLabel = newLIR0(cUnit, kPseudoTargetLabel);
+ // Remember base label so offsets can be computed later
+ tabRec->anchor = baseLabel;
+ int rBase = oatAllocTemp(cUnit);
+ newLIR4(cUnit, kMipsDelta, rBase, 0, (intptr_t)baseLabel, (intptr_t)tabRec);
+ opRegRegReg(cUnit, kOpAdd, rEnd, rEnd, rBase);
- // Grab switch test value
- rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
+ // Grab switch test value
+ rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
- // Test loop
- int rKey = oatAllocTemp(cUnit);
- LIR* loopLabel = newLIR0(cUnit, kPseudoTargetLabel);
- LIR* exitBranch = opCmpBranch(cUnit , kCondEq, rBase, rEnd, NULL);
- loadWordDisp(cUnit, rBase, 0, rKey);
- opRegImm(cUnit, kOpAdd, rBase, 8);
- opCmpBranch(cUnit, kCondNe, rlSrc.lowReg, rKey, loopLabel);
- int rDisp = oatAllocTemp(cUnit);
- loadWordDisp(cUnit, rBase, -4, rDisp);
- opRegRegReg(cUnit, kOpAdd, r_RA, r_RA, rDisp);
- opReg(cUnit, kOpBx, r_RA);
+ // Test loop
+ int rKey = oatAllocTemp(cUnit);
+ LIR* loopLabel = newLIR0(cUnit, kPseudoTargetLabel);
+ LIR* exitBranch = opCmpBranch(cUnit , kCondEq, rBase, rEnd, NULL);
+ loadWordDisp(cUnit, rBase, 0, rKey);
+ opRegImm(cUnit, kOpAdd, rBase, 8);
+ opCmpBranch(cUnit, kCondNe, rlSrc.lowReg, rKey, loopLabel);
+ int rDisp = oatAllocTemp(cUnit);
+ loadWordDisp(cUnit, rBase, -4, rDisp);
+ opRegRegReg(cUnit, kOpAdd, r_RA, r_RA, rDisp);
+ opReg(cUnit, kOpBx, r_RA);
- // Loop exit
- LIR* exitLabel = newLIR0(cUnit, kPseudoTargetLabel);
- exitBranch->target = exitLabel;
+ // Loop exit
+ LIR* exitLabel = newLIR0(cUnit, kPseudoTargetLabel);
+ exitBranch->target = exitLabel;
}
/*
@@ -144,75 +144,75 @@
*/
void genPackedSwitch(CompilationUnit* cUnit, MIR* mir, RegLocation rlSrc)
{
- const u2* table = cUnit->insns + mir->offset + mir->dalvikInsn.vB;
- if (cUnit->printMe) {
- dumpPackedSwitchTable(table);
- }
- // Add the table to the list - we'll process it later
- SwitchTable *tabRec = (SwitchTable *)oatNew(cUnit, sizeof(SwitchTable),
- true, kAllocData);
- tabRec->table = table;
- tabRec->vaddr = mir->offset;
- int size = table[1];
- tabRec->targets = (LIR* *)oatNew(cUnit, size * sizeof(LIR*), true,
- kAllocLIR);
- oatInsertGrowableList(cUnit, &cUnit->switchTables, (intptr_t)tabRec);
+ const u2* table = cUnit->insns + mir->offset + mir->dalvikInsn.vB;
+ if (cUnit->printMe) {
+ dumpPackedSwitchTable(table);
+ }
+ // Add the table to the list - we'll process it later
+ SwitchTable *tabRec = (SwitchTable *)oatNew(cUnit, sizeof(SwitchTable),
+ true, kAllocData);
+ tabRec->table = table;
+ tabRec->vaddr = mir->offset;
+ int size = table[1];
+ tabRec->targets = (LIR* *)oatNew(cUnit, size * sizeof(LIR*), true,
+ kAllocLIR);
+ oatInsertGrowableList(cUnit, &cUnit->switchTables, (intptr_t)tabRec);
- // Get the switch value
- rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
+ // Get the switch value
+ rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
- // Prepare the bias. If too big, handle 1st stage here
- int lowKey = s4FromSwitchData(&table[2]);
- bool largeBias = false;
- int rKey;
- if (lowKey == 0) {
- rKey = rlSrc.lowReg;
- } else if ((lowKey & 0xffff) != lowKey) {
- rKey = oatAllocTemp(cUnit);
- loadConstant(cUnit, rKey, lowKey);
- largeBias = true;
+ // Prepare the bias. If too big, handle 1st stage here
+ int lowKey = s4FromSwitchData(&table[2]);
+ bool largeBias = false;
+ int rKey;
+ if (lowKey == 0) {
+ rKey = rlSrc.lowReg;
+ } else if ((lowKey & 0xffff) != lowKey) {
+ rKey = oatAllocTemp(cUnit);
+ loadConstant(cUnit, rKey, lowKey);
+ largeBias = true;
+ } else {
+ rKey = oatAllocTemp(cUnit);
+ }
+
+ // Must prevent code motion for the curr pc pair
+ genBarrier(cUnit);
+ newLIR0(cUnit, kMipsCurrPC); // Really a jal to .+8
+ // Now, fill the branch delay slot with bias strip
+ if (lowKey == 0) {
+ newLIR0(cUnit, kMipsNop);
+ } else {
+ if (largeBias) {
+ opRegRegReg(cUnit, kOpSub, rKey, rlSrc.lowReg, rKey);
} else {
- rKey = oatAllocTemp(cUnit);
+ opRegRegImm(cUnit, kOpSub, rKey, rlSrc.lowReg, lowKey);
}
+ }
+ genBarrier(cUnit); // Scheduling barrier
- // Must prevent code motion for the curr pc pair
- genBarrier(cUnit);
- newLIR0(cUnit, kMipsCurrPC); // Really a jal to .+8
- // Now, fill the branch delay slot with bias strip
- if (lowKey == 0) {
- newLIR0(cUnit, kMipsNop);
- } else {
- if (largeBias) {
- opRegRegReg(cUnit, kOpSub, rKey, rlSrc.lowReg, rKey);
- } else {
- opRegRegImm(cUnit, kOpSub, rKey, rlSrc.lowReg, lowKey);
- }
- }
- genBarrier(cUnit); // Scheduling barrier
+ // Construct BaseLabel and set up table base register
+ LIR* baseLabel = newLIR0(cUnit, kPseudoTargetLabel);
+ // Remember base label so offsets can be computed later
+ tabRec->anchor = baseLabel;
- // Construct BaseLabel and set up table base register
- LIR* baseLabel = newLIR0(cUnit, kPseudoTargetLabel);
- // Remember base label so offsets can be computed later
- tabRec->anchor = baseLabel;
+ // Bounds check - if < 0 or >= size continue following switch
+ LIR* branchOver = opCmpImmBranch(cUnit, kCondHi, rKey, size-1, NULL);
- // Bounds check - if < 0 or >= size continue following switch
- LIR* branchOver = opCmpImmBranch(cUnit, kCondHi, rKey, size-1, NULL);
+ // Materialize the table base pointer
+ int rBase = oatAllocTemp(cUnit);
+ newLIR4(cUnit, kMipsDelta, rBase, 0, (intptr_t)baseLabel, (intptr_t)tabRec);
- // Materialize the table base pointer
- int rBase = oatAllocTemp(cUnit);
- newLIR4(cUnit, kMipsDelta, rBase, 0, (intptr_t)baseLabel, (intptr_t)tabRec);
+ // Load the displacement from the switch table
+ int rDisp = oatAllocTemp(cUnit);
+ loadBaseIndexed(cUnit, rBase, rKey, rDisp, 2, kWord);
- // Load the displacement from the switch table
- int rDisp = oatAllocTemp(cUnit);
- loadBaseIndexed(cUnit, rBase, rKey, rDisp, 2, kWord);
+ // Add to r_AP and go
+ opRegRegReg(cUnit, kOpAdd, r_RA, r_RA, rDisp);
+ opReg(cUnit, kOpBx, r_RA);
- // Add to r_AP and go
- opRegRegReg(cUnit, kOpAdd, r_RA, r_RA, rDisp);
- opReg(cUnit, kOpBx, r_RA);
-
- /* branchOver target here */
- LIR* target = newLIR0(cUnit, kPseudoTargetLabel);
- branchOver->target = (LIR*)target;
+ /* branchOver target here */
+ LIR* target = newLIR0(cUnit, kPseudoTargetLabel);
+ branchOver->target = (LIR*)target;
}
/*
@@ -227,60 +227,58 @@
*/
void genFillArrayData(CompilationUnit* cUnit, MIR* mir, RegLocation rlSrc)
{
- const u2* table = cUnit->insns + mir->offset + mir->dalvikInsn.vB;
- // Add the table to the list - we'll process it later
- FillArrayData *tabRec = (FillArrayData *)
- oatNew(cUnit, sizeof(FillArrayData), true, kAllocData);
- tabRec->table = table;
- tabRec->vaddr = mir->offset;
- u2 width = tabRec->table[1];
- u4 size = tabRec->table[2] | (((u4)tabRec->table[3]) << 16);
- tabRec->size = (size * width) + 8;
+ const u2* table = cUnit->insns + mir->offset + mir->dalvikInsn.vB;
+ // Add the table to the list - we'll process it later
+ FillArrayData *tabRec = (FillArrayData *)
+ oatNew(cUnit, sizeof(FillArrayData), true, kAllocData);
+ tabRec->table = table;
+ tabRec->vaddr = mir->offset;
+ u2 width = tabRec->table[1];
+ u4 size = tabRec->table[2] | (((u4)tabRec->table[3]) << 16);
+ tabRec->size = (size * width) + 8;
- oatInsertGrowableList(cUnit, &cUnit->fillArrayData, (intptr_t)tabRec);
+ oatInsertGrowableList(cUnit, &cUnit->fillArrayData, (intptr_t)tabRec);
- // Making a call - use explicit registers
- oatFlushAllRegs(cUnit); /* Everything to home location */
- oatLockCallTemps(cUnit);
- loadValueDirectFixed(cUnit, rlSrc, rARG0);
+ // Making a call - use explicit registers
+ oatFlushAllRegs(cUnit); /* Everything to home location */
+ oatLockCallTemps(cUnit);
+ loadValueDirectFixed(cUnit, rlSrc, rARG0);
- // Must prevent code motion for the curr pc pair
- genBarrier(cUnit);
- newLIR0(cUnit, kMipsCurrPC); // Really a jal to .+8
- // Now, fill the branch delay slot with the helper load
- int rTgt = loadHelper(cUnit, ENTRYPOINT_OFFSET(pHandleFillArrayDataFromCode));
- genBarrier(cUnit); // Scheduling barrier
+ // Must prevent code motion for the curr pc pair
+ genBarrier(cUnit);
+ newLIR0(cUnit, kMipsCurrPC); // Really a jal to .+8
+ // Now, fill the branch delay slot with the helper load
+ int rTgt = loadHelper(cUnit, ENTRYPOINT_OFFSET(pHandleFillArrayDataFromCode));
+ genBarrier(cUnit); // Scheduling barrier
- // Construct BaseLabel and set up table base register
- LIR* baseLabel = newLIR0(cUnit, kPseudoTargetLabel);
+ // Construct BaseLabel and set up table base register
+ LIR* baseLabel = newLIR0(cUnit, kPseudoTargetLabel);
- // Materialize a pointer to the fill data image
- newLIR4(cUnit, kMipsDelta, rARG1, 0, (intptr_t)baseLabel, (intptr_t)tabRec);
+ // Materialize a pointer to the fill data image
+ newLIR4(cUnit, kMipsDelta, rARG1, 0, (intptr_t)baseLabel, (intptr_t)tabRec);
- // And go...
- oatClobberCalleeSave(cUnit);
- opReg(cUnit, kOpBlx, rTgt); // ( array*, fill_data* )
+ // And go...
+ oatClobberCalleeSave(cUnit);
+ opReg(cUnit, kOpBlx, rTgt); // ( array*, fill_data* )
}
void genNegFloat(CompilationUnit *cUnit, RegLocation rlDest, RegLocation rlSrc)
{
- RegLocation rlResult;
- rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
- rlResult = oatEvalLoc(cUnit, rlDest, kCoreReg, true);
- opRegRegImm(cUnit, kOpAdd, rlResult.lowReg,
- rlSrc.lowReg, 0x80000000);
- storeValue(cUnit, rlDest, rlResult);
+ RegLocation rlResult;
+ rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
+ rlResult = oatEvalLoc(cUnit, rlDest, kCoreReg, true);
+ opRegRegImm(cUnit, kOpAdd, rlResult.lowReg, rlSrc.lowReg, 0x80000000);
+ storeValue(cUnit, rlDest, rlResult);
}
void genNegDouble(CompilationUnit *cUnit, RegLocation rlDest, RegLocation rlSrc)
{
- RegLocation rlResult;
- rlSrc = loadValueWide(cUnit, rlSrc, kCoreReg);
- rlResult = oatEvalLoc(cUnit, rlDest, kCoreReg, true);
- opRegRegImm(cUnit, kOpAdd, rlResult.highReg, rlSrc.highReg,
- 0x80000000);
- opRegCopy(cUnit, rlResult.lowReg, rlSrc.lowReg);
- storeValueWide(cUnit, rlDest, rlResult);
+ RegLocation rlResult;
+ rlSrc = loadValueWide(cUnit, rlSrc, kCoreReg);
+ rlResult = oatEvalLoc(cUnit, rlDest, kCoreReg, true);
+ opRegRegImm(cUnit, kOpAdd, rlResult.highReg, rlSrc.highReg, 0x80000000);
+ opRegCopy(cUnit, rlResult.lowReg, rlSrc.lowReg);
+ storeValueWide(cUnit, rlDest, rlResult);
}
/*
@@ -288,14 +286,14 @@
*/
void genMonitorEnter(CompilationUnit* cUnit, MIR* mir, RegLocation rlSrc)
{
- oatFlushAllRegs(cUnit);
- loadValueDirectFixed(cUnit, rlSrc, rARG0); // Get obj
- oatLockCallTemps(cUnit); // Prepare for explicit register usage
- genNullCheck(cUnit, rlSrc.sRegLow, rARG0, mir);
- // Go expensive route - artLockObjectFromCode(self, obj);
- int rTgt = loadHelper(cUnit, ENTRYPOINT_OFFSET(pLockObjectFromCode));
- oatClobberCalleeSave(cUnit);
- opReg(cUnit, kOpBlx, rTgt);
+ oatFlushAllRegs(cUnit);
+ loadValueDirectFixed(cUnit, rlSrc, rARG0); // Get obj
+ oatLockCallTemps(cUnit); // Prepare for explicit register usage
+ genNullCheck(cUnit, rlSrc.sRegLow, rARG0, mir);
+ // Go expensive route - artLockObjectFromCode(self, obj);
+ int rTgt = loadHelper(cUnit, ENTRYPOINT_OFFSET(pLockObjectFromCode));
+ oatClobberCalleeSave(cUnit);
+ opReg(cUnit, kOpBlx, rTgt);
}
/*
@@ -303,14 +301,14 @@
*/
void genMonitorExit(CompilationUnit* cUnit, MIR* mir, RegLocation rlSrc)
{
- oatFlushAllRegs(cUnit);
- loadValueDirectFixed(cUnit, rlSrc, rARG0); // Get obj
- oatLockCallTemps(cUnit); // Prepare for explicit register usage
- genNullCheck(cUnit, rlSrc.sRegLow, rARG0, mir);
- // Go expensive route - UnlockObjectFromCode(obj);
- int rTgt = loadHelper(cUnit, ENTRYPOINT_OFFSET(pUnlockObjectFromCode));
- oatClobberCalleeSave(cUnit);
- opReg(cUnit, kOpBlx, rTgt);
+ oatFlushAllRegs(cUnit);
+ loadValueDirectFixed(cUnit, rlSrc, rARG0); // Get obj
+ oatLockCallTemps(cUnit); // Prepare for explicit register usage
+ genNullCheck(cUnit, rlSrc.sRegLow, rARG0, mir);
+ // Go expensive route - UnlockObjectFromCode(obj);
+ int rTgt = loadHelper(cUnit, ENTRYPOINT_OFFSET(pUnlockObjectFromCode));
+ oatClobberCalleeSave(cUnit);
+ opReg(cUnit, kOpBlx, rTgt);
}
/*
@@ -330,190 +328,190 @@
*
*/
void genCmpLong(CompilationUnit* cUnit, MIR* mir, RegLocation rlDest,
- RegLocation rlSrc1, RegLocation rlSrc2)
+ RegLocation rlSrc1, RegLocation rlSrc2)
{
- rlSrc1 = loadValueWide(cUnit, rlSrc1, kCoreReg);
- rlSrc2 = loadValueWide(cUnit, rlSrc2, kCoreReg);
- int t0 = oatAllocTemp(cUnit);
- int t1 = oatAllocTemp(cUnit);
- RegLocation rlResult = oatEvalLoc(cUnit, rlDest, kCoreReg, true);
- newLIR3(cUnit, kMipsSlt, t0, rlSrc1.highReg, rlSrc2.highReg);
- newLIR3(cUnit, kMipsSlt, t1, rlSrc2.highReg, rlSrc1.highReg);
- newLIR3(cUnit, kMipsSubu, rlResult.lowReg, t1, t0);
- LIR* branch = opCmpImmBranch(cUnit, kCondNe, rlResult.lowReg, 0, NULL);
- newLIR3(cUnit, kMipsSltu, t0, rlSrc1.lowReg, rlSrc2.lowReg);
- newLIR3(cUnit, kMipsSltu, t1, rlSrc2.lowReg, rlSrc1.lowReg);
- newLIR3(cUnit, kMipsSubu, rlResult.lowReg, t1, t0);
- oatFreeTemp(cUnit, t0);
- oatFreeTemp(cUnit, t1);
- LIR* target = newLIR0(cUnit, kPseudoTargetLabel);
- branch->target = (LIR*)target;
- storeValue(cUnit, rlDest, rlResult);
+ rlSrc1 = loadValueWide(cUnit, rlSrc1, kCoreReg);
+ rlSrc2 = loadValueWide(cUnit, rlSrc2, kCoreReg);
+ int t0 = oatAllocTemp(cUnit);
+ int t1 = oatAllocTemp(cUnit);
+ RegLocation rlResult = oatEvalLoc(cUnit, rlDest, kCoreReg, true);
+ newLIR3(cUnit, kMipsSlt, t0, rlSrc1.highReg, rlSrc2.highReg);
+ newLIR3(cUnit, kMipsSlt, t1, rlSrc2.highReg, rlSrc1.highReg);
+ newLIR3(cUnit, kMipsSubu, rlResult.lowReg, t1, t0);
+ LIR* branch = opCmpImmBranch(cUnit, kCondNe, rlResult.lowReg, 0, NULL);
+ newLIR3(cUnit, kMipsSltu, t0, rlSrc1.lowReg, rlSrc2.lowReg);
+ newLIR3(cUnit, kMipsSltu, t1, rlSrc2.lowReg, rlSrc1.lowReg);
+ newLIR3(cUnit, kMipsSubu, rlResult.lowReg, t1, t0);
+ oatFreeTemp(cUnit, t0);
+ oatFreeTemp(cUnit, t1);
+ LIR* target = newLIR0(cUnit, kPseudoTargetLabel);
+ branch->target = (LIR*)target;
+ storeValue(cUnit, rlDest, rlResult);
}
LIR* opCmpBranch(CompilationUnit* cUnit, ConditionCode cond, int src1,
- int src2, LIR* target)
+ int src2, LIR* target)
{
- LIR* branch;
- MipsOpCode sltOp;
- MipsOpCode brOp;
- bool cmpZero = false;
- bool swapped = false;
- switch (cond) {
- case kCondEq:
- brOp = kMipsBeq;
- cmpZero = true;
- break;
- case kCondNe:
- brOp = kMipsBne;
- cmpZero = true;
- break;
- case kCondCc:
- sltOp = kMipsSltu;
- brOp = kMipsBnez;
- break;
- case kCondCs:
- sltOp = kMipsSltu;
- brOp = kMipsBeqz;
- break;
- case kCondGe:
- sltOp = kMipsSlt;
- brOp = kMipsBeqz;
- break;
- case kCondGt:
- sltOp = kMipsSlt;
- brOp = kMipsBnez;
- swapped = true;
- break;
- case kCondLe:
- sltOp = kMipsSlt;
- brOp = kMipsBeqz;
- swapped = true;
- break;
- case kCondLt:
- sltOp = kMipsSlt;
- brOp = kMipsBnez;
- break;
- case kCondHi: // Gtu
- sltOp = kMipsSltu;
- brOp = kMipsBnez;
- swapped = true;
- break;
- default:
- LOG(FATAL) << "No support for ConditionCode: " << (int) cond;
- return NULL;
- }
- if (cmpZero) {
- branch = newLIR2(cUnit, brOp, src1, src2);
+ LIR* branch;
+ MipsOpCode sltOp;
+ MipsOpCode brOp;
+ bool cmpZero = false;
+ bool swapped = false;
+ switch (cond) {
+ case kCondEq:
+ brOp = kMipsBeq;
+ cmpZero = true;
+ break;
+ case kCondNe:
+ brOp = kMipsBne;
+ cmpZero = true;
+ break;
+ case kCondCc:
+ sltOp = kMipsSltu;
+ brOp = kMipsBnez;
+ break;
+ case kCondCs:
+ sltOp = kMipsSltu;
+ brOp = kMipsBeqz;
+ break;
+ case kCondGe:
+ sltOp = kMipsSlt;
+ brOp = kMipsBeqz;
+ break;
+ case kCondGt:
+ sltOp = kMipsSlt;
+ brOp = kMipsBnez;
+ swapped = true;
+ break;
+ case kCondLe:
+ sltOp = kMipsSlt;
+ brOp = kMipsBeqz;
+ swapped = true;
+ break;
+ case kCondLt:
+ sltOp = kMipsSlt;
+ brOp = kMipsBnez;
+ break;
+ case kCondHi: // Gtu
+ sltOp = kMipsSltu;
+ brOp = kMipsBnez;
+ swapped = true;
+ break;
+ default:
+ LOG(FATAL) << "No support for ConditionCode: " << (int) cond;
+ return NULL;
+ }
+ if (cmpZero) {
+ branch = newLIR2(cUnit, brOp, src1, src2);
+ } else {
+ int tReg = oatAllocTemp(cUnit);
+ if (swapped) {
+ newLIR3(cUnit, sltOp, tReg, src2, src1);
} else {
- int tReg = oatAllocTemp(cUnit);
- if (swapped) {
- newLIR3(cUnit, sltOp, tReg, src2, src1);
- } else {
- newLIR3(cUnit, sltOp, tReg, src1, src2);
- }
- branch = newLIR1(cUnit, brOp, tReg);
- oatFreeTemp(cUnit, tReg);
+ newLIR3(cUnit, sltOp, tReg, src1, src2);
}
- branch->target = target;
- return branch;
+ branch = newLIR1(cUnit, brOp, tReg);
+ oatFreeTemp(cUnit, tReg);
+ }
+ branch->target = target;
+ return branch;
}
LIR* opCmpImmBranch(CompilationUnit* cUnit, ConditionCode cond, int reg,
- int checkValue, LIR* target)
+ int checkValue, LIR* target)
{
- LIR* branch;
- if (checkValue != 0) {
- // TUNING: handle s16 & kCondLt/Mi case using slti
- int tReg = oatAllocTemp(cUnit);
- loadConstant(cUnit, tReg, checkValue);
- branch = opCmpBranch(cUnit, cond, reg, tReg, target);
- oatFreeTemp(cUnit, tReg);
- return branch;
- }
- MipsOpCode opc;
- switch (cond) {
- case kCondEq: opc = kMipsBeqz; break;
- case kCondGe: opc = kMipsBgez; break;
- case kCondGt: opc = kMipsBgtz; break;
- case kCondLe: opc = kMipsBlez; break;
- //case KCondMi:
- case kCondLt: opc = kMipsBltz; break;
- case kCondNe: opc = kMipsBnez; break;
- default:
- // Tuning: use slti when applicable
- int tReg = oatAllocTemp(cUnit);
- loadConstant(cUnit, tReg, checkValue);
- branch = opCmpBranch(cUnit, cond, reg, tReg, target);
- oatFreeTemp(cUnit, tReg);
- return branch;
- }
- branch = newLIR1(cUnit, opc, reg);
- branch->target = target;
+ LIR* branch;
+ if (checkValue != 0) {
+ // TUNING: handle s16 & kCondLt/Mi case using slti
+ int tReg = oatAllocTemp(cUnit);
+ loadConstant(cUnit, tReg, checkValue);
+ branch = opCmpBranch(cUnit, cond, reg, tReg, target);
+ oatFreeTemp(cUnit, tReg);
return branch;
+ }
+ MipsOpCode opc;
+ switch (cond) {
+ case kCondEq: opc = kMipsBeqz; break;
+ case kCondGe: opc = kMipsBgez; break;
+ case kCondGt: opc = kMipsBgtz; break;
+ case kCondLe: opc = kMipsBlez; break;
+ //case KCondMi:
+ case kCondLt: opc = kMipsBltz; break;
+ case kCondNe: opc = kMipsBnez; break;
+ default:
+ // Tuning: use slti when applicable
+ int tReg = oatAllocTemp(cUnit);
+ loadConstant(cUnit, tReg, checkValue);
+ branch = opCmpBranch(cUnit, cond, reg, tReg, target);
+ oatFreeTemp(cUnit, tReg);
+ return branch;
+ }
+ branch = newLIR1(cUnit, opc, reg);
+ branch->target = target;
+ return branch;
}
LIR* opRegCopyNoInsert(CompilationUnit *cUnit, int rDest, int rSrc)
{
#ifdef __mips_hard_float
- if (FPREG(rDest) || FPREG(rSrc))
- return fpRegCopy(cUnit, rDest, rSrc);
+ if (FPREG(rDest) || FPREG(rSrc))
+ return fpRegCopy(cUnit, rDest, rSrc);
#endif
- LIR* res = rawLIR(cUnit, cUnit->currentDalvikOffset, kMipsMove,
- rDest, rSrc);
- if (!(cUnit->disableOpt & (1 << kSafeOptimizations)) && rDest == rSrc) {
- res->flags.isNop = true;
- }
- return res;
+ LIR* res = rawLIR(cUnit, cUnit->currentDalvikOffset, kMipsMove,
+ rDest, rSrc);
+ if (!(cUnit->disableOpt & (1 << kSafeOptimizations)) && rDest == rSrc) {
+ res->flags.isNop = true;
+ }
+ return res;
}
LIR* opRegCopy(CompilationUnit *cUnit, int rDest, int rSrc)
{
- LIR *res = opRegCopyNoInsert(cUnit, rDest, rSrc);
- oatAppendLIR(cUnit, (LIR*)res);
- return res;
+ LIR *res = opRegCopyNoInsert(cUnit, rDest, rSrc);
+ oatAppendLIR(cUnit, (LIR*)res);
+ return res;
}
void opRegCopyWide(CompilationUnit *cUnit, int destLo, int destHi,
- int srcLo, int srcHi)
+ int srcLo, int srcHi)
{
#ifdef __mips_hard_float
- bool destFP = FPREG(destLo) && FPREG(destHi);
- bool srcFP = FPREG(srcLo) && FPREG(srcHi);
- assert(FPREG(srcLo) == FPREG(srcHi));
- assert(FPREG(destLo) == FPREG(destHi));
- if (destFP) {
- if (srcFP) {
- opRegCopy(cUnit, S2D(destLo, destHi), S2D(srcLo, srcHi));
- } else {
- /* note the operands are swapped for the mtc1 instr */
- newLIR2(cUnit, kMipsMtc1, srcLo, destLo);
- newLIR2(cUnit, kMipsMtc1, srcHi, destHi);
- }
+ bool destFP = FPREG(destLo) && FPREG(destHi);
+ bool srcFP = FPREG(srcLo) && FPREG(srcHi);
+ assert(FPREG(srcLo) == FPREG(srcHi));
+ assert(FPREG(destLo) == FPREG(destHi));
+ if (destFP) {
+ if (srcFP) {
+ opRegCopy(cUnit, S2D(destLo, destHi), S2D(srcLo, srcHi));
} else {
- if (srcFP) {
- newLIR2(cUnit, kMipsMfc1, destLo, srcLo);
- newLIR2(cUnit, kMipsMfc1, destHi, srcHi);
- } else {
- // Handle overlap
- if (srcHi == destLo) {
- opRegCopy(cUnit, destHi, srcHi);
- opRegCopy(cUnit, destLo, srcLo);
- } else {
- opRegCopy(cUnit, destLo, srcLo);
- opRegCopy(cUnit, destHi, srcHi);
- }
- }
+ /* note the operands are swapped for the mtc1 instr */
+ newLIR2(cUnit, kMipsMtc1, srcLo, destLo);
+ newLIR2(cUnit, kMipsMtc1, srcHi, destHi);
}
+ } else {
+ if (srcFP) {
+ newLIR2(cUnit, kMipsMfc1, destLo, srcLo);
+ newLIR2(cUnit, kMipsMfc1, destHi, srcHi);
+ } else {
+ // Handle overlap
+ if (srcHi == destLo) {
+ opRegCopy(cUnit, destHi, srcHi);
+ opRegCopy(cUnit, destLo, srcLo);
+ } else {
+ opRegCopy(cUnit, destLo, srcLo);
+ opRegCopy(cUnit, destHi, srcHi);
+ }
+ }
+ }
#else
- // Handle overlap
- if (srcHi == destLo) {
- opRegCopy(cUnit, destHi, srcHi);
- opRegCopy(cUnit, destLo, srcLo);
- } else {
- opRegCopy(cUnit, destLo, srcLo);
- opRegCopy(cUnit, destHi, srcHi);
- }
+ // Handle overlap
+ if (srcHi == destLo) {
+ opRegCopy(cUnit, destHi, srcHi);
+ opRegCopy(cUnit, destLo, srcLo);
+ } else {
+ opRegCopy(cUnit, destLo, srcLo);
+ opRegCopy(cUnit, destHi, srcHi);
+ }
#endif
}
diff --git a/src/compiler/codegen/mips/Mips32/Ralloc.cc b/src/compiler/codegen/mips/Mips32/Ralloc.cc
index f8440a4..9f39212 100644
--- a/src/compiler/codegen/mips/Mips32/Ralloc.cc
+++ b/src/compiler/codegen/mips/Mips32/Ralloc.cc
@@ -29,107 +29,107 @@
* high reg in next byte.
*/
int oatAllocTypedTempPair(CompilationUnit *cUnit, bool fpHint,
- int regClass)
+ int regClass)
{
- int highReg;
- int lowReg;
- int res = 0;
+ int highReg;
+ int lowReg;
+ int res = 0;
#ifdef __mips_hard_float
- if (((regClass == kAnyReg) && fpHint) || (regClass == kFPReg)) {
- lowReg = oatAllocTempDouble(cUnit);
- highReg = lowReg + 1;
- res = (lowReg & 0xff) | ((highReg & 0xff) << 8);
- return res;
- }
-#endif
-
- lowReg = oatAllocTemp(cUnit);
- highReg = oatAllocTemp(cUnit);
+ if (((regClass == kAnyReg) && fpHint) || (regClass == kFPReg)) {
+ lowReg = oatAllocTempDouble(cUnit);
+ highReg = lowReg + 1;
res = (lowReg & 0xff) | ((highReg & 0xff) << 8);
return res;
+ }
+#endif
+
+ lowReg = oatAllocTemp(cUnit);
+ highReg = oatAllocTemp(cUnit);
+ res = (lowReg & 0xff) | ((highReg & 0xff) << 8);
+ return res;
}
int oatAllocTypedTemp(CompilationUnit *cUnit, bool fpHint, int regClass)
{
#ifdef __mips_hard_float
- if (((regClass == kAnyReg) && fpHint) || (regClass == kFPReg))
+ if (((regClass == kAnyReg) && fpHint) || (regClass == kFPReg))
{
- return oatAllocTempFloat(cUnit);
+ return oatAllocTempFloat(cUnit);
}
#endif
- return oatAllocTemp(cUnit);
+ return oatAllocTemp(cUnit);
}
void oatInitializeRegAlloc(CompilationUnit* cUnit)
{
- int numRegs = sizeof(coreRegs)/sizeof(*coreRegs);
- int numReserved = sizeof(reservedRegs)/sizeof(*reservedRegs);
- int numTemps = sizeof(coreTemps)/sizeof(*coreTemps);
+ int numRegs = sizeof(coreRegs)/sizeof(*coreRegs);
+ int numReserved = sizeof(reservedRegs)/sizeof(*reservedRegs);
+ int numTemps = sizeof(coreTemps)/sizeof(*coreTemps);
#ifdef __mips_hard_float
- int numFPRegs = sizeof(fpRegs)/sizeof(*fpRegs);
- int numFPTemps = sizeof(fpTemps)/sizeof(*fpTemps);
+ int numFPRegs = sizeof(fpRegs)/sizeof(*fpRegs);
+ int numFPTemps = sizeof(fpTemps)/sizeof(*fpTemps);
#else
- int numFPRegs = 0;
- int numFPTemps = 0;
+ int numFPRegs = 0;
+ int numFPTemps = 0;
#endif
- RegisterPool *pool = (RegisterPool *)oatNew(cUnit, sizeof(*pool), true,
- kAllocRegAlloc);
- cUnit->regPool = pool;
- pool->numCoreRegs = numRegs;
- pool->coreRegs = (RegisterInfo *)
- oatNew(cUnit, numRegs * sizeof(*cUnit->regPool->coreRegs),
- true, kAllocRegAlloc);
- pool->numFPRegs = numFPRegs;
- pool->FPRegs = (RegisterInfo *)
- oatNew(cUnit, numFPRegs * sizeof(*cUnit->regPool->FPRegs), true,
- kAllocRegAlloc);
- oatInitPool(pool->coreRegs, coreRegs, pool->numCoreRegs);
- oatInitPool(pool->FPRegs, fpRegs, pool->numFPRegs);
- // Keep special registers from being allocated
- for (int i = 0; i < numReserved; i++) {
- if (NO_SUSPEND && !cUnit->genDebugger &&
- (reservedRegs[i] == rSUSPEND)) {
- //To measure cost of suspend check
- continue;
- }
- oatMarkInUse(cUnit, reservedRegs[i]);
+ RegisterPool *pool = (RegisterPool *)oatNew(cUnit, sizeof(*pool), true,
+ kAllocRegAlloc);
+ cUnit->regPool = pool;
+ pool->numCoreRegs = numRegs;
+ pool->coreRegs = (RegisterInfo *)
+ oatNew(cUnit, numRegs * sizeof(*cUnit->regPool->coreRegs),
+ true, kAllocRegAlloc);
+ pool->numFPRegs = numFPRegs;
+ pool->FPRegs = (RegisterInfo *)
+ oatNew(cUnit, numFPRegs * sizeof(*cUnit->regPool->FPRegs), true,
+ kAllocRegAlloc);
+ oatInitPool(pool->coreRegs, coreRegs, pool->numCoreRegs);
+ oatInitPool(pool->FPRegs, fpRegs, pool->numFPRegs);
+ // Keep special registers from being allocated
+ for (int i = 0; i < numReserved; i++) {
+ if (NO_SUSPEND && !cUnit->genDebugger &&
+ (reservedRegs[i] == rSUSPEND)) {
+ //To measure cost of suspend check
+ continue;
}
- // Mark temp regs - all others not in use can be used for promotion
- for (int i = 0; i < numTemps; i++) {
- oatMarkTemp(cUnit, coreTemps[i]);
+ oatMarkInUse(cUnit, reservedRegs[i]);
+ }
+ // Mark temp regs - all others not in use can be used for promotion
+ for (int i = 0; i < numTemps; i++) {
+ oatMarkTemp(cUnit, coreTemps[i]);
+ }
+ for (int i = 0; i < numFPTemps; i++) {
+ oatMarkTemp(cUnit, fpTemps[i]);
+ }
+ // Construct the alias map.
+ cUnit->phiAliasMap = (int*)oatNew(cUnit, cUnit->numSSARegs *
+ sizeof(cUnit->phiAliasMap[0]), false,
+ kAllocDFInfo);
+ for (int i = 0; i < cUnit->numSSARegs; i++) {
+ cUnit->phiAliasMap[i] = i;
+ }
+ for (MIR* phi = cUnit->phiList; phi; phi = phi->meta.phiNext) {
+ int defReg = phi->ssaRep->defs[0];
+ for (int i = 0; i < phi->ssaRep->numUses; i++) {
+ for (int j = 0; j < cUnit->numSSARegs; j++) {
+ if (cUnit->phiAliasMap[j] == phi->ssaRep->uses[i]) {
+ cUnit->phiAliasMap[j] = defReg;
+ }
+ }
}
- for (int i = 0; i < numFPTemps; i++) {
- oatMarkTemp(cUnit, fpTemps[i]);
- }
- // Construct the alias map.
- cUnit->phiAliasMap = (int*)oatNew(cUnit, cUnit->numSSARegs *
- sizeof(cUnit->phiAliasMap[0]), false,
- kAllocDFInfo);
- for (int i = 0; i < cUnit->numSSARegs; i++) {
- cUnit->phiAliasMap[i] = i;
- }
- for (MIR* phi = cUnit->phiList; phi; phi = phi->meta.phiNext) {
- int defReg = phi->ssaRep->defs[0];
- for (int i = 0; i < phi->ssaRep->numUses; i++) {
- for (int j = 0; j < cUnit->numSSARegs; j++) {
- if (cUnit->phiAliasMap[j] == phi->ssaRep->uses[i]) {
- cUnit->phiAliasMap[j] = defReg;
- }
- }
- }
- }
+ }
}
void freeRegLocTemps(CompilationUnit* cUnit, RegLocation rlKeep,
- RegLocation rlFree)
+ RegLocation rlFree)
{
- if ((rlFree.lowReg != rlKeep.lowReg) && (rlFree.lowReg != rlKeep.highReg) &&
- (rlFree.highReg != rlKeep.lowReg) && (rlFree.highReg != rlKeep.highReg)) {
- // No overlap, free both
- oatFreeTemp(cUnit, rlFree.lowReg);
- oatFreeTemp(cUnit, rlFree.highReg);
- }
+ if ((rlFree.lowReg != rlKeep.lowReg) && (rlFree.lowReg != rlKeep.highReg) &&
+ (rlFree.highReg != rlKeep.lowReg) && (rlFree.highReg != rlKeep.highReg)) {
+ // No overlap, free both
+ oatFreeTemp(cUnit, rlFree.lowReg);
+ oatFreeTemp(cUnit, rlFree.highReg);
+ }
}