Revert "Basic SIMD reduction support."
This reverts commit 9879d0eac8fe2aae19ca6a4a2a83222d6383afc2.
Getting these type check failures in some builds. Need time to look at this better, so reverting for now :-(
dex2oatd F 08-30 21:14:29 210122 226218
code_generator.cc:115] Check failed: CheckType(instruction->GetType(), locations->InAt(0)) PrimDouble C
Change-Id: I1c1c87b6323e01442e8fbd94869ddc9e760ea1fc
diff --git a/compiler/optimizing/nodes_vector.h b/compiler/optimizing/nodes_vector.h
index 886d75e..6261171 100644
--- a/compiler/optimizing/nodes_vector.h
+++ b/compiler/optimizing/nodes_vector.h
@@ -63,10 +63,6 @@
// GetVectorLength() x GetPackedType() operations simultaneously.
class HVecOperation : public HVariableInputSizeInstruction {
public:
- // A SIMD operation looks like a FPU location.
- // TODO: we could introduce SIMD types in HIR.
- static constexpr Primitive::Type kSIMDType = Primitive::kPrimDouble;
-
HVecOperation(ArenaAllocator* arena,
Primitive::Type packed_type,
SideEffects side_effects,
@@ -93,9 +89,10 @@
return vector_length_ * Primitive::ComponentSize(GetPackedType());
}
- // Returns the type of the vector operation.
+ // Returns the type of the vector operation: a SIMD operation looks like a FPU location.
+ // TODO: we could introduce SIMD types in HIR.
Primitive::Type GetType() const OVERRIDE {
- return kSIMDType;
+ return Primitive::kPrimDouble;
}
// Returns the true component type packed in a vector.
@@ -223,11 +220,8 @@
DISALLOW_COPY_AND_ASSIGN(HVecMemoryOperation);
};
-// Packed type consistency checker ("same vector length" integral types may mix freely).
+// Packed type consistency checker (same vector length integral types may mix freely).
inline static bool HasConsistentPackedTypes(HInstruction* input, Primitive::Type type) {
- if (input->IsPhi()) {
- return input->GetType() == HVecOperation::kSIMDType; // carries SIMD
- }
DCHECK(input->IsVecOperation());
Primitive::Type input_type = input->AsVecOperation()->GetPackedType();
switch (input_type) {
@@ -271,77 +265,27 @@
DISALLOW_COPY_AND_ASSIGN(HVecReplicateScalar);
};
-// Extracts a particular scalar from the given vector,
-// viz. extract[ x1, .. , xn ] = x_i.
-//
-// TODO: for now only i == 1 case supported.
-class HVecExtractScalar FINAL : public HVecUnaryOperation {
- public:
- HVecExtractScalar(ArenaAllocator* arena,
- HInstruction* input,
- Primitive::Type packed_type,
- size_t vector_length,
- size_t index,
- uint32_t dex_pc = kNoDexPc)
+// Sum-reduces the given vector into a shorter vector (m < n) or scalar (m = 1),
+// viz. sum-reduce[ x1, .. , xn ] = [ y1, .., ym ], where yi = sum_j x_j.
+class HVecSumReduce FINAL : public HVecUnaryOperation {
+ HVecSumReduce(ArenaAllocator* arena,
+ HInstruction* input,
+ Primitive::Type packed_type,
+ size_t vector_length,
+ uint32_t dex_pc = kNoDexPc)
: HVecUnaryOperation(arena, input, packed_type, vector_length, dex_pc) {
DCHECK(HasConsistentPackedTypes(input, packed_type));
- DCHECK_LT(index, vector_length);
- DCHECK_EQ(index, 0u);
}
- // Yields a single component in the vector.
- Primitive::Type GetType() const OVERRIDE {
- return GetPackedType();
- }
-
- // An extract needs to stay in place, since SIMD registers are not
- // kept alive across vector loop boundaries (yet).
- bool CanBeMoved() const OVERRIDE { return false; }
-
- DECLARE_INSTRUCTION(VecExtractScalar);
-
- private:
- DISALLOW_COPY_AND_ASSIGN(HVecExtractScalar);
-};
-
-// Reduces the given vector into the first element as sum/min/max,
-// viz. sum-reduce[ x1, .. , xn ] = [ y, ---- ], where y = sum xi
-// and the "-" denotes "don't care" (implementation dependent).
-class HVecReduce FINAL : public HVecUnaryOperation {
- public:
- enum ReductionKind {
- kSum = 1,
- kMin = 2,
- kMax = 3
- };
-
- HVecReduce(ArenaAllocator* arena,
- HInstruction* input,
- Primitive::Type packed_type,
- size_t vector_length,
- ReductionKind kind,
- uint32_t dex_pc = kNoDexPc)
- : HVecUnaryOperation(arena, input, packed_type, vector_length, dex_pc),
- kind_(kind) {
- DCHECK(HasConsistentPackedTypes(input, packed_type));
- }
-
- ReductionKind GetKind() const { return kind_; }
+ // TODO: probably integral promotion
+ Primitive::Type GetType() const OVERRIDE { return GetPackedType(); }
bool CanBeMoved() const OVERRIDE { return true; }
- bool InstructionDataEquals(const HInstruction* other) const OVERRIDE {
- DCHECK(other->IsVecReduce());
- const HVecReduce* o = other->AsVecReduce();
- return HVecOperation::InstructionDataEquals(o) && GetKind() == o->GetKind();
- }
-
- DECLARE_INSTRUCTION(VecReduce);
+ DECLARE_INSTRUCTION(VecSumReduce);
private:
- const ReductionKind kind_;
-
- DISALLOW_COPY_AND_ASSIGN(HVecReduce);
+ DISALLOW_COPY_AND_ASSIGN(HVecSumReduce);
};
// Converts every component in the vector,
@@ -810,23 +754,20 @@
//
// Assigns the given scalar elements to a vector,
-// viz. set( array(x1, .., xn) ) = [ x1, .. , xn ] if n == m,
-// set( array(x1, .., xm) ) = [ x1, .. , xm, 0, .., 0 ] if m < n.
+// viz. set( array(x1, .., xn) ) = [ x1, .. , xn ].
class HVecSetScalars FINAL : public HVecOperation {
- public:
HVecSetScalars(ArenaAllocator* arena,
HInstruction** scalars, // array
Primitive::Type packed_type,
size_t vector_length,
- size_t number_of_scalars,
uint32_t dex_pc = kNoDexPc)
: HVecOperation(arena,
packed_type,
SideEffects::None(),
- number_of_scalars,
+ /* number_of_inputs */ vector_length,
vector_length,
dex_pc) {
- for (size_t i = 0; i < number_of_scalars; i++) {
+ for (size_t i = 0; i < vector_length; i++) {
DCHECK(!scalars[i]->IsVecOperation());
SetRawInputAt(0, scalars[i]);
}