Quick Compiler: static, extern and inline cleanup
More declarations cleanup. Some dead code removal. No logic changes.
Change-Id: Ife3d0426082f4eeae7c0010ceb92d7dbdc823c71
diff --git a/src/compiler/codegen/arm/call_arm.cc b/src/compiler/codegen/arm/call_arm.cc
index 3250448..98137ad 100644
--- a/src/compiler/codegen/arm/call_arm.cc
+++ b/src/compiler/codegen/arm/call_arm.cc
@@ -26,7 +26,7 @@
/* Return the position of an ssa name within the argument list */
-int InPosition(CompilationUnit* cUnit, int sReg)
+static int InPosition(CompilationUnit* cUnit, int sReg)
{
int vReg = SRegToVReg(cUnit, sReg);
return vReg - cUnit->numRegs;
@@ -83,7 +83,7 @@
}
/* Lock any referenced arguments that arrive in registers */
-void LockLiveArgs(CompilationUnit* cUnit, MIR* mir)
+static void LockLiveArgs(CompilationUnit* cUnit, MIR* mir)
{
int firstIn = cUnit->numRegs;
const int numArgRegs = 3; // TODO: generalize & move to RegUtil.cc
@@ -97,7 +97,7 @@
}
/* Find the next MIR, which may be in a following basic block */
-MIR* GetNextMir(CompilationUnit* cUnit, BasicBlock** pBb, MIR* mir)
+static MIR* GetNextMir(CompilationUnit* cUnit, BasicBlock** pBb, MIR* mir)
{
BasicBlock* bb = *pBb;
MIR* origMir = mir;
@@ -135,8 +135,8 @@
}
}
-MIR* SpecialIGet(CompilationUnit* cUnit, BasicBlock** bb, MIR* mir,
- OpSize size, bool longOrDouble, bool isObject)
+static MIR* SpecialIGet(CompilationUnit* cUnit, BasicBlock** bb, MIR* mir,
+ OpSize size, bool longOrDouble, bool isObject)
{
int fieldOffset;
bool isVolatile;
@@ -162,8 +162,8 @@
return GetNextMir(cUnit, bb, mir);
}
-MIR* SpecialIPut(CompilationUnit* cUnit, BasicBlock** bb, MIR* mir,
- OpSize size, bool longOrDouble, bool isObject)
+static MIR* SpecialIPut(CompilationUnit* cUnit, BasicBlock** bb, MIR* mir,
+ OpSize size, bool longOrDouble, bool isObject)
{
int fieldOffset;
bool isVolatile;
@@ -198,7 +198,7 @@
return GetNextMir(cUnit, bb, mir);
}
-MIR* SpecialIdentity(CompilationUnit* cUnit, MIR* mir)
+static MIR* SpecialIdentity(CompilationUnit* cUnit, MIR* mir)
{
RegLocation rlSrc;
RegLocation rlDest;
diff --git a/src/compiler/codegen/arm/target_arm.cc b/src/compiler/codegen/arm/target_arm.cc
index 744800d..f5d13d3 100644
--- a/src/compiler/codegen/arm/target_arm.cc
+++ b/src/compiler/codegen/arm/target_arm.cc
@@ -275,7 +275,7 @@
"ror"};
/* Decode and print a ARM register name */
-char* DecodeRegList(int opcode, int vector, char* buf)
+static char* DecodeRegList(int opcode, int vector, char* buf)
{
int i;
bool printed = false;
@@ -299,7 +299,7 @@
return buf;
}
-char* DecodeFPCSRegList(int count, int base, char* buf)
+static char* DecodeFPCSRegList(int count, int base, char* buf)
{
sprintf(buf, "s%d", base);
for (int i = 1; i < count; i++) {
@@ -308,7 +308,7 @@
return buf;
}
-int ExpandImmediate(int value)
+static int ExpandImmediate(int value)
{
int mode = (value & 0xf00) >> 8;
uint32_t bits = value & 0xff;
@@ -738,7 +738,7 @@
Clobber(cUnit, fr15);
}
-extern RegLocation GetReturnWideAlt(CompilationUnit* cUnit)
+RegLocation GetReturnWideAlt(CompilationUnit* cUnit)
{
RegLocation res = LocCReturnWide();
res.lowReg = r2;
@@ -751,7 +751,7 @@
return res;
}
-extern RegLocation GetReturnAlt(CompilationUnit* cUnit)
+RegLocation GetReturnAlt(CompilationUnit* cUnit)
{
RegLocation res = LocCReturn();
res.lowReg = r1;
@@ -760,14 +760,14 @@
return res;
}
-extern RegisterInfo* GetRegInfo(CompilationUnit* cUnit, int reg)
+RegisterInfo* GetRegInfo(CompilationUnit* cUnit, int reg)
{
return ARM_FPREG(reg) ? &cUnit->regPool->FPRegs[reg & ARM_FP_REG_MASK]
: &cUnit->regPool->coreRegs[reg];
}
/* To be used when explicitly managing register use */
-extern void LockCallTemps(CompilationUnit* cUnit)
+void LockCallTemps(CompilationUnit* cUnit)
{
LockTemp(cUnit, r0);
LockTemp(cUnit, r1);
@@ -776,7 +776,7 @@
}
/* To be used when explicitly managing register use */
-extern void FreeCallTemps(CompilationUnit* cUnit)
+void FreeCallTemps(CompilationUnit* cUnit)
{
FreeTemp(cUnit, r0);
FreeTemp(cUnit, r1);
diff --git a/src/compiler/codegen/arm/utility_arm.cc b/src/compiler/codegen/arm/utility_arm.cc
index 1c8ea89..bfb05d5 100644
--- a/src/compiler/codegen/arm/utility_arm.cc
+++ b/src/compiler/codegen/arm/utility_arm.cc
@@ -22,7 +22,7 @@
/* This file contains codegen for the Thumb ISA. */
-int EncodeImmSingle(int value)
+static int EncodeImmSingle(int value)
{
int res;
int bitA = (value & 0x80000000) >> 31;
@@ -44,7 +44,7 @@
return res;
}
-LIR* LoadFPConstantValue(CompilationUnit* cUnit, int rDest, int value)
+static LIR* LoadFPConstantValue(CompilationUnit* cUnit, int rDest, int value)
{
int encodedImm = EncodeImmSingle(value);
DCHECK(ARM_SINGLEREG(rDest));
@@ -63,7 +63,7 @@
return loadPcRel;
}
-int LeadingZeros(uint32_t val)
+static int LeadingZeros(uint32_t val)
{
uint32_t alt;
int n;
@@ -567,7 +567,7 @@
* Determine whether value can be encoded as a Thumb2 floating point
* immediate. If not, return -1. If so return encoded 8-bit value.
*/
-int EncodeImmDoubleHigh(int value)
+static int EncodeImmDoubleHigh(int value)
{
int res;
int bitA = (value & 0x80000000) >> 31;
@@ -589,7 +589,7 @@
return res;
}
-int EncodeImmDouble(int valLo, int valHi)
+static int EncodeImmDouble(int valLo, int valHi)
{
int res = -1;
if (valLo == 0)