Move the compiler away from libdex.
Change-Id: I0c5fdc38d94f1199023cfc6aab3060b927ad2383
diff --git a/src/compiler/codegen/CodegenUtil.cc b/src/compiler/codegen/CodegenUtil.cc
index 9186e23..3cb426f 100644
--- a/src/compiler/codegen/CodegenUtil.cc
+++ b/src/compiler/codegen/CodegenUtil.cc
@@ -603,7 +603,7 @@
if (cUnit->printMe) {
LOG(INFO) << "Switch table for offset 0x" << std::hex << bxOffset;
}
- if (tabRec->table[0] == kSparseSwitchSignature) {
+ if (tabRec->table[0] == Instruction::kSparseSwitchSignature) {
int* keys = (int*)&(tabRec->table[2]);
for (int elems = 0; elems < tabRec->table[1]; elems++) {
int disp = tabRec->targets[elems]->offset - bxOffset;
@@ -617,7 +617,7 @@
tabRec->targets[elems]->offset - bxOffset);
}
} else {
- DCHECK_EQ(tabRec->table[0], kPackedSwitchSignature);
+ DCHECK_EQ(static_cast<int>(tabRec->table[0]), static_cast<int>(Instruction::kPackedSwitchSignature));
for (int elems = 0; elems < tabRec->table[1]; elems++) {
int disp = tabRec->targets[elems]->offset - bxOffset;
if (cUnit->printMe) {
@@ -690,10 +690,10 @@
&iterator);
if (tabRec == NULL) break;
tabRec->offset = offset;
- if (tabRec->table[0] == kSparseSwitchSignature) {
+ if (tabRec->table[0] == Instruction::kSparseSwitchSignature) {
offset += tabRec->table[1] * (sizeof(int) * 2);
} else {
- DCHECK_EQ(tabRec->table[0], kPackedSwitchSignature);
+ DCHECK_EQ(static_cast<int>(tabRec->table[0]), static_cast<int>(Instruction::kPackedSwitchSignature));
offset += tabRec->table[1] * sizeof(int);
}
}
@@ -838,11 +838,11 @@
SwitchTable *tabRec = (SwitchTable *) oatGrowableListIteratorNext(
&iterator);
if (tabRec == NULL) break;
- if (tabRec->table[0] == kPackedSwitchSignature)
+ if (tabRec->table[0] == Instruction::kPackedSwitchSignature) {
markPackedCaseLabels(cUnit, tabRec);
- else if (tabRec->table[0] == kSparseSwitchSignature)
+ } else if (tabRec->table[0] == Instruction::kSparseSwitchSignature) {
markSparseCaseLabels(cUnit, tabRec);
- else {
+ } else {
LOG(FATAL) << "Invalid switch table";
}
}
diff --git a/src/compiler/codegen/GenCommon.cc b/src/compiler/codegen/GenCommon.cc
index 1c4e6c8..6792f61 100644
--- a/src/compiler/codegen/GenCommon.cc
+++ b/src/compiler/codegen/GenCommon.cc
@@ -115,24 +115,24 @@
ConditionCode cond;
rlSrc1 = loadValue(cUnit, rlSrc1, kCoreReg);
rlSrc2 = loadValue(cUnit, rlSrc2, kCoreReg);
- Opcode opcode = mir->dalvikInsn.opcode;
+ Instruction::Code opcode = mir->dalvikInsn.opcode;
switch(opcode) {
- case OP_IF_EQ:
+ case Instruction::IF_EQ:
cond = kCondEq;
break;
- case OP_IF_NE:
+ case Instruction::IF_NE:
cond = kCondNe;
break;
- case OP_IF_LT:
+ case Instruction::IF_LT:
cond = kCondLt;
break;
- case OP_IF_GE:
+ case Instruction::IF_GE:
cond = kCondGe;
break;
- case OP_IF_GT:
+ case Instruction::IF_GT:
cond = kCondGt;
break;
- case OP_IF_LE:
+ case Instruction::IF_LE:
cond = kCondLe;
break;
default:
@@ -154,24 +154,24 @@
{
ConditionCode cond;
rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
- Opcode opcode = mir->dalvikInsn.opcode;
+ Instruction::Code opcode = mir->dalvikInsn.opcode;
switch(opcode) {
- case OP_IF_EQZ:
+ case Instruction::IF_EQZ:
cond = kCondEq;
break;
- case OP_IF_NEZ:
+ case Instruction::IF_NEZ:
cond = kCondNe;
break;
- case OP_IF_LTZ:
+ case Instruction::IF_LTZ:
cond = kCondLt;
break;
- case OP_IF_GEZ:
+ case Instruction::IF_GEZ:
cond = kCondGe;
break;
- case OP_IF_GTZ:
+ case Instruction::IF_GTZ:
cond = kCondGt;
break;
- case OP_IF_LEZ:
+ case Instruction::IF_LEZ:
cond = kCondLe;
break;
default:
@@ -208,13 +208,13 @@
RegLocation rlResult = oatEvalLoc(cUnit, rlDest, kCoreReg, true);
OpKind op = kOpInvalid;
switch(mir->dalvikInsn.opcode) {
- case OP_INT_TO_BYTE:
+ case Instruction::INT_TO_BYTE:
op = kOp2Byte;
break;
- case OP_INT_TO_SHORT:
+ case Instruction::INT_TO_SHORT:
op = kOp2Short;
break;
- case OP_INT_TO_CHAR:
+ case Instruction::INT_TO_CHAR:
op = kOp2Char;
break;
default:
@@ -280,7 +280,7 @@
loadConstant(cUnit, rARG2, elems); // arg2 <- count
callRuntimeHelper(cUnit, rTgt);
/*
- * NOTE: the implicit target for OP_FILLED_NEW_ARRAY is the
+ * NOTE: the implicit target for Instruction::FILLED_NEW_ARRAY is the
* return region. Because AllocFromCode placed the new array
* in rRET0, we'll just lock it into place. When debugger support is
* added, it may be necessary to additionally copy all return
@@ -1383,16 +1383,16 @@
int funcOffset;
switch( mir->dalvikInsn.opcode) {
- case OP_SHL_LONG:
- case OP_SHL_LONG_2ADDR:
+ case Instruction::SHL_LONG:
+ case Instruction::SHL_LONG_2ADDR:
funcOffset = OFFSETOF_MEMBER(Thread, pShlLong);
break;
- case OP_SHR_LONG:
- case OP_SHR_LONG_2ADDR:
+ case Instruction::SHR_LONG:
+ case Instruction::SHR_LONG_2ADDR:
funcOffset = OFFSETOF_MEMBER(Thread, pShrLong);
break;
- case OP_USHR_LONG:
- case OP_USHR_LONG_2ADDR:
+ case Instruction::USHR_LONG:
+ case Instruction::USHR_LONG_2ADDR:
funcOffset = OFFSETOF_MEMBER(Thread, pUshrLong);
break;
default:
@@ -1423,65 +1423,65 @@
bool shiftOp = false;
switch (mir->dalvikInsn.opcode) {
- case OP_NEG_INT:
+ case Instruction::NEG_INT:
op = kOpNeg;
unary = true;
break;
- case OP_NOT_INT:
+ case Instruction::NOT_INT:
op = kOpMvn;
unary = true;
break;
- case OP_ADD_INT:
- case OP_ADD_INT_2ADDR:
+ case Instruction::ADD_INT:
+ case Instruction::ADD_INT_2ADDR:
op = kOpAdd;
break;
- case OP_SUB_INT:
- case OP_SUB_INT_2ADDR:
+ case Instruction::SUB_INT:
+ case Instruction::SUB_INT_2ADDR:
op = kOpSub;
break;
- case OP_MUL_INT:
- case OP_MUL_INT_2ADDR:
+ case Instruction::MUL_INT:
+ case Instruction::MUL_INT_2ADDR:
op = kOpMul;
break;
- case OP_DIV_INT:
- case OP_DIV_INT_2ADDR:
+ case Instruction::DIV_INT:
+ case Instruction::DIV_INT_2ADDR:
callOut = true;
checkZero = true;
funcOffset = OFFSETOF_MEMBER(Thread, pIdiv);
retReg = rRET0;
break;
/* NOTE: returns in rARG1 */
- case OP_REM_INT:
- case OP_REM_INT_2ADDR:
+ case Instruction::REM_INT:
+ case Instruction::REM_INT_2ADDR:
callOut = true;
checkZero = true;
funcOffset = OFFSETOF_MEMBER(Thread, pIdivmod);
retReg = rRET1;
break;
- case OP_AND_INT:
- case OP_AND_INT_2ADDR:
+ case Instruction::AND_INT:
+ case Instruction::AND_INT_2ADDR:
op = kOpAnd;
break;
- case OP_OR_INT:
- case OP_OR_INT_2ADDR:
+ case Instruction::OR_INT:
+ case Instruction::OR_INT_2ADDR:
op = kOpOr;
break;
- case OP_XOR_INT:
- case OP_XOR_INT_2ADDR:
+ case Instruction::XOR_INT:
+ case Instruction::XOR_INT_2ADDR:
op = kOpXor;
break;
- case OP_SHL_INT:
- case OP_SHL_INT_2ADDR:
+ case Instruction::SHL_INT:
+ case Instruction::SHL_INT_2ADDR:
shiftOp = true;
op = kOpLsl;
break;
- case OP_SHR_INT:
- case OP_SHR_INT_2ADDR:
+ case Instruction::SHR_INT:
+ case Instruction::SHR_INT_2ADDR:
shiftOp = true;
op = kOpAsr;
break;
- case OP_USHR_INT:
- case OP_USHR_INT_2ADDR:
+ case Instruction::USHR_INT:
+ case Instruction::USHR_INT_2ADDR:
shiftOp = true;
op = kOpLsr;
break;
@@ -1564,7 +1564,7 @@
// Returns true if it added instructions to 'cUnit' to divide 'rlSrc' by 'lit'
// and store the result in 'rlDest'.
-bool handleEasyDivide(CompilationUnit* cUnit, Opcode dalvikOpcode,
+bool handleEasyDivide(CompilationUnit* cUnit, Instruction::Code dalvikOpcode,
RegLocation rlSrc, RegLocation rlDest, int lit)
{
if (lit < 2 || !isPowerOfTwo(lit)) {
@@ -1575,8 +1575,8 @@
// Avoid special cases.
return false;
}
- bool div = (dalvikOpcode == OP_DIV_INT_LIT8 ||
- dalvikOpcode == OP_DIV_INT_LIT16);
+ bool div = (dalvikOpcode == Instruction::DIV_INT_LIT8 ||
+ dalvikOpcode == Instruction::DIV_INT_LIT16);
rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
RegLocation rlResult = oatEvalLoc(cUnit, rlDest, kCoreReg, true);
if (div) {
@@ -1680,7 +1680,7 @@
bool genArithOpIntLit(CompilationUnit* cUnit, MIR* mir, RegLocation rlDest,
RegLocation rlSrc, int lit)
{
- Opcode dalvikOpcode = mir->dalvikInsn.opcode;
+ Instruction::Code dalvikOpcode = mir->dalvikInsn.opcode;
RegLocation rlResult;
OpKind op = (OpKind)0; /* Make gcc happy */
int shiftOp = false;
@@ -1689,8 +1689,8 @@
int rTgt;
switch (dalvikOpcode) {
- case OP_RSUB_INT_LIT8:
- case OP_RSUB_INT: {
+ case Instruction::RSUB_INT_LIT8:
+ case Instruction::RSUB_INT: {
int tReg;
//TUNING: add support for use of Arm rsub op
rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
@@ -1704,50 +1704,50 @@
break;
}
- case OP_ADD_INT_LIT8:
- case OP_ADD_INT_LIT16:
+ case Instruction::ADD_INT_LIT8:
+ case Instruction::ADD_INT_LIT16:
op = kOpAdd;
break;
- case OP_MUL_INT_LIT8:
- case OP_MUL_INT_LIT16: {
+ case Instruction::MUL_INT_LIT8:
+ case Instruction::MUL_INT_LIT16: {
if (handleEasyMultiply(cUnit, rlSrc, rlDest, lit)) {
return false;
}
op = kOpMul;
break;
}
- case OP_AND_INT_LIT8:
- case OP_AND_INT_LIT16:
+ case Instruction::AND_INT_LIT8:
+ case Instruction::AND_INT_LIT16:
op = kOpAnd;
break;
- case OP_OR_INT_LIT8:
- case OP_OR_INT_LIT16:
+ case Instruction::OR_INT_LIT8:
+ case Instruction::OR_INT_LIT16:
op = kOpOr;
break;
- case OP_XOR_INT_LIT8:
- case OP_XOR_INT_LIT16:
+ case Instruction::XOR_INT_LIT8:
+ case Instruction::XOR_INT_LIT16:
op = kOpXor;
break;
- case OP_SHL_INT_LIT8:
+ case Instruction::SHL_INT_LIT8:
lit &= 31;
shiftOp = true;
op = kOpLsl;
break;
- case OP_SHR_INT_LIT8:
+ case Instruction::SHR_INT_LIT8:
lit &= 31;
shiftOp = true;
op = kOpAsr;
break;
- case OP_USHR_INT_LIT8:
+ case Instruction::USHR_INT_LIT8:
lit &= 31;
shiftOp = true;
op = kOpLsr;
break;
- case OP_DIV_INT_LIT8:
- case OP_DIV_INT_LIT16:
- case OP_REM_INT_LIT8:
- case OP_REM_INT_LIT16:
+ case Instruction::DIV_INT_LIT8:
+ case Instruction::DIV_INT_LIT16:
+ case Instruction::REM_INT_LIT8:
+ case Instruction::REM_INT_LIT16:
if (lit == 0) {
genImmedCheck(cUnit, kCondAl, 0, 0, mir, kThrowDivZero);
return false;
@@ -1758,8 +1758,8 @@
oatFlushAllRegs(cUnit); /* Everything to home location */
loadValueDirectFixed(cUnit, rlSrc, rARG0);
oatClobber(cUnit, rARG0);
- if ((dalvikOpcode == OP_DIV_INT_LIT8) ||
- (dalvikOpcode == OP_DIV_INT_LIT16)) {
+ if ((dalvikOpcode == Instruction::DIV_INT_LIT8) ||
+ (dalvikOpcode == Instruction::DIV_INT_LIT16)) {
funcOffset = OFFSETOF_MEMBER(Thread, pIdiv);
isDiv = true;
} else {
@@ -1807,7 +1807,7 @@
int retReg = rRET0;
switch (mir->dalvikInsn.opcode) {
- case OP_NOT_LONG:
+ case Instruction::NOT_LONG:
rlSrc2 = loadValueWide(cUnit, rlSrc2, kCoreReg);
rlResult = oatEvalLoc(cUnit, rlDest, kCoreReg, true);
// Check for destructive overlap
@@ -1824,8 +1824,8 @@
storeValueWide(cUnit, rlDest, rlResult);
return false;
break;
- case OP_ADD_LONG:
- case OP_ADD_LONG_2ADDR:
+ case Instruction::ADD_LONG:
+ case Instruction::ADD_LONG_2ADDR:
#if defined(TARGET_MIPS)
return genAddLong(cUnit, mir, rlDest, rlSrc1, rlSrc2);
#else
@@ -1833,8 +1833,8 @@
secondOp = kOpAdc;
break;
#endif
- case OP_SUB_LONG:
- case OP_SUB_LONG_2ADDR:
+ case Instruction::SUB_LONG:
+ case Instruction::SUB_LONG_2ADDR:
#if defined(TARGET_MIPS)
return genSubLong(cUnit, mir, rlDest, rlSrc1, rlSrc2);
#else
@@ -1842,14 +1842,14 @@
secondOp = kOpSbc;
break;
#endif
- case OP_MUL_LONG:
- case OP_MUL_LONG_2ADDR:
+ case Instruction::MUL_LONG:
+ case Instruction::MUL_LONG_2ADDR:
callOut = true;
retReg = rRET0;
funcOffset = OFFSETOF_MEMBER(Thread, pLmul);
break;
- case OP_DIV_LONG:
- case OP_DIV_LONG_2ADDR:
+ case Instruction::DIV_LONG:
+ case Instruction::DIV_LONG_2ADDR:
callOut = true;
checkZero = true;
retReg = rRET0;
@@ -1857,29 +1857,29 @@
break;
/* NOTE - result is in rARG2/rARG3 instead of rRET0/rRET1 */
// FIXME: is true, or could be made true, or other targets?
- case OP_REM_LONG:
- case OP_REM_LONG_2ADDR:
+ case Instruction::REM_LONG:
+ case Instruction::REM_LONG_2ADDR:
callOut = true;
checkZero = true;
funcOffset = OFFSETOF_MEMBER(Thread, pLdivmod);
retReg = rARG2;
break;
- case OP_AND_LONG_2ADDR:
- case OP_AND_LONG:
+ case Instruction::AND_LONG_2ADDR:
+ case Instruction::AND_LONG:
firstOp = kOpAnd;
secondOp = kOpAnd;
break;
- case OP_OR_LONG:
- case OP_OR_LONG_2ADDR:
+ case Instruction::OR_LONG:
+ case Instruction::OR_LONG_2ADDR:
firstOp = kOpOr;
secondOp = kOpOr;
break;
- case OP_XOR_LONG:
- case OP_XOR_LONG_2ADDR:
+ case Instruction::XOR_LONG:
+ case Instruction::XOR_LONG_2ADDR:
firstOp = kOpXor;
secondOp = kOpXor;
break;
- case OP_NEG_LONG: {
+ case Instruction::NEG_LONG: {
return genNegLong(cUnit, mir, rlDest, rlSrc2);
}
default:
@@ -1963,27 +1963,27 @@
int funcOffset;
switch (mir->dalvikInsn.opcode) {
- case OP_ADD_FLOAT_2ADDR:
- case OP_ADD_FLOAT:
+ case Instruction::ADD_FLOAT_2ADDR:
+ case Instruction::ADD_FLOAT:
funcOffset = OFFSETOF_MEMBER(Thread, pFadd);
break;
- case OP_SUB_FLOAT_2ADDR:
- case OP_SUB_FLOAT:
+ case Instruction::SUB_FLOAT_2ADDR:
+ case Instruction::SUB_FLOAT:
funcOffset = OFFSETOF_MEMBER(Thread, pFsub);
break;
- case OP_DIV_FLOAT_2ADDR:
- case OP_DIV_FLOAT:
+ case Instruction::DIV_FLOAT_2ADDR:
+ case Instruction::DIV_FLOAT:
funcOffset = OFFSETOF_MEMBER(Thread, pFdiv);
break;
- case OP_MUL_FLOAT_2ADDR:
- case OP_MUL_FLOAT:
+ case Instruction::MUL_FLOAT_2ADDR:
+ case Instruction::MUL_FLOAT:
funcOffset = OFFSETOF_MEMBER(Thread, pFmul);
break;
- case OP_REM_FLOAT_2ADDR:
- case OP_REM_FLOAT:
+ case Instruction::REM_FLOAT_2ADDR:
+ case Instruction::REM_FLOAT:
funcOffset = OFFSETOF_MEMBER(Thread, pFmodf);
break;
- case OP_NEG_FLOAT: {
+ case Instruction::NEG_FLOAT: {
genNegFloat(cUnit, rlDest, rlSrc1);
return false;
}
@@ -2014,27 +2014,27 @@
int funcOffset;
switch (mir->dalvikInsn.opcode) {
- case OP_ADD_DOUBLE_2ADDR:
- case OP_ADD_DOUBLE:
+ case Instruction::ADD_DOUBLE_2ADDR:
+ case Instruction::ADD_DOUBLE:
funcOffset = OFFSETOF_MEMBER(Thread, pDadd);
break;
- case OP_SUB_DOUBLE_2ADDR:
- case OP_SUB_DOUBLE:
+ case Instruction::SUB_DOUBLE_2ADDR:
+ case Instruction::SUB_DOUBLE:
funcOffset = OFFSETOF_MEMBER(Thread, pDsub);
break;
- case OP_DIV_DOUBLE_2ADDR:
- case OP_DIV_DOUBLE:
+ case Instruction::DIV_DOUBLE_2ADDR:
+ case Instruction::DIV_DOUBLE:
funcOffset = OFFSETOF_MEMBER(Thread, pDdiv);
break;
- case OP_MUL_DOUBLE_2ADDR:
- case OP_MUL_DOUBLE:
+ case Instruction::MUL_DOUBLE_2ADDR:
+ case Instruction::MUL_DOUBLE:
funcOffset = OFFSETOF_MEMBER(Thread, pDmul);
break;
- case OP_REM_DOUBLE_2ADDR:
- case OP_REM_DOUBLE:
+ case Instruction::REM_DOUBLE_2ADDR:
+ case Instruction::REM_DOUBLE:
funcOffset = OFFSETOF_MEMBER(Thread, pFmod);
break;
- case OP_NEG_DOUBLE: {
+ case Instruction::NEG_DOUBLE: {
genNegDouble(cUnit, rlDest, rlSrc1);
return false;
}
@@ -2054,37 +2054,37 @@
bool genConversionPortable(CompilationUnit* cUnit, MIR* mir)
{
- Opcode opcode = mir->dalvikInsn.opcode;
+ Instruction::Code opcode = mir->dalvikInsn.opcode;
switch (opcode) {
- case OP_INT_TO_FLOAT:
+ case Instruction::INT_TO_FLOAT:
return genConversionCall(cUnit, mir, OFFSETOF_MEMBER(Thread, pI2f),
1, 1);
- case OP_FLOAT_TO_INT:
+ case Instruction::FLOAT_TO_INT:
return genConversionCall(cUnit, mir, OFFSETOF_MEMBER(Thread, pF2iz),
1, 1);
- case OP_DOUBLE_TO_FLOAT:
+ case Instruction::DOUBLE_TO_FLOAT:
return genConversionCall(cUnit, mir, OFFSETOF_MEMBER(Thread, pD2f),
2, 1);
- case OP_FLOAT_TO_DOUBLE:
+ case Instruction::FLOAT_TO_DOUBLE:
return genConversionCall(cUnit, mir, OFFSETOF_MEMBER(Thread, pF2d),
1, 2);
- case OP_INT_TO_DOUBLE:
+ case Instruction::INT_TO_DOUBLE:
return genConversionCall(cUnit, mir, OFFSETOF_MEMBER(Thread, pI2d),
1, 2);
- case OP_DOUBLE_TO_INT:
+ case Instruction::DOUBLE_TO_INT:
return genConversionCall(cUnit, mir, OFFSETOF_MEMBER(Thread, pD2iz),
2, 1);
- case OP_FLOAT_TO_LONG:
+ case Instruction::FLOAT_TO_LONG:
return genConversionCall(cUnit, mir, OFFSETOF_MEMBER(Thread,
pF2l), 1, 2);
- case OP_LONG_TO_FLOAT:
+ case Instruction::LONG_TO_FLOAT:
return genConversionCall(cUnit, mir, OFFSETOF_MEMBER(Thread, pL2f),
2, 1);
- case OP_DOUBLE_TO_LONG:
+ case Instruction::DOUBLE_TO_LONG:
return genConversionCall(cUnit, mir, OFFSETOF_MEMBER(Thread,
pD2l), 2, 2);
- case OP_LONG_TO_DOUBLE:
+ case Instruction::LONG_TO_DOUBLE:
return genConversionCall(cUnit, mir, OFFSETOF_MEMBER(Thread, pL2d),
2, 2);
default:
diff --git a/src/compiler/codegen/MethodCodegenDriver.cc b/src/compiler/codegen/MethodCodegenDriver.cc
index f25c7e5..8dd099e 100644
--- a/src/compiler/codegen/MethodCodegenDriver.cc
+++ b/src/compiler/codegen/MethodCodegenDriver.cc
@@ -122,7 +122,7 @@
RegLocation rlSrc[3];
RegLocation rlDest = badLoc;
RegLocation rlResult = badLoc;
- Opcode opcode = mir->dalvikInsn.opcode;
+ Instruction::Code opcode = mir->dalvikInsn.opcode;
/* Prep Src and Dest locations */
int nextSreg = 0;
@@ -158,12 +158,12 @@
}
switch(opcode) {
- case OP_NOP:
+ case Instruction::NOP:
break;
- case OP_MOVE_EXCEPTION:
+ case Instruction::MOVE_EXCEPTION:
#if defined(TARGET_X86)
- UNIMPLEMENTED(WARNING) << "OP_MOVE_EXCEPTION";
+ UNIMPLEMENTED(WARNING) << "Instruction::MOVE_EXCEPTION";
#else
int exOffset;
int resetReg;
@@ -177,66 +177,66 @@
#endif
break;
- case OP_RETURN_VOID:
+ case Instruction::RETURN_VOID:
genSuspendTest(cUnit, mir);
break;
- case OP_RETURN:
- case OP_RETURN_OBJECT:
+ case Instruction::RETURN:
+ case Instruction::RETURN_OBJECT:
genSuspendTest(cUnit, mir);
storeValue(cUnit, getRetLoc(cUnit), rlSrc[0]);
break;
- case OP_RETURN_WIDE:
+ case Instruction::RETURN_WIDE:
genSuspendTest(cUnit, mir);
storeValueWide(cUnit, getRetLocWide(cUnit), rlSrc[0]);
break;
- case OP_MOVE_RESULT_WIDE:
+ case Instruction::MOVE_RESULT_WIDE:
if (mir->optimizationFlags & MIR_INLINED)
break; // Nop - combined w/ previous invoke
storeValueWide(cUnit, rlDest, getRetLocWide(cUnit));
break;
- case OP_MOVE_RESULT:
- case OP_MOVE_RESULT_OBJECT:
+ case Instruction::MOVE_RESULT:
+ case Instruction::MOVE_RESULT_OBJECT:
if (mir->optimizationFlags & MIR_INLINED)
break; // Nop - combined w/ previous invoke
storeValue(cUnit, rlDest, getRetLoc(cUnit));
break;
- case OP_MOVE:
- case OP_MOVE_OBJECT:
- case OP_MOVE_16:
- case OP_MOVE_OBJECT_16:
- case OP_MOVE_FROM16:
- case OP_MOVE_OBJECT_FROM16:
+ case Instruction::MOVE:
+ case Instruction::MOVE_OBJECT:
+ case Instruction::MOVE_16:
+ case Instruction::MOVE_OBJECT_16:
+ case Instruction::MOVE_FROM16:
+ case Instruction::MOVE_OBJECT_FROM16:
storeValue(cUnit, rlDest, rlSrc[0]);
break;
- case OP_MOVE_WIDE:
- case OP_MOVE_WIDE_16:
- case OP_MOVE_WIDE_FROM16:
+ case Instruction::MOVE_WIDE:
+ case Instruction::MOVE_WIDE_16:
+ case Instruction::MOVE_WIDE_FROM16:
storeValueWide(cUnit, rlDest, rlSrc[0]);
break;
- case OP_CONST:
- case OP_CONST_4:
- case OP_CONST_16:
+ case Instruction::CONST:
+ case Instruction::CONST_4:
+ case Instruction::CONST_16:
rlResult = oatEvalLoc(cUnit, rlDest, kAnyReg, true);
loadConstantNoClobber(cUnit, rlResult.lowReg, mir->dalvikInsn.vB);
storeValue(cUnit, rlDest, rlResult);
break;
- case OP_CONST_HIGH16:
+ case Instruction::CONST_HIGH16:
rlResult = oatEvalLoc(cUnit, rlDest, kAnyReg, true);
loadConstantNoClobber(cUnit, rlResult.lowReg,
mir->dalvikInsn.vB << 16);
storeValue(cUnit, rlDest, rlResult);
break;
- case OP_CONST_WIDE_16:
- case OP_CONST_WIDE_32:
+ case Instruction::CONST_WIDE_16:
+ case Instruction::CONST_WIDE_32:
rlResult = oatEvalLoc(cUnit, rlDest, kAnyReg, true);
loadConstantValueWide(cUnit, rlResult.lowReg, rlResult.highReg,
mir->dalvikInsn.vB,
@@ -244,7 +244,7 @@
storeValueWide(cUnit, rlDest, rlResult);
break;
- case OP_CONST_WIDE:
+ case Instruction::CONST_WIDE:
rlResult = oatEvalLoc(cUnit, rlDest, kAnyReg, true);
loadConstantValueWide(cUnit, rlResult.lowReg, rlResult.highReg,
mir->dalvikInsn.vB_wide & 0xffffffff,
@@ -252,42 +252,42 @@
storeValueWide(cUnit, rlDest, rlResult);
break;
- case OP_CONST_WIDE_HIGH16:
+ case Instruction::CONST_WIDE_HIGH16:
rlResult = oatEvalLoc(cUnit, rlDest, kAnyReg, true);
loadConstantValueWide(cUnit, rlResult.lowReg, rlResult.highReg,
0, mir->dalvikInsn.vB << 16);
storeValueWide(cUnit, rlDest, rlResult);
break;
- case OP_MONITOR_ENTER:
+ case Instruction::MONITOR_ENTER:
genMonitorEnter(cUnit, mir, rlSrc[0]);
break;
- case OP_MONITOR_EXIT:
+ case Instruction::MONITOR_EXIT:
genMonitorExit(cUnit, mir, rlSrc[0]);
break;
- case OP_CHECK_CAST:
+ case Instruction::CHECK_CAST:
genCheckCast(cUnit, mir, rlSrc[0]);
break;
- case OP_INSTANCE_OF:
+ case Instruction::INSTANCE_OF:
genInstanceof(cUnit, mir, rlDest, rlSrc[0]);
break;
- case OP_NEW_INSTANCE:
+ case Instruction::NEW_INSTANCE:
genNewInstance(cUnit, mir, rlDest);
break;
- case OP_THROW:
+ case Instruction::THROW:
genThrow(cUnit, mir, rlSrc[0]);
break;
- case OP_THROW_VERIFICATION_ERROR:
+ case Instruction::THROW_VERIFICATION_ERROR:
genThrowVerificationError(cUnit, mir);
break;
- case OP_ARRAY_LENGTH:
+ case Instruction::ARRAY_LENGTH:
int lenOffset;
lenOffset = Array::LengthOffset().Int32Value();
rlSrc[0] = loadValue(cUnit, rlSrc[0], kCoreReg);
@@ -298,65 +298,65 @@
storeValue(cUnit, rlDest, rlResult);
break;
- case OP_CONST_STRING:
- case OP_CONST_STRING_JUMBO:
+ case Instruction::CONST_STRING:
+ case Instruction::CONST_STRING_JUMBO:
genConstString(cUnit, mir, rlDest, rlSrc[0]);
break;
- case OP_CONST_CLASS:
+ case Instruction::CONST_CLASS:
genConstClass(cUnit, mir, rlDest, rlSrc[0]);
break;
- case OP_FILL_ARRAY_DATA:
+ case Instruction::FILL_ARRAY_DATA:
genFillArrayData(cUnit, mir, rlSrc[0]);
break;
- case OP_FILLED_NEW_ARRAY:
+ case Instruction::FILLED_NEW_ARRAY:
genFilledNewArray(cUnit, mir, false /* not range */);
break;
- case OP_FILLED_NEW_ARRAY_RANGE:
+ case Instruction::FILLED_NEW_ARRAY_RANGE:
genFilledNewArray(cUnit, mir, true /* range */);
break;
- case OP_NEW_ARRAY:
+ case Instruction::NEW_ARRAY:
genNewArray(cUnit, mir, rlDest, rlSrc[0]);
break;
- case OP_GOTO:
- case OP_GOTO_16:
- case OP_GOTO_32:
+ case Instruction::GOTO:
+ case Instruction::GOTO_16:
+ case Instruction::GOTO_32:
if (bb->taken->startOffset <= mir->offset) {
genSuspendTest(cUnit, mir);
}
opUnconditionalBranch(cUnit, &labelList[bb->taken->id]);
break;
- case OP_PACKED_SWITCH:
+ case Instruction::PACKED_SWITCH:
genPackedSwitch(cUnit, mir, rlSrc[0]);
break;
- case OP_SPARSE_SWITCH:
+ case Instruction::SPARSE_SWITCH:
genSparseSwitch(cUnit, mir, rlSrc[0]);
break;
- case OP_CMPL_FLOAT:
- case OP_CMPG_FLOAT:
- case OP_CMPL_DOUBLE:
- case OP_CMPG_DOUBLE:
+ case Instruction::CMPL_FLOAT:
+ case Instruction::CMPG_FLOAT:
+ case Instruction::CMPL_DOUBLE:
+ case Instruction::CMPG_DOUBLE:
res = genCmpFP(cUnit, mir, rlDest, rlSrc[0], rlSrc[1]);
break;
- case OP_CMP_LONG:
+ case Instruction::CMP_LONG:
genCmpLong(cUnit, mir, rlDest, rlSrc[0], rlSrc[1]);
break;
- case OP_IF_EQ:
- case OP_IF_NE:
- case OP_IF_LT:
- case OP_IF_GE:
- case OP_IF_GT:
- case OP_IF_LE: {
+ case Instruction::IF_EQ:
+ case Instruction::IF_NE:
+ case Instruction::IF_LT:
+ case Instruction::IF_GE:
+ case Instruction::IF_GT:
+ case Instruction::IF_LE: {
bool backwardBranch;
backwardBranch = (bb->taken->startOffset <= mir->offset);
if (backwardBranch) {
@@ -366,12 +366,12 @@
break;
}
- case OP_IF_EQZ:
- case OP_IF_NEZ:
- case OP_IF_LTZ:
- case OP_IF_GEZ:
- case OP_IF_GTZ:
- case OP_IF_LEZ: {
+ case Instruction::IF_EQZ:
+ case Instruction::IF_NEZ:
+ case Instruction::IF_LTZ:
+ case Instruction::IF_GEZ:
+ case Instruction::IF_GTZ:
+ case Instruction::IF_LEZ: {
bool backwardBranch;
backwardBranch = (bb->taken->startOffset <= mir->offset);
if (backwardBranch) {
@@ -381,314 +381,314 @@
break;
}
- case OP_AGET_WIDE:
+ case Instruction::AGET_WIDE:
genArrayGet(cUnit, mir, kLong, rlSrc[0], rlSrc[1], rlDest, 3);
break;
- case OP_AGET:
- case OP_AGET_OBJECT:
+ case Instruction::AGET:
+ case Instruction::AGET_OBJECT:
genArrayGet(cUnit, mir, kWord, rlSrc[0], rlSrc[1], rlDest, 2);
break;
- case OP_AGET_BOOLEAN:
+ case Instruction::AGET_BOOLEAN:
genArrayGet(cUnit, mir, kUnsignedByte, rlSrc[0], rlSrc[1],
rlDest, 0);
break;
- case OP_AGET_BYTE:
+ case Instruction::AGET_BYTE:
genArrayGet(cUnit, mir, kSignedByte, rlSrc[0], rlSrc[1], rlDest, 0);
break;
- case OP_AGET_CHAR:
+ case Instruction::AGET_CHAR:
genArrayGet(cUnit, mir, kUnsignedHalf, rlSrc[0], rlSrc[1],
rlDest, 1);
break;
- case OP_AGET_SHORT:
+ case Instruction::AGET_SHORT:
genArrayGet(cUnit, mir, kSignedHalf, rlSrc[0], rlSrc[1], rlDest, 1);
break;
- case OP_APUT_WIDE:
+ case Instruction::APUT_WIDE:
genArrayPut(cUnit, mir, kLong, rlSrc[1], rlSrc[2], rlSrc[0], 3);
break;
- case OP_APUT:
+ case Instruction::APUT:
genArrayPut(cUnit, mir, kWord, rlSrc[1], rlSrc[2], rlSrc[0], 2);
break;
- case OP_APUT_OBJECT:
+ case Instruction::APUT_OBJECT:
genArrayObjPut(cUnit, mir, rlSrc[1], rlSrc[2], rlSrc[0], 2);
break;
- case OP_APUT_SHORT:
- case OP_APUT_CHAR:
+ case Instruction::APUT_SHORT:
+ case Instruction::APUT_CHAR:
genArrayPut(cUnit, mir, kUnsignedHalf, rlSrc[1], rlSrc[2],
rlSrc[0], 1);
break;
- case OP_APUT_BYTE:
- case OP_APUT_BOOLEAN:
+ case Instruction::APUT_BYTE:
+ case Instruction::APUT_BOOLEAN:
genArrayPut(cUnit, mir, kUnsignedByte, rlSrc[1], rlSrc[2],
rlSrc[0], 0);
break;
- case OP_IGET_OBJECT:
- case OP_IGET_OBJECT_VOLATILE:
+ case Instruction::IGET_OBJECT:
+ //case Instruction::IGET_OBJECT_VOLATILE:
genIGet(cUnit, mir, kWord, rlDest, rlSrc[0], false, true);
break;
- case OP_IGET_WIDE:
- case OP_IGET_WIDE_VOLATILE:
+ case Instruction::IGET_WIDE:
+ //case Instruction::IGET_WIDE_VOLATILE:
genIGet(cUnit, mir, kLong, rlDest, rlSrc[0], true, false);
break;
- case OP_IGET:
- case OP_IGET_VOLATILE:
+ case Instruction::IGET:
+ //case Instruction::IGET_VOLATILE:
genIGet(cUnit, mir, kWord, rlDest, rlSrc[0], false, false);
break;
- case OP_IGET_CHAR:
+ case Instruction::IGET_CHAR:
genIGet(cUnit, mir, kUnsignedHalf, rlDest, rlSrc[0], false, false);
break;
- case OP_IGET_SHORT:
+ case Instruction::IGET_SHORT:
genIGet(cUnit, mir, kSignedHalf, rlDest, rlSrc[0], false, false);
break;
- case OP_IGET_BOOLEAN:
- case OP_IGET_BYTE:
+ case Instruction::IGET_BOOLEAN:
+ case Instruction::IGET_BYTE:
genIGet(cUnit, mir, kUnsignedByte, rlDest, rlSrc[0], false, false);
break;
- case OP_IPUT_WIDE:
- case OP_IPUT_WIDE_VOLATILE:
+ case Instruction::IPUT_WIDE:
+ //case Instruction::IPUT_WIDE_VOLATILE:
genIPut(cUnit, mir, kLong, rlSrc[0], rlSrc[1], true, false);
break;
- case OP_IPUT_OBJECT:
- case OP_IPUT_OBJECT_VOLATILE:
+ case Instruction::IPUT_OBJECT:
+ //case Instruction::IPUT_OBJECT_VOLATILE:
genIPut(cUnit, mir, kWord, rlSrc[0], rlSrc[1], false, true);
break;
- case OP_IPUT:
- case OP_IPUT_VOLATILE:
+ case Instruction::IPUT:
+ //case Instruction::IPUT_VOLATILE:
genIPut(cUnit, mir, kWord, rlSrc[0], rlSrc[1], false, false);
break;
- case OP_IPUT_BOOLEAN:
- case OP_IPUT_BYTE:
+ case Instruction::IPUT_BOOLEAN:
+ case Instruction::IPUT_BYTE:
genIPut(cUnit, mir, kUnsignedByte, rlSrc[0], rlSrc[1], false, false);
break;
- case OP_IPUT_CHAR:
+ case Instruction::IPUT_CHAR:
genIPut(cUnit, mir, kUnsignedHalf, rlSrc[0], rlSrc[1], false, false);
break;
- case OP_IPUT_SHORT:
+ case Instruction::IPUT_SHORT:
genIPut(cUnit, mir, kSignedHalf, rlSrc[0], rlSrc[1], false, false);
break;
- case OP_SGET_OBJECT:
+ case Instruction::SGET_OBJECT:
genSget(cUnit, mir, rlDest, false, true);
break;
- case OP_SGET:
- case OP_SGET_BOOLEAN:
- case OP_SGET_BYTE:
- case OP_SGET_CHAR:
- case OP_SGET_SHORT:
+ case Instruction::SGET:
+ case Instruction::SGET_BOOLEAN:
+ case Instruction::SGET_BYTE:
+ case Instruction::SGET_CHAR:
+ case Instruction::SGET_SHORT:
genSget(cUnit, mir, rlDest, false, false);
break;
- case OP_SGET_WIDE:
+ case Instruction::SGET_WIDE:
genSget(cUnit, mir, rlDest, true, false);
break;
- case OP_SPUT_OBJECT:
+ case Instruction::SPUT_OBJECT:
genSput(cUnit, mir, rlSrc[0], false, true);
break;
- case OP_SPUT:
- case OP_SPUT_BOOLEAN:
- case OP_SPUT_BYTE:
- case OP_SPUT_CHAR:
- case OP_SPUT_SHORT:
+ case Instruction::SPUT:
+ case Instruction::SPUT_BOOLEAN:
+ case Instruction::SPUT_BYTE:
+ case Instruction::SPUT_CHAR:
+ case Instruction::SPUT_SHORT:
genSput(cUnit, mir, rlSrc[0], false, false);
break;
- case OP_SPUT_WIDE:
+ case Instruction::SPUT_WIDE:
genSput(cUnit, mir, rlSrc[0], true, false);
break;
- case OP_INVOKE_STATIC_RANGE:
+ case Instruction::INVOKE_STATIC_RANGE:
genInvoke(cUnit, mir, kStatic, true /*range*/);
break;
- case OP_INVOKE_STATIC:
+ case Instruction::INVOKE_STATIC:
genInvoke(cUnit, mir, kStatic, false /*range*/);
break;
- case OP_INVOKE_DIRECT:
+ case Instruction::INVOKE_DIRECT:
genInvoke(cUnit, mir, kDirect, false /*range*/);
break;
- case OP_INVOKE_DIRECT_RANGE:
+ case Instruction::INVOKE_DIRECT_RANGE:
genInvoke(cUnit, mir, kDirect, true /*range*/);
break;
- case OP_INVOKE_VIRTUAL:
+ case Instruction::INVOKE_VIRTUAL:
genInvoke(cUnit, mir, kVirtual, false /*range*/);
break;
- case OP_INVOKE_VIRTUAL_RANGE:
+ case Instruction::INVOKE_VIRTUAL_RANGE:
genInvoke(cUnit, mir, kVirtual, true /*range*/);
break;
- case OP_INVOKE_SUPER:
+ case Instruction::INVOKE_SUPER:
genInvoke(cUnit, mir, kSuper, false /*range*/);
break;
- case OP_INVOKE_SUPER_RANGE:
+ case Instruction::INVOKE_SUPER_RANGE:
genInvoke(cUnit, mir, kSuper, true /*range*/);
break;
- case OP_INVOKE_INTERFACE:
+ case Instruction::INVOKE_INTERFACE:
genInvoke(cUnit, mir, kInterface, false /*range*/);
break;
- case OP_INVOKE_INTERFACE_RANGE:
+ case Instruction::INVOKE_INTERFACE_RANGE:
genInvoke(cUnit, mir, kInterface, true /*range*/);
break;
- case OP_NEG_INT:
- case OP_NOT_INT:
+ case Instruction::NEG_INT:
+ case Instruction::NOT_INT:
res = genArithOpInt(cUnit, mir, rlDest, rlSrc[0], rlSrc[0]);
break;
- case OP_NEG_LONG:
- case OP_NOT_LONG:
+ case Instruction::NEG_LONG:
+ case Instruction::NOT_LONG:
res = genArithOpLong(cUnit, mir, rlDest, rlSrc[0], rlSrc[0]);
break;
- case OP_NEG_FLOAT:
+ case Instruction::NEG_FLOAT:
res = genArithOpFloat(cUnit, mir, rlDest, rlSrc[0], rlSrc[0]);
break;
- case OP_NEG_DOUBLE:
+ case Instruction::NEG_DOUBLE:
res = genArithOpDouble(cUnit, mir, rlDest, rlSrc[0], rlSrc[0]);
break;
- case OP_INT_TO_LONG:
+ case Instruction::INT_TO_LONG:
genIntToLong(cUnit, mir, rlDest, rlSrc[0]);
break;
- case OP_LONG_TO_INT:
+ case Instruction::LONG_TO_INT:
rlSrc[0] = oatUpdateLocWide(cUnit, rlSrc[0]);
rlSrc[0] = oatWideToNarrow(cUnit, rlSrc[0]);
storeValue(cUnit, rlDest, rlSrc[0]);
break;
- case OP_INT_TO_BYTE:
- case OP_INT_TO_SHORT:
- case OP_INT_TO_CHAR:
+ case Instruction::INT_TO_BYTE:
+ case Instruction::INT_TO_SHORT:
+ case Instruction::INT_TO_CHAR:
genIntNarrowing(cUnit, mir, rlDest, rlSrc[0]);
break;
- case OP_INT_TO_FLOAT:
- case OP_INT_TO_DOUBLE:
- case OP_LONG_TO_FLOAT:
- case OP_LONG_TO_DOUBLE:
- case OP_FLOAT_TO_INT:
- case OP_FLOAT_TO_LONG:
- case OP_FLOAT_TO_DOUBLE:
- case OP_DOUBLE_TO_INT:
- case OP_DOUBLE_TO_LONG:
- case OP_DOUBLE_TO_FLOAT:
+ case Instruction::INT_TO_FLOAT:
+ case Instruction::INT_TO_DOUBLE:
+ case Instruction::LONG_TO_FLOAT:
+ case Instruction::LONG_TO_DOUBLE:
+ case Instruction::FLOAT_TO_INT:
+ case Instruction::FLOAT_TO_LONG:
+ case Instruction::FLOAT_TO_DOUBLE:
+ case Instruction::DOUBLE_TO_INT:
+ case Instruction::DOUBLE_TO_LONG:
+ case Instruction::DOUBLE_TO_FLOAT:
genConversion(cUnit, mir);
break;
- case OP_ADD_INT:
- case OP_SUB_INT:
- case OP_MUL_INT:
- case OP_DIV_INT:
- case OP_REM_INT:
- case OP_AND_INT:
- case OP_OR_INT:
- case OP_XOR_INT:
- case OP_SHL_INT:
- case OP_SHR_INT:
- case OP_USHR_INT:
- case OP_ADD_INT_2ADDR:
- case OP_SUB_INT_2ADDR:
- case OP_MUL_INT_2ADDR:
- case OP_DIV_INT_2ADDR:
- case OP_REM_INT_2ADDR:
- case OP_AND_INT_2ADDR:
- case OP_OR_INT_2ADDR:
- case OP_XOR_INT_2ADDR:
- case OP_SHL_INT_2ADDR:
- case OP_SHR_INT_2ADDR:
- case OP_USHR_INT_2ADDR:
+ case Instruction::ADD_INT:
+ case Instruction::SUB_INT:
+ case Instruction::MUL_INT:
+ case Instruction::DIV_INT:
+ case Instruction::REM_INT:
+ case Instruction::AND_INT:
+ case Instruction::OR_INT:
+ case Instruction::XOR_INT:
+ case Instruction::SHL_INT:
+ case Instruction::SHR_INT:
+ case Instruction::USHR_INT:
+ case Instruction::ADD_INT_2ADDR:
+ case Instruction::SUB_INT_2ADDR:
+ case Instruction::MUL_INT_2ADDR:
+ case Instruction::DIV_INT_2ADDR:
+ case Instruction::REM_INT_2ADDR:
+ case Instruction::AND_INT_2ADDR:
+ case Instruction::OR_INT_2ADDR:
+ case Instruction::XOR_INT_2ADDR:
+ case Instruction::SHL_INT_2ADDR:
+ case Instruction::SHR_INT_2ADDR:
+ case Instruction::USHR_INT_2ADDR:
genArithOpInt(cUnit, mir, rlDest, rlSrc[0], rlSrc[1]);
break;
- case OP_ADD_LONG:
- case OP_SUB_LONG:
- case OP_MUL_LONG:
- case OP_DIV_LONG:
- case OP_REM_LONG:
- case OP_AND_LONG:
- case OP_OR_LONG:
- case OP_XOR_LONG:
- case OP_ADD_LONG_2ADDR:
- case OP_SUB_LONG_2ADDR:
- case OP_MUL_LONG_2ADDR:
- case OP_DIV_LONG_2ADDR:
- case OP_REM_LONG_2ADDR:
- case OP_AND_LONG_2ADDR:
- case OP_OR_LONG_2ADDR:
- case OP_XOR_LONG_2ADDR:
+ case Instruction::ADD_LONG:
+ case Instruction::SUB_LONG:
+ case Instruction::MUL_LONG:
+ case Instruction::DIV_LONG:
+ case Instruction::REM_LONG:
+ case Instruction::AND_LONG:
+ case Instruction::OR_LONG:
+ case Instruction::XOR_LONG:
+ case Instruction::ADD_LONG_2ADDR:
+ case Instruction::SUB_LONG_2ADDR:
+ case Instruction::MUL_LONG_2ADDR:
+ case Instruction::DIV_LONG_2ADDR:
+ case Instruction::REM_LONG_2ADDR:
+ case Instruction::AND_LONG_2ADDR:
+ case Instruction::OR_LONG_2ADDR:
+ case Instruction::XOR_LONG_2ADDR:
genArithOpLong(cUnit, mir, rlDest, rlSrc[0], rlSrc[1]);
break;
- case OP_SHL_LONG:
- case OP_SHR_LONG:
- case OP_USHR_LONG:
- case OP_SHL_LONG_2ADDR:
- case OP_SHR_LONG_2ADDR:
- case OP_USHR_LONG_2ADDR:
+ case Instruction::SHL_LONG:
+ case Instruction::SHR_LONG:
+ case Instruction::USHR_LONG:
+ case Instruction::SHL_LONG_2ADDR:
+ case Instruction::SHR_LONG_2ADDR:
+ case Instruction::USHR_LONG_2ADDR:
genShiftOpLong(cUnit,mir, rlDest, rlSrc[0], rlSrc[1]);
break;
- case OP_ADD_FLOAT:
- case OP_SUB_FLOAT:
- case OP_MUL_FLOAT:
- case OP_DIV_FLOAT:
- case OP_REM_FLOAT:
- case OP_ADD_FLOAT_2ADDR:
- case OP_SUB_FLOAT_2ADDR:
- case OP_MUL_FLOAT_2ADDR:
- case OP_DIV_FLOAT_2ADDR:
- case OP_REM_FLOAT_2ADDR:
+ case Instruction::ADD_FLOAT:
+ case Instruction::SUB_FLOAT:
+ case Instruction::MUL_FLOAT:
+ case Instruction::DIV_FLOAT:
+ case Instruction::REM_FLOAT:
+ case Instruction::ADD_FLOAT_2ADDR:
+ case Instruction::SUB_FLOAT_2ADDR:
+ case Instruction::MUL_FLOAT_2ADDR:
+ case Instruction::DIV_FLOAT_2ADDR:
+ case Instruction::REM_FLOAT_2ADDR:
genArithOpFloat(cUnit, mir, rlDest, rlSrc[0], rlSrc[1]);
break;
- case OP_ADD_DOUBLE:
- case OP_SUB_DOUBLE:
- case OP_MUL_DOUBLE:
- case OP_DIV_DOUBLE:
- case OP_REM_DOUBLE:
- case OP_ADD_DOUBLE_2ADDR:
- case OP_SUB_DOUBLE_2ADDR:
- case OP_MUL_DOUBLE_2ADDR:
- case OP_DIV_DOUBLE_2ADDR:
- case OP_REM_DOUBLE_2ADDR:
+ case Instruction::ADD_DOUBLE:
+ case Instruction::SUB_DOUBLE:
+ case Instruction::MUL_DOUBLE:
+ case Instruction::DIV_DOUBLE:
+ case Instruction::REM_DOUBLE:
+ case Instruction::ADD_DOUBLE_2ADDR:
+ case Instruction::SUB_DOUBLE_2ADDR:
+ case Instruction::MUL_DOUBLE_2ADDR:
+ case Instruction::DIV_DOUBLE_2ADDR:
+ case Instruction::REM_DOUBLE_2ADDR:
genArithOpDouble(cUnit, mir, rlDest, rlSrc[0], rlSrc[1]);
break;
- case OP_RSUB_INT:
- case OP_ADD_INT_LIT16:
- case OP_MUL_INT_LIT16:
- case OP_DIV_INT_LIT16:
- case OP_REM_INT_LIT16:
- case OP_AND_INT_LIT16:
- case OP_OR_INT_LIT16:
- case OP_XOR_INT_LIT16:
- case OP_ADD_INT_LIT8:
- case OP_RSUB_INT_LIT8:
- case OP_MUL_INT_LIT8:
- case OP_DIV_INT_LIT8:
- case OP_REM_INT_LIT8:
- case OP_AND_INT_LIT8:
- case OP_OR_INT_LIT8:
- case OP_XOR_INT_LIT8:
- case OP_SHL_INT_LIT8:
- case OP_SHR_INT_LIT8:
- case OP_USHR_INT_LIT8:
+ case Instruction::RSUB_INT:
+ case Instruction::ADD_INT_LIT16:
+ case Instruction::MUL_INT_LIT16:
+ case Instruction::DIV_INT_LIT16:
+ case Instruction::REM_INT_LIT16:
+ case Instruction::AND_INT_LIT16:
+ case Instruction::OR_INT_LIT16:
+ case Instruction::XOR_INT_LIT16:
+ case Instruction::ADD_INT_LIT8:
+ case Instruction::RSUB_INT_LIT8:
+ case Instruction::MUL_INT_LIT8:
+ case Instruction::DIV_INT_LIT8:
+ case Instruction::REM_INT_LIT8:
+ case Instruction::AND_INT_LIT8:
+ case Instruction::OR_INT_LIT8:
+ case Instruction::XOR_INT_LIT8:
+ case Instruction::SHL_INT_LIT8:
+ case Instruction::SHR_INT_LIT8:
+ case Instruction::USHR_INT_LIT8:
genArithOpIntLit(cUnit, mir, rlDest, rlSrc[0], mir->dalvikInsn.vC);
break;
@@ -779,15 +779,14 @@
cUnit->currentDalvikOffset = mir->offset;
- Opcode dalvikOpcode = mir->dalvikInsn.opcode;
- InstructionFormat dalvikFormat =
- dexGetFormatFromOpcode(dalvikOpcode);
+ Instruction::Code dalvikOpcode = mir->dalvikInsn.opcode;
+ Instruction::Format dalvikFormat = Instruction::FormatOf(dalvikOpcode);
LIR* boundaryLIR;
/* Mark the beginning of a Dalvik instruction for line tracking */
char* instStr = cUnit->printMe ?
- oatGetDalvikDisassembly(cUnit, &mir->dalvikInsn, "") : NULL;
+ oatGetDalvikDisassembly(cUnit, mir->dalvikInsn, "") : NULL;
boundaryLIR = newLIR1(cUnit, kPseudoDalvikByteCodeBoundary,
(intptr_t) instStr);
cUnit->boundaryMap.insert(std::make_pair(mir->offset,
@@ -811,14 +810,10 @@
}
bool notHandled = compileDalvikInstruction(cUnit, mir, bb, labelList);
-
if (notHandled) {
- char buf[100];
- snprintf(buf, 100, "%#06x: Opcode %#x (%s) / Fmt %d not handled",
- mir->offset,
- dalvikOpcode, dexGetOpcodeName(dalvikOpcode),
- dalvikFormat);
- LOG(FATAL) << buf;
+ LOG(FATAL) << StringPrintf("%#06x: Opcode %#x (%s) / Fmt %d not handled",
+ mir->offset, dalvikOpcode, Instruction::Name(dalvikOpcode), dalvikFormat);
+
}
}
diff --git a/src/compiler/codegen/arm/FP/Thumb2VFP.cc b/src/compiler/codegen/arm/FP/Thumb2VFP.cc
index 9ef7b7b..7f372aa 100644
--- a/src/compiler/codegen/arm/FP/Thumb2VFP.cc
+++ b/src/compiler/codegen/arm/FP/Thumb2VFP.cc
@@ -27,25 +27,25 @@
* the handlers.
*/
switch (mir->dalvikInsn.opcode) {
- case OP_ADD_FLOAT_2ADDR:
- case OP_ADD_FLOAT:
+ case Instruction::ADD_FLOAT_2ADDR:
+ case Instruction::ADD_FLOAT:
op = kThumb2Vadds;
break;
- case OP_SUB_FLOAT_2ADDR:
- case OP_SUB_FLOAT:
+ case Instruction::SUB_FLOAT_2ADDR:
+ case Instruction::SUB_FLOAT:
op = kThumb2Vsubs;
break;
- case OP_DIV_FLOAT_2ADDR:
- case OP_DIV_FLOAT:
+ case Instruction::DIV_FLOAT_2ADDR:
+ case Instruction::DIV_FLOAT:
op = kThumb2Vdivs;
break;
- case OP_MUL_FLOAT_2ADDR:
- case OP_MUL_FLOAT:
+ case Instruction::MUL_FLOAT_2ADDR:
+ case Instruction::MUL_FLOAT:
op = kThumb2Vmuls;
break;
- case OP_REM_FLOAT_2ADDR:
- case OP_REM_FLOAT:
- case OP_NEG_FLOAT: {
+ case Instruction::REM_FLOAT_2ADDR:
+ case Instruction::REM_FLOAT:
+ case Instruction::NEG_FLOAT: {
return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1,
rlSrc2);
}
@@ -68,25 +68,25 @@
RegLocation rlResult;
switch (mir->dalvikInsn.opcode) {
- case OP_ADD_DOUBLE_2ADDR:
- case OP_ADD_DOUBLE:
+ case Instruction::ADD_DOUBLE_2ADDR:
+ case Instruction::ADD_DOUBLE:
op = kThumb2Vaddd;
break;
- case OP_SUB_DOUBLE_2ADDR:
- case OP_SUB_DOUBLE:
+ case Instruction::SUB_DOUBLE_2ADDR:
+ case Instruction::SUB_DOUBLE:
op = kThumb2Vsubd;
break;
- case OP_DIV_DOUBLE_2ADDR:
- case OP_DIV_DOUBLE:
+ case Instruction::DIV_DOUBLE_2ADDR:
+ case Instruction::DIV_DOUBLE:
op = kThumb2Vdivd;
break;
- case OP_MUL_DOUBLE_2ADDR:
- case OP_MUL_DOUBLE:
+ case Instruction::MUL_DOUBLE_2ADDR:
+ case Instruction::MUL_DOUBLE:
op = kThumb2Vmuld;
break;
- case OP_REM_DOUBLE_2ADDR:
- case OP_REM_DOUBLE:
- case OP_NEG_DOUBLE: {
+ case Instruction::REM_DOUBLE_2ADDR:
+ case Instruction::REM_DOUBLE:
+ case Instruction::NEG_DOUBLE: {
return genArithOpDoublePortable(cUnit, mir, rlDest, rlSrc1,
rlSrc2);
}
@@ -110,7 +110,7 @@
bool genConversion(CompilationUnit* cUnit, MIR* mir)
{
- Opcode opcode = mir->dalvikInsn.opcode;
+ Instruction::Code opcode = mir->dalvikInsn.opcode;
int op = kThumbBkpt;
bool longSrc = false;
bool longDest = false;
@@ -120,40 +120,40 @@
RegLocation rlResult;
switch (opcode) {
- case OP_INT_TO_FLOAT:
+ case Instruction::INT_TO_FLOAT:
longSrc = false;
longDest = false;
op = kThumb2VcvtIF;
break;
- case OP_FLOAT_TO_INT:
+ case Instruction::FLOAT_TO_INT:
longSrc = false;
longDest = false;
op = kThumb2VcvtFI;
break;
- case OP_DOUBLE_TO_FLOAT:
+ case Instruction::DOUBLE_TO_FLOAT:
longSrc = true;
longDest = false;
op = kThumb2VcvtDF;
break;
- case OP_FLOAT_TO_DOUBLE:
+ case Instruction::FLOAT_TO_DOUBLE:
longSrc = false;
longDest = true;
op = kThumb2VcvtFd;
break;
- case OP_INT_TO_DOUBLE:
+ case Instruction::INT_TO_DOUBLE:
longSrc = false;
longDest = true;
op = kThumb2VcvtID;
break;
- case OP_DOUBLE_TO_INT:
+ case Instruction::DOUBLE_TO_INT:
longSrc = true;
longDest = false;
op = kThumb2VcvtDI;
break;
- case OP_LONG_TO_DOUBLE:
- case OP_FLOAT_TO_LONG:
- case OP_LONG_TO_FLOAT:
- case OP_DOUBLE_TO_LONG:
+ case Instruction::LONG_TO_DOUBLE:
+ case Instruction::FLOAT_TO_LONG:
+ case Instruction::LONG_TO_FLOAT:
+ case Instruction::DOUBLE_TO_LONG:
return genConversionPortable(cUnit, mir);
default:
return true;
@@ -190,19 +190,19 @@
RegLocation rlResult;
switch(mir->dalvikInsn.opcode) {
- case OP_CMPL_FLOAT:
+ case Instruction::CMPL_FLOAT:
isDouble = false;
defaultResult = -1;
break;
- case OP_CMPG_FLOAT:
+ case Instruction::CMPG_FLOAT:
isDouble = false;
defaultResult = 1;
break;
- case OP_CMPL_DOUBLE:
+ case Instruction::CMPL_DOUBLE:
isDouble = true;
defaultResult = -1;
break;
- case OP_CMPG_DOUBLE:
+ case Instruction::CMPG_DOUBLE:
isDouble = true;
defaultResult = 1;
break;
diff --git a/src/compiler/codegen/mips/FP/MipsFP.cc b/src/compiler/codegen/mips/FP/MipsFP.cc
index 64061fe..3bbb3d7 100644
--- a/src/compiler/codegen/mips/FP/MipsFP.cc
+++ b/src/compiler/codegen/mips/FP/MipsFP.cc
@@ -28,25 +28,25 @@
* the handlers.
*/
switch (mir->dalvikInsn.opcode) {
- case OP_ADD_FLOAT_2ADDR:
- case OP_ADD_FLOAT:
+ case Instruction::ADD_FLOAT_2ADDR:
+ case Instruction::ADD_FLOAT:
op = kMipsFadds;
break;
- case OP_SUB_FLOAT_2ADDR:
- case OP_SUB_FLOAT:
+ case Instruction::SUB_FLOAT_2ADDR:
+ case Instruction::SUB_FLOAT:
op = kMipsFsubs;
break;
- case OP_DIV_FLOAT_2ADDR:
- case OP_DIV_FLOAT:
+ case Instruction::DIV_FLOAT_2ADDR:
+ case Instruction::DIV_FLOAT:
op = kMipsFdivs;
break;
- case OP_MUL_FLOAT_2ADDR:
- case OP_MUL_FLOAT:
+ case Instruction::MUL_FLOAT_2ADDR:
+ case Instruction::MUL_FLOAT:
op = kMipsFmuls;
break;
- case OP_REM_FLOAT_2ADDR:
- case OP_REM_FLOAT:
- case OP_NEG_FLOAT: {
+ case Instruction::REM_FLOAT_2ADDR:
+ case Instruction::REM_FLOAT:
+ case Instruction::NEG_FLOAT: {
return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, rlSrc2);
}
default:
@@ -74,25 +74,25 @@
RegLocation rlResult;
switch (mir->dalvikInsn.opcode) {
- case OP_ADD_DOUBLE_2ADDR:
- case OP_ADD_DOUBLE:
+ case Instruction::ADD_DOUBLE_2ADDR:
+ case Instruction::ADD_DOUBLE:
op = kMipsFaddd;
break;
- case OP_SUB_DOUBLE_2ADDR:
- case OP_SUB_DOUBLE:
+ case Instruction::SUB_DOUBLE_2ADDR:
+ case Instruction::SUB_DOUBLE:
op = kMipsFsubd;
break;
- case OP_DIV_DOUBLE_2ADDR:
- case OP_DIV_DOUBLE:
+ case Instruction::DIV_DOUBLE_2ADDR:
+ case Instruction::DIV_DOUBLE:
op = kMipsFdivd;
break;
- case OP_MUL_DOUBLE_2ADDR:
- case OP_MUL_DOUBLE:
+ case Instruction::MUL_DOUBLE_2ADDR:
+ case Instruction::MUL_DOUBLE:
op = kMipsFmuld;
break;
- case OP_REM_DOUBLE_2ADDR:
- case OP_REM_DOUBLE:
- case OP_NEG_DOUBLE: {
+ case Instruction::REM_DOUBLE_2ADDR:
+ case Instruction::REM_DOUBLE:
+ case Instruction::NEG_DOUBLE: {
return genArithOpDoublePortable(cUnit, mir, rlDest, rlSrc1, rlSrc2);
}
default:
@@ -118,7 +118,7 @@
static bool genConversion(CompilationUnit *cUnit, MIR *mir)
{
#ifdef __mips_hard_float
- Opcode opcode = mir->dalvikInsn.opcode;
+ Instruction::Code opcode = mir->dalvikInsn.opcode;
bool longSrc = false;
bool longDest = false;
RegLocation rlSrc;
@@ -127,32 +127,32 @@
int srcReg;
RegLocation rlResult;
switch (opcode) {
- case OP_INT_TO_FLOAT:
+ case Instruction::INT_TO_FLOAT:
longSrc = false;
longDest = false;
op = kMipsFcvtsw;
break;
- case OP_DOUBLE_TO_FLOAT:
+ case Instruction::DOUBLE_TO_FLOAT:
longSrc = true;
longDest = false;
op = kMipsFcvtsd;
break;
- case OP_FLOAT_TO_DOUBLE:
+ case Instruction::FLOAT_TO_DOUBLE:
longSrc = false;
longDest = true;
op = kMipsFcvtds;
break;
- case OP_INT_TO_DOUBLE:
+ case Instruction::INT_TO_DOUBLE:
longSrc = false;
longDest = true;
op = kMipsFcvtdw;
break;
- case OP_FLOAT_TO_INT:
- case OP_DOUBLE_TO_INT:
- case OP_LONG_TO_DOUBLE:
- case OP_FLOAT_TO_LONG:
- case OP_LONG_TO_FLOAT:
- case OP_DOUBLE_TO_LONG:
+ case Instruction::FLOAT_TO_INT:
+ case Instruction::DOUBLE_TO_INT:
+ case Instruction::LONG_TO_DOUBLE:
+ case Instruction::FLOAT_TO_LONG:
+ case Instruction::LONG_TO_FLOAT:
+ case Instruction::DOUBLE_TO_LONG:
return genConversionPortable(cUnit, mir);
default:
return true;
@@ -190,18 +190,18 @@
int offset;
switch(mir->dalvikInsn.opcode) {
- case OP_CMPL_FLOAT:
+ case Instruction::CMPL_FLOAT:
offset = OFFSETOF_MEMBER(Thread, pCmplFloat);
wide = false;
break;
- case OP_CMPG_FLOAT:
+ case Instruction::CMPG_FLOAT:
offset = OFFSETOF_MEMBER(Thread, pCmpgFloat);
wide = false;
break;
- case OP_CMPL_DOUBLE:
+ case Instruction::CMPL_DOUBLE:
offset = OFFSETOF_MEMBER(Thread, pCmplDouble);
break;
- case OP_CMPG_DOUBLE:
+ case Instruction::CMPG_DOUBLE:
offset = OFFSETOF_MEMBER(Thread, pCmpgDouble);
break;
default:
diff --git a/src/compiler/codegen/x86/FP/X86FP.cc b/src/compiler/codegen/x86/FP/X86FP.cc
index 57cde49..5e59b56 100644
--- a/src/compiler/codegen/x86/FP/X86FP.cc
+++ b/src/compiler/codegen/x86/FP/X86FP.cc
@@ -30,25 +30,25 @@
* the handlers.
*/
switch (mir->dalvikInsn.opcode) {
- case OP_ADD_FLOAT_2ADDR:
- case OP_ADD_FLOAT:
+ case Instruction::ADD_FLOAT_2ADDR:
+ case Instruction::ADD_FLOAT:
op = kX86Fadds;
break;
- case OP_SUB_FLOAT_2ADDR:
- case OP_SUB_FLOAT:
+ case Instruction::SUB_FLOAT_2ADDR:
+ case Instruction::SUB_FLOAT:
op = kX86Fsubs;
break;
- case OP_DIV_FLOAT_2ADDR:
- case OP_DIV_FLOAT:
+ case Instruction::DIV_FLOAT_2ADDR:
+ case Instruction::DIV_FLOAT:
op = kX86Fdivs;
break;
- case OP_MUL_FLOAT_2ADDR:
- case OP_MUL_FLOAT:
+ case Instruction::MUL_FLOAT_2ADDR:
+ case Instruction::MUL_FLOAT:
op = kX86Fmuls;
break;
- case OP_REM_FLOAT_2ADDR:
- case OP_REM_FLOAT:
- case OP_NEG_FLOAT: {
+ case Instruction::REM_FLOAT_2ADDR:
+ case Instruction::REM_FLOAT:
+ case Instruction::NEG_FLOAT: {
return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, rlSrc2);
}
default:
@@ -76,25 +76,25 @@
RegLocation rlResult;
switch (mir->dalvikInsn.opcode) {
- case OP_ADD_DOUBLE_2ADDR:
- case OP_ADD_DOUBLE:
+ case Instruction::ADD_DOUBLE_2ADDR:
+ case Instruction::ADD_DOUBLE:
op = kX86Faddd;
break;
- case OP_SUB_DOUBLE_2ADDR:
- case OP_SUB_DOUBLE:
+ case Instruction::SUB_DOUBLE_2ADDR:
+ case Instruction::SUB_DOUBLE:
op = kX86Fsubd;
break;
- case OP_DIV_DOUBLE_2ADDR:
- case OP_DIV_DOUBLE:
+ case Instruction::DIV_DOUBLE_2ADDR:
+ case Instruction::DIV_DOUBLE:
op = kX86Fdivd;
break;
- case OP_MUL_DOUBLE_2ADDR:
- case OP_MUL_DOUBLE:
+ case Instruction::MUL_DOUBLE_2ADDR:
+ case Instruction::MUL_DOUBLE:
op = kX86Fmuld;
break;
- case OP_REM_DOUBLE_2ADDR:
- case OP_REM_DOUBLE:
- case OP_NEG_DOUBLE: {
+ case Instruction::REM_DOUBLE_2ADDR:
+ case Instruction::REM_DOUBLE:
+ case Instruction::NEG_DOUBLE: {
return genArithOpDoublePortable(cUnit, mir, rlDest, rlSrc1, rlSrc2);
}
default:
@@ -120,7 +120,7 @@
UNIMPLEMENTED(WARNING) << "genConversion";
return false;
#if 0
- Opcode opcode = mir->dalvikInsn.opcode;
+ Instruction::Code opcode = mir->dalvikInsn.opcode;
bool longSrc = false;
bool longDest = false;
RegLocation rlSrc;
@@ -129,32 +129,32 @@
int srcReg;
RegLocation rlResult;
switch (opcode) {
- case OP_INT_TO_FLOAT:
+ case Instruction::INT_TO_FLOAT:
longSrc = false;
longDest = false;
op = kX86Fcvtsw;
break;
- case OP_DOUBLE_TO_FLOAT:
+ case Instruction::DOUBLE_TO_FLOAT:
longSrc = true;
longDest = false;
op = kX86Fcvtsd;
break;
- case OP_FLOAT_TO_DOUBLE:
+ case Instruction::FLOAT_TO_DOUBLE:
longSrc = false;
longDest = true;
op = kX86Fcvtds;
break;
- case OP_INT_TO_DOUBLE:
+ case Instruction::INT_TO_DOUBLE:
longSrc = false;
longDest = true;
op = kX86Fcvtdw;
break;
- case OP_FLOAT_TO_INT:
- case OP_DOUBLE_TO_INT:
- case OP_LONG_TO_DOUBLE:
- case OP_FLOAT_TO_LONG:
- case OP_LONG_TO_FLOAT:
- case OP_DOUBLE_TO_LONG:
+ case Instruction::FLOAT_TO_INT:
+ case Instruction::DOUBLE_TO_INT:
+ case Instruction::LONG_TO_DOUBLE:
+ case Instruction::FLOAT_TO_LONG:
+ case Instruction::LONG_TO_FLOAT:
+ case Instruction::DOUBLE_TO_LONG:
return genConversionPortable(cUnit, mir);
default:
return true;
@@ -192,18 +192,18 @@
int offset;
switch(mir->dalvikInsn.opcode) {
- case OP_CMPL_FLOAT:
+ case Instruction::CMPL_FLOAT:
offset = OFFSETOF_MEMBER(Thread, pCmplFloat);
wide = false;
break;
- case OP_CMPG_FLOAT:
+ case Instruction::CMPG_FLOAT:
offset = OFFSETOF_MEMBER(Thread, pCmpgFloat);
wide = false;
break;
- case OP_CMPL_DOUBLE:
+ case Instruction::CMPL_DOUBLE:
offset = OFFSETOF_MEMBER(Thread, pCmplDouble);
break;
- case OP_CMPG_DOUBLE:
+ case Instruction::CMPG_DOUBLE:
offset = OFFSETOF_MEMBER(Thread, pCmpgDouble);
break;
default: