Remove all TARGET_[ARM|X86|MIPS] #ifdefs

Two steps forward, one step back towards elimination of the
"#include" build model for target-specific compilers.  This CL
does some restructuring to eliminate all of the TARGET_xxx #ifdefs
and convert them to run-time tests.

Considerable work is still required to fully eliminate the multiple
builds.  In particular, much of the "common" codegen code relies on
macros defined by the target-specific [Arm|X86|Mips]Lir.h include file.

Next step is more restructuring to better isolate target-independent
code generation code.

Change-Id: If6efbde65c48031a48423344d8dc3e2ff2c4ad9d
diff --git a/src/compiler/codegen/mips/ArchFactory.cc b/src/compiler/codegen/mips/ArchFactory.cc
index e2d9e91..e5dc98f 100644
--- a/src/compiler/codegen/mips/ArchFactory.cc
+++ b/src/compiler/codegen/mips/ArchFactory.cc
@@ -14,13 +14,7 @@
  * limitations under the License.
  */
 
-/*
- * This file contains mips-specific codegen factory support.
- * It is included by
- *
- *        Codegen-$(TARGET_ARCH_VARIANT).c
- *
- */
+/* This file contains mips-specific codegen factory support. */
 
 #include "oat/runtime/oat_support_entrypoints.h"
 
@@ -97,8 +91,6 @@
   return false;
 }
 
-void genDebuggerUpdate(CompilationUnit* cUnit, int32_t offset);
-
 /*
  * In the Arm code a it is typical to use the link register
  * to hold the target address.  However, for Mips we must
@@ -185,13 +177,6 @@
 
   flushIns(cUnit, argLocs, rlMethod);
 
-  if (cUnit->genDebugger) {
-    // Refresh update debugger callout
-    loadWordDisp(cUnit, rSELF,
-                 ENTRYPOINT_OFFSET(pUpdateDebuggerFromCode), rSUSPEND);
-    genDebuggerUpdate(cUnit, DEBUGGER_METHOD_ENTRY);
-  }
-
   oatFreeTemp(cUnit, rARG0);
   oatFreeTemp(cUnit, rARG1);
   oatFreeTemp(cUnit, rARG2);
@@ -208,10 +193,6 @@
   oatLockTemp(cUnit, rRET1);
 
   newLIR0(cUnit, kPseudoMethodExit);
-  /* If we're compiling for the debugger, generate an update callout */
-  if (cUnit->genDebugger) {
-    genDebuggerUpdate(cUnit, DEBUGGER_METHOD_EXIT);
-  }
   unSpillCoreRegs(cUnit);
   opReg(cUnit, kOpBx, r_RA);
 }
@@ -274,4 +255,27 @@
   return oatArchVariantInit();
 }
 
+bool genAndLong(CompilationUnit* cUnit, RegLocation rlDest,
+                RegLocation rlSrc1, RegLocation rlSrc2)
+{
+  LOG(FATAL) << "Unexpected use of genAndLong for Mips";
+  return false;
+}
+
+bool genOrLong(CompilationUnit* cUnit, RegLocation rlDest,
+               RegLocation rlSrc1, RegLocation rlSrc2)
+{
+  LOG(FATAL) << "Unexpected use of genOrLong for Mips";
+  return false;
+}
+
+bool genXorLong(CompilationUnit* cUnit, RegLocation rlDest,
+               RegLocation rlSrc1, RegLocation rlSrc2)
+{
+  LOG(FATAL) << "Unexpected use of genXorLong for Mips";
+  return false;
+}
+
+
+
 }  // namespace art