diff --git a/Android.mk b/Android.mk
index 4e4928c..ebebc61 100644
--- a/Android.mk
+++ b/Android.mk
@@ -334,7 +334,7 @@
 .PHONY: cpplint-art
 cpplint-art:
 	./art/tools/cpplint.py \
-	    --filter=-,+build/header_guard,+whitespace/braces \
+	    --filter=-,+build/header_guard,+whitespace/braces,+whitespace/comma,+runtime/explicit \
 	    $(shell find art -name *.h -o -name *$(ART_CPP_EXTENSION))
 
 # "mm cpplint-art-aspirational" to see warnings we would like to fix
diff --git a/compiler/dex/mir_graph.cc b/compiler/dex/mir_graph.cc
index ef9955e..a9af477 100644
--- a/compiler/dex/mir_graph.cc
+++ b/compiler/dex/mir_graph.cc
@@ -922,7 +922,7 @@
     str.append(StringPrintf(" %s = (%s",
                GetSSANameWithConst(ssa_rep->defs[0], true).c_str(),
                GetSSANameWithConst(ssa_rep->uses[0], true).c_str()));
-    str.append(StringPrintf(":%d",incoming[0]));
+    str.append(StringPrintf(":%d", incoming[0]));
     int i;
     for (i = 1; i < uses; i++) {
       str.append(StringPrintf(", %s:%d",
@@ -1011,8 +1011,8 @@
 /* Turn method name into a legal Linux file name */
 void MIRGraph::ReplaceSpecialChars(std::string& str) {
   static const struct { const char before; const char after; } match[] =
-      {{'/','-'}, {';','#'}, {' ','#'}, {'$','+'},
-       {'(','@'}, {')','@'}, {'<','='}, {'>','='}};
+      {{'/', '-'}, {';', '#'}, {' ', '#'}, {'$', '+'},
+       {'(', '@'}, {')', '@'}, {'<', '='}, {'>', '='}};
   for (unsigned int i = 0; i < sizeof(match)/sizeof(match[0]); i++) {
     std::replace(str.begin(), str.end(), match[i].before, match[i].after);
   }
@@ -1036,7 +1036,7 @@
       return StringPrintf("v%d_%d#0x%llx", SRegToVReg(ssa_reg), GetSSASubscript(ssa_reg),
                           ConstantValueWide(reg_location_[ssa_reg]));
     } else {
-      return StringPrintf("v%d_%d#0x%x", SRegToVReg(ssa_reg),GetSSASubscript(ssa_reg),
+      return StringPrintf("v%d_%d#0x%x", SRegToVReg(ssa_reg), GetSSASubscript(ssa_reg),
                           ConstantValue(reg_location_[ssa_reg]));
     }
   } else {
diff --git a/compiler/dex/mir_optimization.cc b/compiler/dex/mir_optimization.cc
index 306dbc7..882b81a 100644
--- a/compiler/dex/mir_optimization.cc
+++ b/compiler/dex/mir_optimization.cc
@@ -64,7 +64,7 @@
             SetConstantWide(mir->ssa_rep->defs[0], static_cast<int64_t>(vB));
             break;
           case Instruction::CONST_WIDE:
-            SetConstantWide(mir->ssa_rep->defs[0],d_insn->vB_wide);
+            SetConstantWide(mir->ssa_rep->defs[0], d_insn->vB_wide);
             break;
           case Instruction::CONST_WIDE_HIGH16:
             SetConstantWide(mir->ssa_rep->defs[0], static_cast<int64_t>(vB) << 48);
diff --git a/compiler/dex/quick/arm/arm_lir.h b/compiler/dex/quick/arm/arm_lir.h
index fca17a1..93fee05 100644
--- a/compiler/dex/quick/arm/arm_lir.h
+++ b/compiler/dex/quick/arm/arm_lir.h
@@ -113,12 +113,12 @@
  * rework is done in this area.  Also, it is a good reminder in the calling
  * code that reg locations always describe doubles as a pair of singles.
  */
-#define ARM_S2D(x,y) ((x) | ARM_FP_DOUBLE)
+#define ARM_S2D(x, y) ((x) | ARM_FP_DOUBLE)
 // Mask to strip off fp flags.
 #define ARM_FP_REG_MASK (ARM_FP_REG_OFFSET-1)
 
 // RegisterLocation templates return values (r0, or r0/r1).
-#define ARM_LOC_C_RETURN {kLocPhysReg, 0, 0, 0, 0, 0, 0, 0, 1, r0, INVALID_REG,\
+#define ARM_LOC_C_RETURN {kLocPhysReg, 0, 0, 0, 0, 0, 0, 0, 1, r0, INVALID_REG, \
                           INVALID_SREG, INVALID_SREG}
 #define ARM_LOC_C_RETURN_WIDE {kLocPhysReg, 1, 0, 0, 0, 0, 0, 0, 1, r0, r1, \
                                INVALID_SREG, INVALID_SREG}
diff --git a/compiler/dex/quick/arm/assemble_arm.cc b/compiler/dex/quick/arm/assemble_arm.cc
index 9e14457..f4aa1f3 100644
--- a/compiler/dex/quick/arm/assemble_arm.cc
+++ b/compiler/dex/quick/arm/assemble_arm.cc
@@ -875,7 +875,7 @@
     ENCODING_MAP(kThumb2Dmb,         0xf3bf8f50,
                  kFmtBitBlt, 3, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,
                  kFmtUnused, -1, -1, IS_UNARY_OP,
-                 "dmb","#!0B",4),
+                 "dmb", "#!0B", 4),
     ENCODING_MAP(kThumb2LdrPcReln12,       0xf85f0000,
                  kFmtBitBlt, 15, 12, kFmtBitBlt, 11, 0, kFmtUnused, -1, -1,
                  kFmtUnused, -1, -1,
diff --git a/compiler/dex/quick/arm/int_arm.cc b/compiler/dex/quick/arm/int_arm.cc
index ee2d76c..e12df6c 100644
--- a/compiler/dex/quick/arm/int_arm.cc
+++ b/compiler/dex/quick/arm/int_arm.cc
@@ -183,7 +183,7 @@
   int dest_sreg = mir->ssa_rep->defs[0];
   if ((dest_sreg < 0) || (dest_sreg >= mir_graph_->GetNumSSARegs())) {
     LOG(INFO) << "Bad target sreg: " << dest_sreg << ", in "
-              << PrettyMethod(cu_->method_idx,*cu_->dex_file);
+              << PrettyMethod(cu_->method_idx, *cu_->dex_file);
     LOG(INFO) << "at dex offset 0x" << std::hex << mir->offset;
     LOG(INFO) << "vreg = " << mir_graph_->SRegToVReg(dest_sreg);
     LOG(INFO) << "num uses = " << mir->ssa_rep->num_uses;
diff --git a/compiler/dex/quick/arm/target_arm.cc b/compiler/dex/quick/arm/target_arm.cc
index 7021593..441445d 100644
--- a/compiler/dex/quick/arm/target_arm.cc
+++ b/compiler/dex/quick/arm/target_arm.cc
@@ -272,7 +272,7 @@
 static char*  DecodeFPCSRegList(int count, int base, char* buf) {
   sprintf(buf, "s%d", base);
   for (int i = 1; i < count; i++) {
-    sprintf(buf + strlen(buf), ", s%d",base + i);
+    sprintf(buf + strlen(buf), ", s%d", base + i);
   }
   return buf;
 }
@@ -296,8 +296,8 @@
   return bits >> (((value & 0xf80) >> 7) - 8);
 }
 
-const char* cc_names[] = {"eq","ne","cs","cc","mi","pl","vs","vc",
-                         "hi","ls","ge","lt","gt","le","al","nv"};
+const char* cc_names[] = {"eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc",
+                         "hi", "ls", "ge", "lt", "gt", "le", "al", "nv"};
 /*
  * Interpret a format string and build a string no longer than size
  * See format key in Assemble.c.
@@ -324,9 +324,9 @@
          switch (*fmt++) {
            case 'H':
              if (operand != 0) {
-               sprintf(tbuf, ", %s %d",shift_names[operand & 0x3], operand >> 2);
+               sprintf(tbuf, ", %s %d", shift_names[operand & 0x3], operand >> 2);
              } else {
-               strcpy(tbuf,"");
+               strcpy(tbuf, "");
              }
              break;
            case 'B':
@@ -356,7 +356,7 @@
              strcpy(tbuf, name);
              break;
            case 'b':
-             strcpy(tbuf,"0000");
+             strcpy(tbuf, "0000");
              for (i=3; i>= 0; i--) {
                tbuf[i] += operand & 1;
                operand >>= 1;
@@ -364,41 +364,41 @@
              break;
            case 'n':
              operand = ~ExpandImmediate(operand);
-             sprintf(tbuf,"%d [%#x]", operand, operand);
+             sprintf(tbuf, "%d [%#x]", operand, operand);
              break;
            case 'm':
              operand = ExpandImmediate(operand);
-             sprintf(tbuf,"%d [%#x]", operand, operand);
+             sprintf(tbuf, "%d [%#x]", operand, operand);
              break;
            case 's':
-             sprintf(tbuf,"s%d",operand & ARM_FP_REG_MASK);
+             sprintf(tbuf, "s%d", operand & ARM_FP_REG_MASK);
              break;
            case 'S':
-             sprintf(tbuf,"d%d",(operand & ARM_FP_REG_MASK) >> 1);
+             sprintf(tbuf, "d%d", (operand & ARM_FP_REG_MASK) >> 1);
              break;
            case 'h':
-             sprintf(tbuf,"%04x", operand);
+             sprintf(tbuf, "%04x", operand);
              break;
            case 'M':
            case 'd':
-             sprintf(tbuf,"%d", operand);
+             sprintf(tbuf, "%d", operand);
              break;
            case 'C':
              DCHECK_LT(operand, static_cast<int>(
                  sizeof(core_reg_names)/sizeof(core_reg_names[0])));
-             sprintf(tbuf,"%s",core_reg_names[operand]);
+             sprintf(tbuf, "%s", core_reg_names[operand]);
              break;
            case 'E':
-             sprintf(tbuf,"%d", operand*4);
+             sprintf(tbuf, "%d", operand*4);
              break;
            case 'F':
-             sprintf(tbuf,"%d", operand*2);
+             sprintf(tbuf, "%d", operand*2);
              break;
            case 'c':
              strcpy(tbuf, cc_names[operand]);
              break;
            case 't':
-             sprintf(tbuf,"0x%08x (L%p)",
+             sprintf(tbuf, "0x%08x (L%p)",
                  reinterpret_cast<uintptr_t>(base_addr) + lir->offset + 4 +
                  (operand << 1),
                  lir->target);
@@ -428,7 +428,7 @@
              DecodeFPCSRegList(operand, 0, tbuf);
              break;
            default:
-             strcpy(tbuf,"DecodeError1");
+             strcpy(tbuf, "DecodeError1");
              break;
         }
         buf += tbuf;
diff --git a/compiler/dex/quick/mips/mips_lir.h b/compiler/dex/quick/mips/mips_lir.h
index 8a99e93..ce25d73 100644
--- a/compiler/dex/quick/mips/mips_lir.h
+++ b/compiler/dex/quick/mips/mips_lir.h
@@ -105,7 +105,7 @@
  * rework is done in this area.  Also, it is a good reminder in the calling
  * code that reg locations always describe doubles as a pair of singles.
  */
-#define MIPS_S2D(x,y) ((x) | MIPS_FP_DOUBLE)
+#define MIPS_S2D(x, y) ((x) | MIPS_FP_DOUBLE)
 // Mask to strip off fp flags.
 #define MIPS_FP_REG_MASK (MIPS_FP_REG_OFFSET-1)
 
@@ -148,7 +148,7 @@
                                  INVALID_REG, INVALID_SREG, INVALID_SREG}
 #define MIPS_LOC_C_RETURN_WIDE {kLocPhysReg, 1, 0, 0, 0, 0, 0, 0, 1, r_RESULT0, \
                                 r_RESULT1, INVALID_SREG, INVALID_SREG}
-#define MIPS_LOC_C_RETURN_DOUBLE {kLocPhysReg, 1, 0, 0, 0, 0, 0, 0, 1, r_FRESULT0,\
+#define MIPS_LOC_C_RETURN_DOUBLE {kLocPhysReg, 1, 0, 0, 0, 0, 0, 0, 1, r_FRESULT0, \
                                   r_FRESULT1, INVALID_SREG, INVALID_SREG}
 
 enum MipsResourceEncodingPos {
diff --git a/compiler/dex/quick/mips/target_mips.cc b/compiler/dex/quick/mips/target_mips.cc
index bd20e00..43e905c 100644
--- a/compiler/dex/quick/mips/target_mips.cc
+++ b/compiler/dex/quick/mips/target_mips.cc
@@ -172,41 +172,41 @@
          operand = lir->operands[nc-'0'];
          switch (*fmt++) {
            case 'b':
-             strcpy(tbuf,"0000");
+             strcpy(tbuf, "0000");
              for (i=3; i>= 0; i--) {
                tbuf[i] += operand & 1;
                operand >>= 1;
              }
              break;
            case 's':
-             sprintf(tbuf,"$f%d",operand & MIPS_FP_REG_MASK);
+             sprintf(tbuf, "$f%d", operand & MIPS_FP_REG_MASK);
              break;
            case 'S':
              DCHECK_EQ(((operand & MIPS_FP_REG_MASK) & 1), 0);
-             sprintf(tbuf,"$f%d",operand & MIPS_FP_REG_MASK);
+             sprintf(tbuf, "$f%d", operand & MIPS_FP_REG_MASK);
              break;
            case 'h':
-             sprintf(tbuf,"%04x", operand);
+             sprintf(tbuf, "%04x", operand);
              break;
            case 'M':
            case 'd':
-             sprintf(tbuf,"%d", operand);
+             sprintf(tbuf, "%d", operand);
              break;
            case 'D':
-             sprintf(tbuf,"%d", operand+1);
+             sprintf(tbuf, "%d", operand+1);
              break;
            case 'E':
-             sprintf(tbuf,"%d", operand*4);
+             sprintf(tbuf, "%d", operand*4);
              break;
            case 'F':
-             sprintf(tbuf,"%d", operand*2);
+             sprintf(tbuf, "%d", operand*2);
              break;
            case 't':
-             sprintf(tbuf,"0x%08x (L%p)", reinterpret_cast<uintptr_t>(base_addr) + lir->offset + 4 +
+             sprintf(tbuf, "0x%08x (L%p)", reinterpret_cast<uintptr_t>(base_addr) + lir->offset + 4 +
                      (operand << 2), lir->target);
              break;
            case 'T':
-             sprintf(tbuf,"0x%08x", operand << 2);
+             sprintf(tbuf, "0x%08x", operand << 2);
              break;
            case 'u': {
              int offset_1 = lir->operands[0];
@@ -231,7 +231,7 @@
              strcpy(tbuf, ";  nop");
              break;
            default:
-             strcpy(tbuf,"DecodeError");
+             strcpy(tbuf, "DecodeError");
              break;
          }
          buf += tbuf;
diff --git a/compiler/dex/quick/mips/utility_mips.cc b/compiler/dex/quick/mips/utility_mips.cc
index 089764f..1975d1a 100644
--- a/compiler/dex/quick/mips/utility_mips.cc
+++ b/compiler/dex/quick/mips/utility_mips.cc
@@ -24,7 +24,7 @@
 LIR* MipsMir2Lir::OpFpRegCopy(int r_dest, int r_src) {
   int opcode;
   /* must be both DOUBLE or both not DOUBLE */
-  DCHECK_EQ(MIPS_DOUBLEREG(r_dest),MIPS_DOUBLEREG(r_src));
+  DCHECK_EQ(MIPS_DOUBLEREG(r_dest), MIPS_DOUBLEREG(r_src));
   if (MIPS_DOUBLEREG(r_dest)) {
     opcode = kMipsFmovd;
   } else {
diff --git a/compiler/dex/quick/x86/assemble_x86.cc b/compiler/dex/quick/x86/assemble_x86.cc
index 4aeda41..d864115 100644
--- a/compiler/dex/quick/x86/assemble_x86.cc
+++ b/compiler/dex/quick/x86/assemble_x86.cc
@@ -323,7 +323,7 @@
   { kX86CallM, kCall, IS_BINARY_OP | IS_BRANCH | IS_LOAD | REG_USE0,        { 0,             0, 0xFF, 0,    0, 2, 0, 0 }, "CallM", "[!0r+!1d]" },
   { kX86CallA, kCall, IS_QUAD_OP   | IS_BRANCH | IS_LOAD | REG_USE01,       { 0,             0, 0xFF, 0,    0, 2, 0, 0 }, "CallA", "[!0r+!1r<<!2d+!3d]" },
   { kX86CallT, kCall, IS_UNARY_OP  | IS_BRANCH | IS_LOAD,                   { THREAD_PREFIX, 0, 0xFF, 0,    0, 2, 0, 0 }, "CallT", "fs:[!0d]" },
-  { kX86Ret,   kNullary,NO_OPERAND | IS_BRANCH,                             { 0,             0, 0xC3, 0,    0, 0, 0, 0 }, "Ret", "" },
+  { kX86Ret,   kNullary, NO_OPERAND | IS_BRANCH,                            { 0,             0, 0xC3, 0,    0, 0, 0, 0 }, "Ret", "" },
 
   { kX86StartOfMethod, kMacro,  IS_UNARY_OP | SETS_CCODES,             { 0, 0, 0,    0, 0, 0, 0, 0 }, "StartOfMethod", "!0r" },
   { kX86PcRelLoadRA,   kPcRel,  IS_LOAD | IS_QUIN_OP | REG_DEF0_USE12, { 0, 0, 0x8B, 0, 0, 0, 0, 0 }, "PcRelLoadRA",   "!0r,[!1r+!2r<<!3d+!4p]" },
diff --git a/compiler/dex/quick/x86/x86_lir.h b/compiler/dex/quick/x86/x86_lir.h
index a39231b..73e562e 100644
--- a/compiler/dex/quick/x86/x86_lir.h
+++ b/compiler/dex/quick/x86/x86_lir.h
@@ -123,7 +123,7 @@
  * rework is done in this area.  Also, it is a good reminder in the calling
  * code that reg locations always describe doubles as a pair of singles.
  */
-#define X86_S2D(x,y) ((x) | X86_FP_DOUBLE)
+#define X86_S2D(x, y) ((x) | X86_FP_DOUBLE)
 /* Mask to strip off fp flags */
 #define X86_FP_REG_MASK 0xF
 
diff --git a/compiler/dex/vreg_analysis.cc b/compiler/dex/vreg_analysis.cc
index 8df6dd9..10bbd1f 100644
--- a/compiler/dex/vreg_analysis.cc
+++ b/compiler/dex/vreg_analysis.cc
@@ -240,7 +240,7 @@
                 reg_location_[ssa_rep->uses[i+1]].wide = true;
                 reg_location_[ssa_rep->uses[i+1]].high_word = true;
                 DCHECK_EQ(SRegToVReg(ssa_rep->uses[i])+1, SRegToVReg(ssa_rep->uses[i+1]));
-                changed |= SetCore(ssa_rep->uses[i],true);
+                changed |= SetCore(ssa_rep->uses[i], true);
                 i++;
                 break;
               case 'F':
diff --git a/runtime/base/macros.h b/runtime/base/macros.h
index 4a196f2..44a7f1e 100644
--- a/runtime/base/macros.h
+++ b/runtime/base/macros.h
@@ -125,7 +125,7 @@
 #define OFFSETOF_VOLATILE_MEMBER(t, f) \
   (reinterpret_cast<volatile char*>(&reinterpret_cast<t*>(16)->f) - reinterpret_cast<volatile char*>(16)) // NOLINT
 
-#define PACKED(x) __attribute__ ((__aligned__(x),__packed__))
+#define PACKED(x) __attribute__ ((__aligned__(x), __packed__))
 
 #define LIKELY(x)       __builtin_expect((x), true)
 #define UNLIKELY(x)     __builtin_expect((x), false)
diff --git a/runtime/gc/allocator/dlmalloc.cc b/runtime/gc/allocator/dlmalloc.cc
index 7584b6e..7725215 100644
--- a/runtime/gc/allocator/dlmalloc.cc
+++ b/runtime/gc/allocator/dlmalloc.cc
@@ -27,7 +27,7 @@
 static void art_heap_corruption(const char* function);
 static void art_heap_usage_error(const char* function, void* p);
 #define CORRUPTION_ERROR_ACTION(m) art_heap_corruption(__FUNCTION__)
-#define USAGE_ERROR_ACTION(m,p) art_heap_usage_error(__FUNCTION__, p)
+#define USAGE_ERROR_ACTION(m, p) art_heap_usage_error(__FUNCTION__, p)
 
 // Ugly inclusion of C file so that ART specific #defines configure dlmalloc for our use for
 // mspaces (regular dlmalloc is still declared in bionic).
diff --git a/runtime/runtime.cc b/runtime/runtime.cc
index 14d4c8a..ba18311 100644
--- a/runtime/runtime.cc
+++ b/runtime/runtime.cc
@@ -709,7 +709,7 @@
 // Do zygote-mode-only initialization.
 bool Runtime::InitZygote() {
   // zygote goes into its own process group
-  setpgid(0,0);
+  setpgid(0, 0);
 
   // See storage config details at http://source.android.com/tech/storage/
   // Create private mount namespace shared by all children
diff --git a/runtime/thread.cc b/runtime/thread.cc
index 0020d52..269d58e 100644
--- a/runtime/thread.cc
+++ b/runtime/thread.cc
@@ -626,7 +626,7 @@
         ScopedLocalRef<jstring> scoped_name_string(env,
                                                    (jstring)env->GetObjectField(peer,
                                                               WellKnownClasses::java_lang_Thread_name));
-        ScopedUtfChars scoped_name_chars(env,scoped_name_string.get());
+        ScopedUtfChars scoped_name_chars(env, scoped_name_string.get());
         if (scoped_name_chars.c_str() == NULL) {
             LOG(WARNING) << "No such thread for suspend: " << peer;
             env->ExceptionClear();
diff --git a/runtime/verifier/reg_type.h b/runtime/verifier/reg_type.h
index 1553f1e..c66e7cb 100644
--- a/runtime/verifier/reg_type.h
+++ b/runtime/verifier/reg_type.h
@@ -889,7 +889,7 @@
   UnresolvedMergedType(uint16_t left_id, uint16_t right_id, const RegTypeCache* reg_type_cache,
                        uint16_t cache_id)
       SHARED_LOCKS_REQUIRED(Locks::mutator_lock_)
-      : UnresolvedType("", cache_id), reg_type_cache_(reg_type_cache) ,merged_types_(left_id, right_id) {
+      : UnresolvedType("", cache_id), reg_type_cache_(reg_type_cache), merged_types_(left_id, right_id) {
     if (kIsDebugBuild) {
       CheckInvariants();
     }