commit b41b33b5e5f08083e35f84818b4f44d26feb4a8b
author Ian Rogers <irogers@google.com> Tue Mar 20 14:22:54 2012 -0700
committer Ian Rogers <irogers@google.com> Tue Mar 20 14:24:39 2012 -0700
tree a888c3c40bd6070acc459700ed5c79055c6984f4
parent 49ac9bfa63aea6d331e4c9aa5011953777bf98ad

Add 3rd argument register to X86.

Implement more instructions.

Change-Id: I3af7bbaf18eedc6537f1cfc2d57c4f6106fb5164

src/compiler/codegen/GenInvoke.cc

diff --git a/src/compiler/codegen/GenInvoke.cc b/src/compiler/codegen/GenInvoke.cc
index 037a9bb..ebc8bc2 100644
--- a/src/compiler/codegen/GenInvoke.cc
+++ b/src/compiler/codegen/GenInvoke.cc
@@ -51,13 +51,8 @@
 
     if (cUnit->numIns == 0)
         return;
-#if !defined(TARGET_X86)
     const int numArgRegs = 3;
     static int argRegs[] = {rARG1, rARG2, rARG3};
-#else
-    const int numArgRegs = 2;
-    static int argRegs[] = {rARG1, rARG2};
-#endif
     int startVReg = cUnit->numDalvikRegisters - cUnit->numIns;
     /*
      * Copy incoming arguments to their proper home locations.
@@ -425,11 +420,7 @@
                 reg = rlArg.highReg;
             } else {
                 // rARG2 & rARG3 can safely be used here
-#if defined(TARGET_X86)
-                UNIMPLEMENTED(FATAL);
-#else
                 reg = rARG3;
-#endif
                 loadWordDisp(cUnit, rSP,
                              oatSRegOffset(cUnit, rlArg.sRegLow) + 4, reg);
                 callState = nextCallInsn(cUnit, mir, callState, dexIdx,
@@ -453,12 +444,8 @@
                 highReg = rlArg.highReg;
             } else {
                 lowReg = rARG2;
-#if defined(TARGET_X86)
-                UNIMPLEMENTED(FATAL);
-#else
-                highReg = rARG3;
-#endif
                 if (rlArg.wide) {
+                    highReg = rARG3;
                     loadValueDirectWideFixed(cUnit, rlArg, lowReg, highReg);
                 } else {
                     loadValueDirectFixed(cUnit, rlArg, lowReg);