diff --git a/src/compiler/Ralloc.cc b/src/compiler/Ralloc.cc
index 0062f53..ea4d6c1 100644
--- a/src/compiler/Ralloc.cc
+++ b/src/compiler/Ralloc.cc
@@ -180,6 +180,36 @@
         }
       }
 
+      // Special-case return handling
+      if ((mir->dalvikInsn.opcode == Instruction::RETURN) ||
+          (mir->dalvikInsn.opcode == Instruction::RETURN_WIDE) ||
+          (mir->dalvikInsn.opcode == Instruction::RETURN_OBJECT)) {
+        switch(cUnit->shorty[0]) {
+            case 'I':
+              changed |= setCore(cUnit, ssaRep->uses[0], true);
+              break;
+            case 'J':
+              changed |= setCore(cUnit, ssaRep->uses[0], true);
+              changed |= setCore(cUnit, ssaRep->uses[1], true);
+              cUnit->regLocation[ssaRep->uses[0]].wide = true;
+              cUnit->regLocation[ssaRep->uses[1]].highWord = true;
+              break;
+            case 'F':
+              changed |= setFp(cUnit, ssaRep->uses[0], true);
+              break;
+            case 'D':
+              changed |= setFp(cUnit, ssaRep->uses[0], true);
+              changed |= setFp(cUnit, ssaRep->uses[1], true);
+              cUnit->regLocation[ssaRep->uses[0]].wide = true;
+              cUnit->regLocation[ssaRep->uses[1]].highWord = true;
+              break;
+            case 'L':
+              changed |= setRef(cUnit, ssaRep->uses[0], true);
+              break;
+            default: break;
+        }
+      }
+
       // Special-case handling for format 35c/3rc invokes
       Instruction::Code opcode = mir->dalvikInsn.opcode;
       int flags = (static_cast<int>(opcode) >= kNumPackedOpcodes)
@@ -322,7 +352,8 @@
   for (int i = 0; i < count; i++) {
     LOG(INFO) << StringPrintf("Loc[%02d] : %s, %c %c %c %c %c %c%d %c%d S%d",
         i, storageName[table[i].location], table[i].wide ? 'W' : 'N',
-        table[i].defined ? 'D' : 'U', table[i].fp ? 'F' : 'C',
+        table[i].defined ? 'D' : 'U',
+        table[i].fp ? 'F' : table[i].ref ? 'R' :'C',
         table[i].highWord ? 'H' : 'L', table[i].home ? 'h' : 't',
         oatIsFpReg(table[i].lowReg) ? 's' : 'r',
         table[i].lowReg & oatFpRegMask(),
@@ -418,15 +449,19 @@
           cUnit->regLocation[sReg].core = true;
           cUnit->regLocation[sReg].defined = true;
           sReg++;
-            break;
-          case 'F':
-            cUnit->regLocation[sReg].fp = true;
-            cUnit->regLocation[sReg].defined = true;
-            break;
-          default:
-            cUnit->regLocation[sReg].core = true;
-            cUnit->regLocation[sReg].defined = true;
-            break;
+          break;
+        case 'F':
+          cUnit->regLocation[sReg].fp = true;
+          cUnit->regLocation[sReg].defined = true;
+          break;
+        case 'L':
+          cUnit->regLocation[sReg].ref = true;
+          cUnit->regLocation[sReg].defined = true;
+          break;
+        default:
+          cUnit->regLocation[sReg].core = true;
+          cUnit->regLocation[sReg].defined = true;
+          break;
         }
         sReg++;
       }
diff --git a/src/compiler/codegen/MethodBitcode.cc b/src/compiler/codegen/MethodBitcode.cc
index 89c11c6..3eb6a89 100644
--- a/src/compiler/codegen/MethodBitcode.cc
+++ b/src/compiler/codegen/MethodBitcode.cc
@@ -2344,6 +2344,8 @@
   // TODO: handle fused CMP_LONG/IF_xxZ case
   if (llvm::ConstantInt* src2 = llvm::dyn_cast<llvm::ConstantInt>(rhs)) {
     opRegImm(cUnit, kOpCmp, rlSrc1.lowReg, src2->getSExtValue());
+  } else if (llvm::dyn_cast<llvm::ConstantPointerNull>(rhs) != NULL) {
+    opRegImm(cUnit, kOpCmp, rlSrc1.lowReg, 0);
   } else {
     RegLocation rlSrc2 = getLoc(cUnit, rhs);
     rlSrc2 = loadValue(cUnit, rlSrc2, kCoreReg);