Compiler: GBC fix, CFG dump enhancements
Repaired some GBC generation bit rot, fixed a syntax error in
.dot cfg file generation, enhanced cfg generation to work before
SSA renaming and added new cfg dump points.
Change-Id: Id73b479209ea4d963810f67bde0ed502ed7361d3
diff --git a/src/compiler/codegen/gen_loadstore.cc b/src/compiler/codegen/gen_loadstore.cc
index eec74af..6c16d40 100644
--- a/src/compiler/codegen/gen_loadstore.cc
+++ b/src/compiler/codegen/gen_loadstore.cc
@@ -46,15 +46,18 @@
int pmap_index = SRegToPMap(cu, rl_dest.s_reg_low);
if (cu->promotion_map[pmap_index].fp_location == kLocPhysReg) {
// Now, determine if this vreg is ever used as a reference. If not, we're done.
- bool used_as_reference = false;
- int base_vreg = SRegToVReg(cu, rl_dest.s_reg_low);
- for (int i = 0; !used_as_reference && (i < cu->num_ssa_regs); i++) {
- if (SRegToVReg(cu, cu->reg_location[i].s_reg_low) == base_vreg) {
- used_as_reference |= cu->reg_location[i].ref;
+ if (!cu->gen_bitcode) {
+ // TUNING: We no longer have this info for QuickGBC - assume the worst
+ bool used_as_reference = false;
+ int base_vreg = SRegToVReg(cu, rl_dest.s_reg_low);
+ for (int i = 0; !used_as_reference && (i < cu->num_ssa_regs); i++) {
+ if (SRegToVReg(cu, cu->reg_location[i].s_reg_low) == base_vreg) {
+ used_as_reference |= cu->reg_location[i].ref;
+ }
}
- }
- if (!used_as_reference) {
- return;
+ if (!used_as_reference) {
+ return;
+ }
}
if (cu->promotion_map[pmap_index].core_location == kLocPhysReg) {
// Promoted - just copy in a zero
diff --git a/src/compiler/codegen/mir_to_gbc.cc b/src/compiler/codegen/mir_to_gbc.cc
index 6758bb9..e1e1fb1 100644
--- a/src/compiler/codegen/mir_to_gbc.cc
+++ b/src/compiler/codegen/mir_to_gbc.cc
@@ -1643,6 +1643,9 @@
if (rl_dest.high_word) {
return; // No Phi node - handled via low word
}
+ // LLVM requires that all Phi nodes are at the beginning of the block
+ llvm::IRBuilderBase::InsertPoint ip = cu->irb->saveAndClearIP();
+ cu->irb->SetInsertPoint(llvm_bb);
int* incoming = reinterpret_cast<int*>(mir->dalvikInsn.vB);
llvm::Type* phi_type =
LlvmTypeFromLocRec(cu, rl_dest);
@@ -1662,6 +1665,8 @@
phi->addIncoming(GetLLVMValue(cu, loc.orig_sreg),
GetLLVMBlock(cu, it->second));
}
+ // Now that Phi node is emitted, add definition at old insert point
+ cu->irb->restoreIP(ip);
DefineValue(cu, phi, rl_dest.orig_sreg);
break;
}
@@ -1789,9 +1794,7 @@
greenland::IntrinsicHelper::AllocaShadowFrame;
llvm::Function* func = cu->intrinsic_helper->GetIntrinsicFunction(id);
llvm::Value* entries = cu->irb->getInt32(cu->num_shadow_frame_entries);
- llvm::Value* dalvik_regs = cu->irb->getInt32(cu->num_dalvik_registers);
- llvm::Value* args[] = { entries, dalvik_regs };
- cu->irb->CreateCall(func, args);
+ cu->irb->CreateCall(func, entries);
} else if (bb->block_type == kExitBlock) {
/*
* Because of the differences between how MIR/LIR and llvm handle exit