commit dd64450b37776f68b9bfc47f8d9a88bc72c95727
author Elena Sayapina <elena.v.sayapina@intel.com> Tue Jul 01 18:39:52 2014 +0700
committer Elena V Sayapina <elena.v.sayapina@intel.com> Wed Jul 02 06:14:07 2014 +0000
tree b9d823dc406be3d68fe903b7644052fbf5d66e62
parent 8b11544881ad6c8aeb50ba7c6a594363c2b684ec

x86_64: Unify 64-bit check in x86 compiler

Update x86-specific Gen64Bit() check with the CompilationUnit target64 field
which is set using unified Is64BitInstructionSet(InstructionSet) check.

Change-Id: Ic00ac863ed19e4543d7ea878d6c6c76d0bd85ce8
Signed-off-by: Elena Sayapina <elena.v.sayapina@intel.com>

compiler/compilers.cc

diff --git a/compiler/compilers.cc b/compiler/compilers.cc
index 76838d7..f940b54 100644
--- a/compiler/compilers.cc
+++ b/compiler/compilers.cc
@@ -108,10 +108,9 @@
       mir_to_lir = MipsCodeGenerator(cu, cu->mir_graph.get(), &cu->arena);
       break;
     case kX86:
-      mir_to_lir = X86CodeGenerator(cu, cu->mir_graph.get(), &cu->arena);
-      break;
+      // Fall-through.
     case kX86_64:
-      mir_to_lir = X86_64CodeGenerator(cu, cu->mir_graph.get(), &cu->arena);
+      mir_to_lir = X86CodeGenerator(cu, cu->mir_graph.get(), &cu->arena);
       break;
     default:
       LOG(FATAL) << "Unexpected instruction set: " << cu->instruction_set;