commit dd64450b37776f68b9bfc47f8d9a88bc72c95727
author Elena Sayapina <elena.v.sayapina@intel.com> Tue Jul 01 18:39:52 2014 +0700
committer Elena V Sayapina <elena.v.sayapina@intel.com> Wed Jul 02 06:14:07 2014 +0000
tree b9d823dc406be3d68fe903b7644052fbf5d66e62
parent 8b11544881ad6c8aeb50ba7c6a594363c2b684ec

x86_64: Unify 64-bit check in x86 compiler

Update x86-specific Gen64Bit() check with the CompilationUnit target64 field
which is set using unified Is64BitInstructionSet(InstructionSet) check.

Change-Id: Ic00ac863ed19e4543d7ea878d6c6c76d0bd85ce8
Signed-off-by: Elena Sayapina <elena.v.sayapina@intel.com>

compiler/dex/quick/x86/fp_x86.cc

diff --git a/compiler/dex/quick/x86/fp_x86.cc b/compiler/dex/quick/x86/fp_x86.cc
index f854adb..1aeaced 100644
--- a/compiler/dex/quick/x86/fp_x86.cc
+++ b/compiler/dex/quick/x86/fp_x86.cc
@@ -254,7 +254,7 @@
       return;
     }
     case Instruction::LONG_TO_DOUBLE:
-      if (Gen64Bit()) {
+      if (cu_->target64) {
         rcSrc = kCoreReg;
         op = kX86Cvtsqi2sdRR;
         break;
@@ -262,7 +262,7 @@
       GenLongToFP(rl_dest, rl_src, true /* is_double */);
       return;
     case Instruction::LONG_TO_FLOAT:
-      if (Gen64Bit()) {
+      if (cu_->target64) {
         rcSrc = kCoreReg;
         op = kX86Cvtsqi2ssRR;
        break;
@@ -270,7 +270,7 @@
       GenLongToFP(rl_dest, rl_src, false /* is_double */);
       return;
     case Instruction::FLOAT_TO_LONG:
-      if (Gen64Bit()) {
+      if (cu_->target64) {
         rl_src = LoadValue(rl_src, kFPReg);
         // If result vreg is also src vreg, break association to avoid useless copy by EvalLoc()
         ClobberSReg(rl_dest.s_reg_low);
@@ -295,7 +295,7 @@
       }
       return;
     case Instruction::DOUBLE_TO_LONG:
-      if (Gen64Bit()) {
+      if (cu_->target64) {
         rl_src = LoadValueWide(rl_src, kFPReg);
         // If result vreg is also src vreg, break association to avoid useless copy by EvalLoc()
         ClobberSReg(rl_dest.s_reg_low);
@@ -569,7 +569,7 @@
   RegLocation rl_result;
   rl_src = LoadValueWide(rl_src, kCoreReg);
   rl_result = EvalLocWide(rl_dest, kCoreReg, true);
-  if (Gen64Bit()) {
+  if (cu_->target64) {
     OpRegCopy(rl_result.reg, rl_src.reg);
     // Flip sign bit.
     NewLIR2(kX86Rol64RI, rl_result.reg.GetReg(), 1);