commit e2eb29e98be3ba72cce7da40847ab3d605b9455d
author Zheng Xu <zheng.xu@arm.com> Thu Jun 12 10:22:33 2014 +0800
committer buzbee <buzbee@google.com> Thu Jun 12 14:00:35 2014 -0700
tree e3cbbd44306935dbd59438dee299eae2def8841c
parent c0090a4206306a80a830de35c7b4c74a43df690a

AArch64: Enable MOVE_*, some CONST_*, CMP_*.

With the fixes of GenArithImmOpLong, GenShiftOpLong, OpRegImm,
OpRegRegImm, OpRegRegImm64, EncodeLogicalImmediate and fmov.

Change-Id: I8cae4f921d5150a6b8e4803ca4dee553928d1a58

compiler/dex/quick/arm64/codegen_arm64.h

diff --git a/compiler/dex/quick/arm64/codegen_arm64.h b/compiler/dex/quick/arm64/codegen_arm64.h
index c92832e..8ecc393 100644
--- a/compiler/dex/quick/arm64/codegen_arm64.h
+++ b/compiler/dex/quick/arm64/codegen_arm64.h
@@ -185,6 +185,7 @@
     LIR* OpMovRegMem(RegStorage r_dest, RegStorage r_base, int offset, MoveType move_type);
     LIR* OpMovMemReg(RegStorage r_base, int offset, RegStorage r_src, MoveType move_type);
     LIR* OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src);
+    LIR* OpRegRegImm64(OpKind op, RegStorage r_dest, RegStorage r_src1, int64_t value);
     LIR* OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value);
     LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2);
     LIR* OpTestSuspend(LIR* target);