Revert "Revert "Refactor codegen resource masks""
This reverts commit 4b39c9f1b77ff32cf5760e6bf77c189678e2c9a6.
The problem with the original commit was failure to widen a
couple of local variables to hold the newly widenened to 64-bits
EncodingMap flag field - thus we lost some high-order resource
attributes and broke instruction scheduling for x86.
Change-Id: I04d7caf79e2cc802c39369ca04666629218ccaea
diff --git a/src/compiler/codegen/CodegenUtil.cc b/src/compiler/codegen/CodegenUtil.cc
index 7ad2647..2450058 100644
--- a/src/compiler/codegen/CodegenUtil.cc
+++ b/src/compiler/codegen/CodegenUtil.cc
@@ -65,36 +65,7 @@
* Store the Dalvik register id in aliasInfo. Mark the MSB if it is a 64-bit
* access.
*/
- lir->aliasInfo = regId;
- if (is64bit) {
- lir->aliasInfo |= 0x80000000;
- }
-}
-
-/*
- * Decode the register id.
- */
-inline u8 getRegMaskCommon(CompilationUnit* cUnit, int reg)
-{
- u8 seed;
- int shift;
- int regId;
-
-
- if (cUnit->instructionSet == kX86) {
- regId = reg & 0xf;
- /* Double registers in x86 are just a single FP register */
- seed = 1;
- } else {
- regId = reg & 0x1f;
- /* Each double register is equal to a pair of single-precision FP registers */
- seed = DOUBLEREG(reg) ? 3 : 1;
- }
- /* FP register starts at bit position 16 */
- shift = FPREG(reg) ? kFPReg0 : 0;
- /* Expand the double register id into single offset */
- shift += regId;
- return (seed << shift);
+ lir->aliasInfo = ENCODE_ALIAS_INFO(regId, is64bit);
}
u8 oatGetRegMaskCommon(CompilationUnit* cUnit, int reg)
@@ -122,14 +93,13 @@
void setupResourceMasks(CompilationUnit* cUnit, LIR* lir)
{
int opcode = lir->opcode;
- int flags;
if (opcode <= 0) {
lir->useMask = lir->defMask = 0;
return;
}
- flags = EncodingMap[opcode].flags;
+ uint64_t flags = EncodingMap[opcode].flags;
if (flags & NEEDS_FIXUP) {
lir->flags.pcRelFixup = true;
@@ -161,10 +131,6 @@
setupRegMask(cUnit, &lir->defMask, lir->operands[1]);
}
- if (flags & REG_DEF_SP) {
- lir->defMask |= ENCODE_REG_SP;
- }
-
if (flags & SETS_CCODES) {
lir->defMask |= ENCODE_CCODE;
@@ -180,10 +146,6 @@
}
}
- if (flags & REG_USE_SP) {
- lir->useMask |= ENCODE_REG_SP;
- }
-
if (flags & USES_CCODES) {
lir->useMask |= ENCODE_CCODE;
}