Merge "ARM: VIXL32: Fix VisitTypeConversion."
diff --git a/compiler/optimizing/code_generator_arm_vixl.cc b/compiler/optimizing/code_generator_arm_vixl.cc
index e9827e8..a31adbf 100644
--- a/compiler/optimizing/code_generator_arm_vixl.cc
+++ b/compiler/optimizing/code_generator_arm_vixl.cc
@@ -2016,7 +2016,7 @@
case Primitive::kPrimFloat: {
// Processing a Dex `float-to-int' instruction.
vixl32::SRegister temp = LowSRegisterFrom(locations->GetTemp(0));
- __ Vcvt(I32, F32, temp, InputSRegisterAt(conversion, 0));
+ __ Vcvt(S32, F32, temp, InputSRegisterAt(conversion, 0));
__ Vmov(OutputRegister(conversion), temp);
break;
}
@@ -2024,7 +2024,7 @@
case Primitive::kPrimDouble: {
// Processing a Dex `double-to-int' instruction.
vixl32::SRegister temp_s = LowSRegisterFrom(locations->GetTemp(0));
- __ Vcvt(I32, F64, temp_s, DRegisterFrom(in));
+ __ Vcvt(S32, F64, temp_s, DRegisterFrom(in));
__ Vmov(OutputRegister(conversion), temp_s);
break;
}
@@ -2100,7 +2100,7 @@
case Primitive::kPrimChar: {
// Processing a Dex `int-to-float' instruction.
__ Vmov(OutputSRegister(conversion), InputRegisterAt(conversion, 0));
- __ Vcvt(F32, I32, OutputSRegister(conversion), OutputSRegister(conversion));
+ __ Vcvt(F32, S32, OutputSRegister(conversion), OutputSRegister(conversion));
break;
}
@@ -2131,7 +2131,7 @@
case Primitive::kPrimChar: {
// Processing a Dex `int-to-double' instruction.
__ Vmov(LowSRegisterFrom(out), InputRegisterAt(conversion, 0));
- __ Vcvt(F64, I32, DRegisterFrom(out), LowSRegisterFrom(out));
+ __ Vcvt(F64, S32, DRegisterFrom(out), LowSRegisterFrom(out));
break;
}
@@ -2139,18 +2139,15 @@
// Processing a Dex `long-to-double' instruction.
vixl32::Register low = LowRegisterFrom(in);
vixl32::Register high = HighRegisterFrom(in);
-
vixl32::SRegister out_s = LowSRegisterFrom(out);
vixl32::DRegister out_d = DRegisterFrom(out);
-
vixl32::SRegister temp_s = LowSRegisterFrom(locations->GetTemp(0));
vixl32::DRegister temp_d = DRegisterFrom(locations->GetTemp(0));
-
- vixl32::DRegister constant_d = DRegisterFrom(locations->GetTemp(0));
+ vixl32::DRegister constant_d = DRegisterFrom(locations->GetTemp(1));
// temp_d = int-to-double(high)
__ Vmov(temp_s, high);
- __ Vcvt(F64, I32, temp_d, temp_s);
+ __ Vcvt(F64, S32, temp_d, temp_s);
// constant_d = k2Pow32EncodingForDouble
__ Vmov(constant_d, bit_cast<double, int64_t>(k2Pow32EncodingForDouble));
// out_d = unsigned-to-double(low)
diff --git a/test/Android.arm_vixl.mk b/test/Android.arm_vixl.mk
index 845545c..8ca4168 100644
--- a/test/Android.arm_vixl.mk
+++ b/test/Android.arm_vixl.mk
@@ -17,56 +17,27 @@
# Known broken tests for the ARM VIXL backend.
TEST_ART_BROKEN_OPTIMIZING_ARM_VIXL_RUN_TESTS := \
003-omnibus-opcodes \
- 004-ThreadStress \
- 028-array-write \
- 037-inherit \
- 042-new-instance \
+ 020-string \
+ 021-string2 \
044-proxy \
- 080-oom-throw \
082-inline-execute \
- 083-compiler-regressions \
096-array-copy-concurrent-gc \
- 099-vmdebug \
+ 100-reflect2 \
103-string-append \
- 114-ParallelGC \
122-npe \
- 123-inline-execute2 \
129-ThreadGetId \
137-cfi \
- 144-static-field-sigquit \
- 201-built-in-except-detail-messages \
- 412-new-array \
- 422-type-conversion \
- 437-inline \
439-npe \
- 442-checker-constant-folding \
- 450-checker-types \
- 458-checker-instruct-simplification \
- 458-long-to-fpu \
488-checker-inline-recursive-calls \
- 510-checker-try-catch \
- 515-dce-dominator \
520-equivalent-phi \
525-checker-arrays-fields1 \
525-checker-arrays-fields2 \
527-checker-array-access-split \
- 530-checker-loops2 \
- 530-checker-lse \
- 530-checker-lse2 \
- 535-regression-const-val \
- 536-checker-intrinsic-optimization \
538-checker-embed-constants \
550-checker-multiply-accumulate \
- 552-checker-primitive-typeprop \
552-checker-sharpening \
- 555-UnsafeGetLong-regression \
562-checker-no-intermediate \
564-checker-negbitwise \
570-checker-osr \
- 570-checker-select \
- 574-irreducible-and-constant-area \
- 580-checker-round \
- 594-checker-array-alias \
- 602-deoptimizeable \
- 700-LoadArgRegs \
- 800-smali \
+ 602-deoptimizeable
+