Quick: Clean up Mir2Lir codegen.
Clean up WrapPointer()/UnwrapPointer() and OpPcRelLoad().
Change-Id: I1a91f01e1e779599c77f3f6efcac2a6ad34629cf
diff --git a/compiler/dex/quick/arm/assemble_arm.cc b/compiler/dex/quick/arm/assemble_arm.cc
index 8833da3..3e69878 100644
--- a/compiler/dex/quick/arm/assemble_arm.cc
+++ b/compiler/dex/quick/arm/assemble_arm.cc
@@ -848,7 +848,7 @@
ENCODING_MAP(kThumb2LdrPcRel12, 0xf8df0000,
kFmtBitBlt, 15, 12, kFmtBitBlt, 11, 0, kFmtUnused, -1, -1,
kFmtUnused, -1, -1,
- IS_TERTIARY_OP | REG_DEF0 | REG_USE_PC | IS_LOAD_OFF | NEEDS_FIXUP,
+ IS_BINARY_OP | REG_DEF0 | REG_USE_PC | IS_LOAD_OFF | NEEDS_FIXUP,
"ldr", "!0C, [r15pc, #!1d]", 4, kFixupLoad),
ENCODING_MAP(kThumb2BCond, 0xf0008000,
kFmtBrOffset, -1, -1, kFmtBitBlt, 25, 22, kFmtUnused, -1, -1,
@@ -1502,7 +1502,7 @@
break;
}
case kFixupAdr: {
- EmbeddedData *tab_rec = reinterpret_cast<EmbeddedData*>(UnwrapPointer(lir->operands[2]));
+ const EmbeddedData* tab_rec = UnwrapPointer<EmbeddedData>(lir->operands[2]);
LIR* target = lir->target;
int32_t target_disp = (tab_rec != NULL) ? tab_rec->offset + offset_adjustment
: target->offset + ((target->flags.generation == lir->flags.generation) ? 0 :
@@ -1555,8 +1555,8 @@
}
case kFixupMovImmLST: {
// operands[1] should hold disp, [2] has add, [3] has tab_rec
- LIR *addPCInst = reinterpret_cast<LIR*>(UnwrapPointer(lir->operands[2]));
- EmbeddedData *tab_rec = reinterpret_cast<EmbeddedData*>(UnwrapPointer(lir->operands[3]));
+ const LIR* addPCInst = UnwrapPointer<LIR>(lir->operands[2]);
+ const EmbeddedData* tab_rec = UnwrapPointer<EmbeddedData>(lir->operands[3]);
// If tab_rec is null, this is a literal load. Use target
LIR* target = lir->target;
int32_t target_disp = tab_rec ? tab_rec->offset : target->offset;
@@ -1565,8 +1565,8 @@
}
case kFixupMovImmHST: {
// operands[1] should hold disp, [2] has add, [3] has tab_rec
- LIR *addPCInst = reinterpret_cast<LIR*>(UnwrapPointer(lir->operands[2]));
- EmbeddedData *tab_rec = reinterpret_cast<EmbeddedData*>(UnwrapPointer(lir->operands[3]));
+ const LIR* addPCInst = UnwrapPointer<LIR>(lir->operands[2]);
+ const EmbeddedData* tab_rec = UnwrapPointer<EmbeddedData>(lir->operands[3]);
// If tab_rec is null, this is a literal load. Use target
LIR* target = lir->target;
int32_t target_disp = tab_rec ? tab_rec->offset : target->offset;
diff --git a/compiler/dex/quick/arm/call_arm.cc b/compiler/dex/quick/arm/call_arm.cc
index 3182920..d46c25a 100644
--- a/compiler/dex/quick/arm/call_arm.cc
+++ b/compiler/dex/quick/arm/call_arm.cc
@@ -658,7 +658,7 @@
// NOTE: Method deduplication takes linker patches into account, so we can just pass 0
// as a placeholder for the offset.
LIR* call = RawLIR(current_dalvik_offset_, kThumb2Bl, 0,
- target_method_idx, WrapPointer(const_cast<DexFile*>(target_dex_file)), type);
+ target_method_idx, WrapPointer(target_dex_file), type);
AppendLIR(call);
call_method_insns_.push_back(call);
return call;
diff --git a/compiler/dex/quick/arm/codegen_arm.h b/compiler/dex/quick/arm/codegen_arm.h
index 67fabbd..4141bcf 100644
--- a/compiler/dex/quick/arm/codegen_arm.h
+++ b/compiler/dex/quick/arm/codegen_arm.h
@@ -200,7 +200,7 @@
void UpdateIT(LIR* it, const char* new_guide);
void OpEndIT(LIR* it);
LIR* OpMem(OpKind op, RegStorage r_base, int disp);
- LIR* OpPcRelLoad(RegStorage reg, LIR* target);
+ void OpPcRelLoad(RegStorage reg, LIR* target);
LIR* OpReg(OpKind op, RegStorage r_dest_src);
void OpRegCopy(RegStorage r_dest, RegStorage r_src);
LIR* OpRegCopyNoInsert(RegStorage r_dest, RegStorage r_src);
diff --git a/compiler/dex/quick/arm/int_arm.cc b/compiler/dex/quick/arm/int_arm.cc
index ef26323..9193e1b 100644
--- a/compiler/dex/quick/arm/int_arm.cc
+++ b/compiler/dex/quick/arm/int_arm.cc
@@ -1081,9 +1081,10 @@
return true;
}
-LIR* ArmMir2Lir::OpPcRelLoad(RegStorage reg, LIR* target) {
+void ArmMir2Lir::OpPcRelLoad(RegStorage reg, LIR* target) {
ScopedMemRefType mem_ref_type(this, ResourceMask::kLiteral);
- return RawLIR(current_dalvik_offset_, kThumb2LdrPcRel12, reg.GetReg(), 0, 0, 0, 0, target);
+ LIR* lir = NewLIR2(kThumb2LdrPcRel12, reg.GetReg(), 0);
+ lir->target = target;
}
LIR* ArmMir2Lir::OpVldm(RegStorage r_base, int count) {
diff --git a/compiler/dex/quick/arm/target_arm.cc b/compiler/dex/quick/arm/target_arm.cc
index 13f9072..9812d9f 100644
--- a/compiler/dex/quick/arm/target_arm.cc
+++ b/compiler/dex/quick/arm/target_arm.cc
@@ -455,7 +455,7 @@
case 'T':
snprintf(tbuf, arraysize(tbuf), "%s", PrettyMethod(
static_cast<uint32_t>(lir->operands[1]),
- *reinterpret_cast<const DexFile*>(UnwrapPointer(lir->operands[2]))).c_str());
+ *UnwrapPointer<DexFile>(lir->operands[2])).c_str());
break;
case 'u': {
int offset_1 = lir->operands[0];
@@ -906,9 +906,7 @@
for (LIR* p : call_method_insns_) {
DCHECK_EQ(p->opcode, kThumb2Bl);
uint32_t target_method_idx = p->operands[1];
- const DexFile* target_dex_file =
- reinterpret_cast<const DexFile*>(UnwrapPointer(p->operands[2]));
-
+ const DexFile* target_dex_file = UnwrapPointer<DexFile>(p->operands[2]);
patches_.push_back(LinkerPatch::RelativeCodePatch(p->offset,
target_dex_file, target_method_idx));
}