Remove mterp reliance on code item layout
Pass dex instruction pointer intead of code item pointer to the mterp
entry code. This removes a dependency on the code item layout since it
may change in the future for compact dex.
Bug: 63756964
Test: test/testrunner/testrunner.py --host -j40
Change-Id: Icfffb2e17372439f0833ecce1c0ddb05e7e7e69c
diff --git a/runtime/interpreter/interpreter.cc b/runtime/interpreter/interpreter.cc
index 038405e..01b7d4e 100644
--- a/runtime/interpreter/interpreter.cc
+++ b/runtime/interpreter/interpreter.cc
@@ -314,7 +314,10 @@
return ExecuteSwitchImpl<false, false>(self, code_item, shadow_frame, result_register,
false);
}
- bool returned = ExecuteMterpImpl(self, code_item, &shadow_frame, &result_register);
+ bool returned = ExecuteMterpImpl(self,
+ code_item->insns_,
+ &shadow_frame,
+ &result_register);
if (returned) {
return result_register;
} else {
diff --git a/runtime/interpreter/interpreter_mterp_impl.h b/runtime/interpreter/interpreter_mterp_impl.h
index 1be20fa..7aa5a34 100644
--- a/runtime/interpreter/interpreter_mterp_impl.h
+++ b/runtime/interpreter/interpreter_mterp_impl.h
@@ -32,7 +32,7 @@
// Mterp does not support transactions or access check, thus no templated versions.
extern "C" bool ExecuteMterpImpl(Thread* self,
- const DexFile::CodeItem* code_item,
+ const uint16_t* dex_instructions,
ShadowFrame* shadow_frame,
JValue* result_register) REQUIRES_SHARED(Locks::mutator_lock_);
diff --git a/runtime/interpreter/mterp/arm/entry.S b/runtime/interpreter/mterp/arm/entry.S
index 5781414..de617a9 100644
--- a/runtime/interpreter/mterp/arm/entry.S
+++ b/runtime/interpreter/mterp/arm/entry.S
@@ -46,8 +46,8 @@
/* Remember the return register */
str r3, [r2, #SHADOWFRAME_RESULT_REGISTER_OFFSET]
- /* Remember the code_item */
- str r1, [r2, #SHADOWFRAME_CODE_ITEM_OFFSET]
+ /* Remember the dex instruction pointer */
+ str r1, [r2, #SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET]
/* set up "named" registers */
mov rSELF, r0
@@ -55,8 +55,7 @@
add rFP, r2, #SHADOWFRAME_VREGS_OFFSET @ point to vregs.
VREG_INDEX_TO_ADDR rREFS, r0 @ point to reference array in shadow frame
ldr r0, [r2, #SHADOWFRAME_DEX_PC_OFFSET] @ Get starting dex_pc.
- add rPC, r1, #CODEITEM_INSNS_OFFSET @ Point to base of insns[]
- add rPC, rPC, r0, lsl #1 @ Create direct pointer to 1st dex opcode
+ add rPC, r1, r0, lsl #1 @ Create direct pointer to 1st dex opcode
EXPORT_PC
/* Starting ibase */
diff --git a/runtime/interpreter/mterp/arm/footer.S b/runtime/interpreter/mterp/arm/footer.S
index c6801e5..f3a3ad2 100644
--- a/runtime/interpreter/mterp/arm/footer.S
+++ b/runtime/interpreter/mterp/arm/footer.S
@@ -97,11 +97,10 @@
bl MterpHandleException @ (self, shadow_frame)
cmp r0, #0
beq MterpExceptionReturn @ no local catch, back to caller.
- ldr r0, [rFP, #OFF_FP_CODE_ITEM]
+ ldr r0, [rFP, #OFF_FP_DEX_INSTRUCTIONS]
ldr r1, [rFP, #OFF_FP_DEX_PC]
ldr rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET]
- add rPC, r0, #CODEITEM_INSNS_OFFSET
- add rPC, rPC, r1, lsl #1 @ generate new dex_pc_ptr
+ add rPC, r0, r1, lsl #1 @ generate new dex_pc_ptr
/* Do we need to switch interpreters? */
bl MterpShouldSwitchInterpreters
cmp r0, #0
diff --git a/runtime/interpreter/mterp/arm/header.S b/runtime/interpreter/mterp/arm/header.S
index 597d9d4..51c2ba4 100644
--- a/runtime/interpreter/mterp/arm/header.S
+++ b/runtime/interpreter/mterp/arm/header.S
@@ -110,7 +110,7 @@
#define OFF_FP_METHOD OFF_FP(SHADOWFRAME_METHOD_OFFSET)
#define OFF_FP_RESULT_REGISTER OFF_FP(SHADOWFRAME_RESULT_REGISTER_OFFSET)
#define OFF_FP_DEX_PC_PTR OFF_FP(SHADOWFRAME_DEX_PC_PTR_OFFSET)
-#define OFF_FP_CODE_ITEM OFF_FP(SHADOWFRAME_CODE_ITEM_OFFSET)
+#define OFF_FP_DEX_INSTRUCTIONS OFF_FP(SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET)
#define OFF_FP_SHADOWFRAME OFF_FP(0)
/*
@@ -130,9 +130,8 @@
.endm
.macro EXPORT_DEX_PC tmp
- ldr \tmp, [rFP, #OFF_FP_CODE_ITEM]
+ ldr \tmp, [rFP, #OFF_FP_DEX_INSTRUCTIONS]
str rPC, [rFP, #OFF_FP_DEX_PC_PTR]
- add \tmp, #CODEITEM_INSNS_OFFSET
sub \tmp, rPC, \tmp
asr \tmp, #1
str \tmp, [rFP, #OFF_FP_DEX_PC]
diff --git a/runtime/interpreter/mterp/arm64/entry.S b/runtime/interpreter/mterp/arm64/entry.S
index 7306e4e..f3d40ff 100644
--- a/runtime/interpreter/mterp/arm64/entry.S
+++ b/runtime/interpreter/mterp/arm64/entry.S
@@ -36,8 +36,8 @@
/* Remember the return register */
str x3, [x2, #SHADOWFRAME_RESULT_REGISTER_OFFSET]
- /* Remember the code_item */
- str x1, [x2, #SHADOWFRAME_CODE_ITEM_OFFSET]
+ /* Remember the dex instruction pointer */
+ str x1, [x2, #SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET]
/* set up "named" registers */
mov xSELF, x0
@@ -45,8 +45,7 @@
add xFP, x2, #SHADOWFRAME_VREGS_OFFSET // point to vregs.
add xREFS, xFP, w0, lsl #2 // point to reference array in shadow frame
ldr w0, [x2, #SHADOWFRAME_DEX_PC_OFFSET] // Get starting dex_pc.
- add xPC, x1, #CODEITEM_INSNS_OFFSET // Point to base of insns[]
- add xPC, xPC, w0, lsl #1 // Create direct pointer to 1st dex opcode
+ add xPC, x1, w0, lsl #1 // Create direct pointer to 1st dex opcode
EXPORT_PC
/* Starting ibase */
diff --git a/runtime/interpreter/mterp/arm64/footer.S b/runtime/interpreter/mterp/arm64/footer.S
index fafa606..0ce3543 100644
--- a/runtime/interpreter/mterp/arm64/footer.S
+++ b/runtime/interpreter/mterp/arm64/footer.S
@@ -93,11 +93,10 @@
add x1, xFP, #OFF_FP_SHADOWFRAME
bl MterpHandleException // (self, shadow_frame)
cbz w0, MterpExceptionReturn // no local catch, back to caller.
- ldr x0, [xFP, #OFF_FP_CODE_ITEM]
+ ldr x0, [xFP, #OFF_FP_DEX_INSTRUCTIONS]
ldr w1, [xFP, #OFF_FP_DEX_PC]
ldr xIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET]
- add xPC, x0, #CODEITEM_INSNS_OFFSET
- add xPC, xPC, x1, lsl #1 // generate new dex_pc_ptr
+ add xPC, x0, x1, lsl #1 // generate new dex_pc_ptr
/* Do we need to switch interpreters? */
bl MterpShouldSwitchInterpreters
cbnz w0, MterpFallback
diff --git a/runtime/interpreter/mterp/arm64/header.S b/runtime/interpreter/mterp/arm64/header.S
index cedfa49..47f12d2 100644
--- a/runtime/interpreter/mterp/arm64/header.S
+++ b/runtime/interpreter/mterp/arm64/header.S
@@ -116,7 +116,7 @@
#define OFF_FP_METHOD OFF_FP(SHADOWFRAME_METHOD_OFFSET)
#define OFF_FP_RESULT_REGISTER OFF_FP(SHADOWFRAME_RESULT_REGISTER_OFFSET)
#define OFF_FP_DEX_PC_PTR OFF_FP(SHADOWFRAME_DEX_PC_PTR_OFFSET)
-#define OFF_FP_CODE_ITEM OFF_FP(SHADOWFRAME_CODE_ITEM_OFFSET)
+#define OFF_FP_DEX_INSTRUCTIONS OFF_FP(SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET)
#define OFF_FP_SHADOWFRAME OFF_FP(0)
/*
diff --git a/runtime/interpreter/mterp/mterp.cc b/runtime/interpreter/mterp/mterp.cc
index 404c260..92dd19e 100644
--- a/runtime/interpreter/mterp/mterp.cc
+++ b/runtime/interpreter/mterp/mterp.cc
@@ -577,7 +577,7 @@
self->AssertNoPendingException();
}
if (kTraceExecutionEnabled) {
- uint32_t dex_pc = dex_pc_ptr - shadow_frame->GetCodeItem()->insns_;
+ uint32_t dex_pc = dex_pc_ptr - shadow_frame->GetDexInstructions();
TraceExecution(*shadow_frame, inst, dex_pc);
}
if (kTestExportPC) {
diff --git a/runtime/interpreter/mterp/mterp_stub.cc b/runtime/interpreter/mterp/mterp_stub.cc
index 35f8f1c..e515ec4 100644
--- a/runtime/interpreter/mterp/mterp_stub.cc
+++ b/runtime/interpreter/mterp/mterp_stub.cc
@@ -38,8 +38,10 @@
/*
* The platform-specific implementation must provide this.
*/
-extern "C" bool ExecuteMterpImpl(Thread* self, const DexFile::CodeItem* code_item,
- ShadowFrame* shadow_frame, JValue* result_register)
+extern "C" bool ExecuteMterpImpl(Thread* self,
+ const uint16_t* dex_instructions,
+ ShadowFrame* shadow_frame,
+ JValue* result_register)
REQUIRES_SHARED(Locks::mutator_lock_) {
UNUSED(self); UNUSED(shadow_frame); UNUSED(code_item); UNUSED(result_register);
UNIMPLEMENTED(art::FATAL);
diff --git a/runtime/interpreter/mterp/out/mterp_arm.S b/runtime/interpreter/mterp/out/mterp_arm.S
index 8ca5bd4..20b1975 100644
--- a/runtime/interpreter/mterp/out/mterp_arm.S
+++ b/runtime/interpreter/mterp/out/mterp_arm.S
@@ -117,7 +117,7 @@
#define OFF_FP_METHOD OFF_FP(SHADOWFRAME_METHOD_OFFSET)
#define OFF_FP_RESULT_REGISTER OFF_FP(SHADOWFRAME_RESULT_REGISTER_OFFSET)
#define OFF_FP_DEX_PC_PTR OFF_FP(SHADOWFRAME_DEX_PC_PTR_OFFSET)
-#define OFF_FP_CODE_ITEM OFF_FP(SHADOWFRAME_CODE_ITEM_OFFSET)
+#define OFF_FP_DEX_INSTRUCTIONS OFF_FP(SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET)
#define OFF_FP_SHADOWFRAME OFF_FP(0)
/*
@@ -137,9 +137,8 @@
.endm
.macro EXPORT_DEX_PC tmp
- ldr \tmp, [rFP, #OFF_FP_CODE_ITEM]
+ ldr \tmp, [rFP, #OFF_FP_DEX_INSTRUCTIONS]
str rPC, [rFP, #OFF_FP_DEX_PC_PTR]
- add \tmp, #CODEITEM_INSNS_OFFSET
sub \tmp, rPC, \tmp
asr \tmp, #1
str \tmp, [rFP, #OFF_FP_DEX_PC]
@@ -365,8 +364,8 @@
/* Remember the return register */
str r3, [r2, #SHADOWFRAME_RESULT_REGISTER_OFFSET]
- /* Remember the code_item */
- str r1, [r2, #SHADOWFRAME_CODE_ITEM_OFFSET]
+ /* Remember the dex instruction pointer */
+ str r1, [r2, #SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET]
/* set up "named" registers */
mov rSELF, r0
@@ -374,8 +373,7 @@
add rFP, r2, #SHADOWFRAME_VREGS_OFFSET @ point to vregs.
VREG_INDEX_TO_ADDR rREFS, r0 @ point to reference array in shadow frame
ldr r0, [r2, #SHADOWFRAME_DEX_PC_OFFSET] @ Get starting dex_pc.
- add rPC, r1, #CODEITEM_INSNS_OFFSET @ Point to base of insns[]
- add rPC, rPC, r0, lsl #1 @ Create direct pointer to 1st dex opcode
+ add rPC, r1, r0, lsl #1 @ Create direct pointer to 1st dex opcode
EXPORT_PC
/* Starting ibase */
@@ -12044,11 +12042,10 @@
bl MterpHandleException @ (self, shadow_frame)
cmp r0, #0
beq MterpExceptionReturn @ no local catch, back to caller.
- ldr r0, [rFP, #OFF_FP_CODE_ITEM]
+ ldr r0, [rFP, #OFF_FP_DEX_INSTRUCTIONS]
ldr r1, [rFP, #OFF_FP_DEX_PC]
ldr rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET]
- add rPC, r0, #CODEITEM_INSNS_OFFSET
- add rPC, rPC, r1, lsl #1 @ generate new dex_pc_ptr
+ add rPC, r0, r1, lsl #1 @ generate new dex_pc_ptr
/* Do we need to switch interpreters? */
bl MterpShouldSwitchInterpreters
cmp r0, #0
diff --git a/runtime/interpreter/mterp/out/mterp_arm64.S b/runtime/interpreter/mterp/out/mterp_arm64.S
index d4423ab..82edab4 100644
--- a/runtime/interpreter/mterp/out/mterp_arm64.S
+++ b/runtime/interpreter/mterp/out/mterp_arm64.S
@@ -123,7 +123,7 @@
#define OFF_FP_METHOD OFF_FP(SHADOWFRAME_METHOD_OFFSET)
#define OFF_FP_RESULT_REGISTER OFF_FP(SHADOWFRAME_RESULT_REGISTER_OFFSET)
#define OFF_FP_DEX_PC_PTR OFF_FP(SHADOWFRAME_DEX_PC_PTR_OFFSET)
-#define OFF_FP_CODE_ITEM OFF_FP(SHADOWFRAME_CODE_ITEM_OFFSET)
+#define OFF_FP_DEX_INSTRUCTIONS OFF_FP(SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET)
#define OFF_FP_SHADOWFRAME OFF_FP(0)
/*
@@ -394,8 +394,8 @@
/* Remember the return register */
str x3, [x2, #SHADOWFRAME_RESULT_REGISTER_OFFSET]
- /* Remember the code_item */
- str x1, [x2, #SHADOWFRAME_CODE_ITEM_OFFSET]
+ /* Remember the dex instruction pointer */
+ str x1, [x2, #SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET]
/* set up "named" registers */
mov xSELF, x0
@@ -403,8 +403,7 @@
add xFP, x2, #SHADOWFRAME_VREGS_OFFSET // point to vregs.
add xREFS, xFP, w0, lsl #2 // point to reference array in shadow frame
ldr w0, [x2, #SHADOWFRAME_DEX_PC_OFFSET] // Get starting dex_pc.
- add xPC, x1, #CODEITEM_INSNS_OFFSET // Point to base of insns[]
- add xPC, xPC, w0, lsl #1 // Create direct pointer to 1st dex opcode
+ add xPC, x1, w0, lsl #1 // Create direct pointer to 1st dex opcode
EXPORT_PC
/* Starting ibase */
@@ -7182,11 +7181,10 @@
add x1, xFP, #OFF_FP_SHADOWFRAME
bl MterpHandleException // (self, shadow_frame)
cbz w0, MterpExceptionReturn // no local catch, back to caller.
- ldr x0, [xFP, #OFF_FP_CODE_ITEM]
+ ldr x0, [xFP, #OFF_FP_DEX_INSTRUCTIONS]
ldr w1, [xFP, #OFF_FP_DEX_PC]
ldr xIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET]
- add xPC, x0, #CODEITEM_INSNS_OFFSET
- add xPC, xPC, x1, lsl #1 // generate new dex_pc_ptr
+ add xPC, x0, x1, lsl #1 // generate new dex_pc_ptr
/* Do we need to switch interpreters? */
bl MterpShouldSwitchInterpreters
cbnz w0, MterpFallback
diff --git a/runtime/interpreter/mterp/out/mterp_x86.S b/runtime/interpreter/mterp/out/mterp_x86.S
index 514ecac..cbab61e 100644
--- a/runtime/interpreter/mterp/out/mterp_x86.S
+++ b/runtime/interpreter/mterp/out/mterp_x86.S
@@ -135,7 +135,7 @@
#define OFF_FP_METHOD OFF_FP(SHADOWFRAME_METHOD_OFFSET)
#define OFF_FP_RESULT_REGISTER OFF_FP(SHADOWFRAME_RESULT_REGISTER_OFFSET)
#define OFF_FP_DEX_PC_PTR OFF_FP(SHADOWFRAME_DEX_PC_PTR_OFFSET)
-#define OFF_FP_CODE_ITEM OFF_FP(SHADOWFRAME_CODE_ITEM_OFFSET)
+#define OFF_FP_DEX_INSTRUCTIONS OFF_FP(SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET)
#define OFF_FP_COUNTDOWN_OFFSET OFF_FP(SHADOWFRAME_HOTNESS_COUNTDOWN_OFFSET)
#define OFF_FP_SHADOWFRAME OFF_FP(0)
@@ -371,15 +371,14 @@
/* Remember the code_item */
movl IN_ARG1(%esp), %ecx
- movl %ecx, SHADOWFRAME_CODE_ITEM_OFFSET(%edx)
+ movl %ecx, SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET(%edx)
/* set up "named" registers */
movl SHADOWFRAME_NUMBER_OF_VREGS_OFFSET(%edx), %eax
leal SHADOWFRAME_VREGS_OFFSET(%edx), rFP
leal (rFP, %eax, 4), rREFS
movl SHADOWFRAME_DEX_PC_OFFSET(%edx), %eax
- lea CODEITEM_INSNS_OFFSET(%ecx), rPC
- lea (rPC, %eax, 2), rPC
+ lea (%ecx, %eax, 2), rPC
EXPORT_PC
/* Set up for backwards branches & osr profiling */
@@ -12749,10 +12748,9 @@
call SYMBOL(MterpHandleException)
testb %al, %al
jz MterpExceptionReturn
- movl OFF_FP_CODE_ITEM(rFP), %eax
+ movl OFF_FP_DEX_INSTRUCTIONS(rFP), %eax
movl OFF_FP_DEX_PC(rFP), %ecx
- lea CODEITEM_INSNS_OFFSET(%eax), rPC
- lea (rPC, %ecx, 2), rPC
+ lea (%eax, %ecx, 2), rPC
movl rPC, OFF_FP_DEX_PC_PTR(rFP)
/* Do we need to switch interpreters? */
call SYMBOL(MterpShouldSwitchInterpreters)
diff --git a/runtime/interpreter/mterp/out/mterp_x86_64.S b/runtime/interpreter/mterp/out/mterp_x86_64.S
index cfee2b8..83c3e4f 100644
--- a/runtime/interpreter/mterp/out/mterp_x86_64.S
+++ b/runtime/interpreter/mterp/out/mterp_x86_64.S
@@ -131,7 +131,7 @@
#define OFF_FP_METHOD OFF_FP(SHADOWFRAME_METHOD_OFFSET)
#define OFF_FP_RESULT_REGISTER OFF_FP(SHADOWFRAME_RESULT_REGISTER_OFFSET)
#define OFF_FP_DEX_PC_PTR OFF_FP(SHADOWFRAME_DEX_PC_PTR_OFFSET)
-#define OFF_FP_CODE_ITEM OFF_FP(SHADOWFRAME_CODE_ITEM_OFFSET)
+#define OFF_FP_DEX_INSTRUCTIONS OFF_FP(SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET)
#define OFF_FP_COUNTDOWN_OFFSET OFF_FP(SHADOWFRAME_HOTNESS_COUNTDOWN_OFFSET)
#define OFF_FP_SHADOWFRAME (-SHADOWFRAME_VREGS_OFFSET)
@@ -354,15 +354,14 @@
movq IN_ARG3, SHADOWFRAME_RESULT_REGISTER_OFFSET(IN_ARG2)
/* Remember the code_item */
- movq IN_ARG1, SHADOWFRAME_CODE_ITEM_OFFSET(IN_ARG2)
+ movq IN_ARG1, SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET(IN_ARG2)
/* set up "named" registers */
movl SHADOWFRAME_NUMBER_OF_VREGS_OFFSET(IN_ARG2), %eax
leaq SHADOWFRAME_VREGS_OFFSET(IN_ARG2), rFP
leaq (rFP, %rax, 4), rREFS
movl SHADOWFRAME_DEX_PC_OFFSET(IN_ARG2), %eax
- leaq CODEITEM_INSNS_OFFSET(IN_ARG1), rPC
- leaq (rPC, %rax, 2), rPC
+ leaq (IN_ARG1, %rax, 2), rPC
EXPORT_PC
/* Starting ibase */
@@ -11967,10 +11966,9 @@
call SYMBOL(MterpHandleException)
testb %al, %al
jz MterpExceptionReturn
- movq OFF_FP_CODE_ITEM(rFP), %rax
+ movq OFF_FP_DEX_INSTRUCTIONS(rFP), %rax
mov OFF_FP_DEX_PC(rFP), %ecx
- leaq CODEITEM_INSNS_OFFSET(%rax), rPC
- leaq (rPC, %rcx, 2), rPC
+ leaq (%rax, %rcx, 2), rPC
movq rPC, OFF_FP_DEX_PC_PTR(rFP)
/* Do we need to switch interpreters? */
call SYMBOL(MterpShouldSwitchInterpreters)
diff --git a/runtime/interpreter/mterp/x86/entry.S b/runtime/interpreter/mterp/x86/entry.S
index 34adf53..055e834 100644
--- a/runtime/interpreter/mterp/x86/entry.S
+++ b/runtime/interpreter/mterp/x86/entry.S
@@ -53,15 +53,14 @@
/* Remember the code_item */
movl IN_ARG1(%esp), %ecx
- movl %ecx, SHADOWFRAME_CODE_ITEM_OFFSET(%edx)
+ movl %ecx, SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET(%edx)
/* set up "named" registers */
movl SHADOWFRAME_NUMBER_OF_VREGS_OFFSET(%edx), %eax
leal SHADOWFRAME_VREGS_OFFSET(%edx), rFP
leal (rFP, %eax, 4), rREFS
movl SHADOWFRAME_DEX_PC_OFFSET(%edx), %eax
- lea CODEITEM_INSNS_OFFSET(%ecx), rPC
- lea (rPC, %eax, 2), rPC
+ lea (%ecx, %eax, 2), rPC
EXPORT_PC
/* Set up for backwards branches & osr profiling */
diff --git a/runtime/interpreter/mterp/x86/footer.S b/runtime/interpreter/mterp/x86/footer.S
index 088cb12..0b08cf9 100644
--- a/runtime/interpreter/mterp/x86/footer.S
+++ b/runtime/interpreter/mterp/x86/footer.S
@@ -115,10 +115,9 @@
call SYMBOL(MterpHandleException)
testb %al, %al
jz MterpExceptionReturn
- movl OFF_FP_CODE_ITEM(rFP), %eax
+ movl OFF_FP_DEX_INSTRUCTIONS(rFP), %eax
movl OFF_FP_DEX_PC(rFP), %ecx
- lea CODEITEM_INSNS_OFFSET(%eax), rPC
- lea (rPC, %ecx, 2), rPC
+ lea (%eax, %ecx, 2), rPC
movl rPC, OFF_FP_DEX_PC_PTR(rFP)
/* Do we need to switch interpreters? */
call SYMBOL(MterpShouldSwitchInterpreters)
diff --git a/runtime/interpreter/mterp/x86/header.S b/runtime/interpreter/mterp/x86/header.S
index 3a2dcb7..370012f 100644
--- a/runtime/interpreter/mterp/x86/header.S
+++ b/runtime/interpreter/mterp/x86/header.S
@@ -128,7 +128,7 @@
#define OFF_FP_METHOD OFF_FP(SHADOWFRAME_METHOD_OFFSET)
#define OFF_FP_RESULT_REGISTER OFF_FP(SHADOWFRAME_RESULT_REGISTER_OFFSET)
#define OFF_FP_DEX_PC_PTR OFF_FP(SHADOWFRAME_DEX_PC_PTR_OFFSET)
-#define OFF_FP_CODE_ITEM OFF_FP(SHADOWFRAME_CODE_ITEM_OFFSET)
+#define OFF_FP_DEX_INSTRUCTIONS OFF_FP(SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET)
#define OFF_FP_COUNTDOWN_OFFSET OFF_FP(SHADOWFRAME_HOTNESS_COUNTDOWN_OFFSET)
#define OFF_FP_SHADOWFRAME OFF_FP(0)
diff --git a/runtime/interpreter/mterp/x86_64/entry.S b/runtime/interpreter/mterp/x86_64/entry.S
index 0f969eb..83b845b 100644
--- a/runtime/interpreter/mterp/x86_64/entry.S
+++ b/runtime/interpreter/mterp/x86_64/entry.S
@@ -50,15 +50,14 @@
movq IN_ARG3, SHADOWFRAME_RESULT_REGISTER_OFFSET(IN_ARG2)
/* Remember the code_item */
- movq IN_ARG1, SHADOWFRAME_CODE_ITEM_OFFSET(IN_ARG2)
+ movq IN_ARG1, SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET(IN_ARG2)
/* set up "named" registers */
movl SHADOWFRAME_NUMBER_OF_VREGS_OFFSET(IN_ARG2), %eax
leaq SHADOWFRAME_VREGS_OFFSET(IN_ARG2), rFP
leaq (rFP, %rax, 4), rREFS
movl SHADOWFRAME_DEX_PC_OFFSET(IN_ARG2), %eax
- leaq CODEITEM_INSNS_OFFSET(IN_ARG1), rPC
- leaq (rPC, %rax, 2), rPC
+ leaq (IN_ARG1, %rax, 2), rPC
EXPORT_PC
/* Starting ibase */
diff --git a/runtime/interpreter/mterp/x86_64/footer.S b/runtime/interpreter/mterp/x86_64/footer.S
index ac6cd19..3cc7532 100644
--- a/runtime/interpreter/mterp/x86_64/footer.S
+++ b/runtime/interpreter/mterp/x86_64/footer.S
@@ -98,10 +98,9 @@
call SYMBOL(MterpHandleException)
testb %al, %al
jz MterpExceptionReturn
- movq OFF_FP_CODE_ITEM(rFP), %rax
+ movq OFF_FP_DEX_INSTRUCTIONS(rFP), %rax
mov OFF_FP_DEX_PC(rFP), %ecx
- leaq CODEITEM_INSNS_OFFSET(%rax), rPC
- leaq (rPC, %rcx, 2), rPC
+ leaq (%rax, %rcx, 2), rPC
movq rPC, OFF_FP_DEX_PC_PTR(rFP)
/* Do we need to switch interpreters? */
call SYMBOL(MterpShouldSwitchInterpreters)
diff --git a/runtime/interpreter/mterp/x86_64/header.S b/runtime/interpreter/mterp/x86_64/header.S
index f229e84..9d21f3f 100644
--- a/runtime/interpreter/mterp/x86_64/header.S
+++ b/runtime/interpreter/mterp/x86_64/header.S
@@ -124,7 +124,7 @@
#define OFF_FP_METHOD OFF_FP(SHADOWFRAME_METHOD_OFFSET)
#define OFF_FP_RESULT_REGISTER OFF_FP(SHADOWFRAME_RESULT_REGISTER_OFFSET)
#define OFF_FP_DEX_PC_PTR OFF_FP(SHADOWFRAME_DEX_PC_PTR_OFFSET)
-#define OFF_FP_CODE_ITEM OFF_FP(SHADOWFRAME_CODE_ITEM_OFFSET)
+#define OFF_FP_DEX_INSTRUCTIONS OFF_FP(SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET)
#define OFF_FP_COUNTDOWN_OFFSET OFF_FP(SHADOWFRAME_HOTNESS_COUNTDOWN_OFFSET)
#define OFF_FP_SHADOWFRAME (-SHADOWFRAME_VREGS_OFFSET)
diff --git a/runtime/interpreter/shadow_frame.h b/runtime/interpreter/shadow_frame.h
index 80fdadb..88275cc 100644
--- a/runtime/interpreter/shadow_frame.h
+++ b/runtime/interpreter/shadow_frame.h
@@ -92,7 +92,7 @@
}
uint32_t GetDexPC() const {
- return (dex_pc_ptr_ == nullptr) ? dex_pc_ : dex_pc_ptr_ - code_item_->insns_;
+ return (dex_pc_ptr_ == nullptr) ? dex_pc_ : dex_pc_ptr_ - dex_instructions_;
}
int16_t GetCachedHotnessCountdown() const {
@@ -146,12 +146,8 @@
return &vregs_[i + NumberOfVRegs()];
}
- void SetCodeItem(const DexFile::CodeItem* code_item) {
- code_item_ = code_item;
- }
-
- const DexFile::CodeItem* GetCodeItem() const {
- return code_item_;
+ const uint16_t* GetDexInstructions() const {
+ return dex_instructions_;
}
float GetVRegFloat(size_t i) const {
@@ -324,8 +320,8 @@
return OFFSETOF_MEMBER(ShadowFrame, dex_pc_ptr_);
}
- static size_t CodeItemOffset() {
- return OFFSETOF_MEMBER(ShadowFrame, code_item_);
+ static size_t DexInstructionsOffset() {
+ return OFFSETOF_MEMBER(ShadowFrame, dex_instructions_);
}
static size_t CachedHotnessCountdownOffset() {
@@ -372,7 +368,7 @@
method_(method),
result_register_(nullptr),
dex_pc_ptr_(nullptr),
- code_item_(nullptr),
+ dex_instructions_(nullptr),
number_of_vregs_(num_vregs),
dex_pc_(dex_pc),
cached_hotness_countdown_(0),
@@ -403,7 +399,8 @@
ArtMethod* method_;
JValue* result_register_;
const uint16_t* dex_pc_ptr_;
- const DexFile::CodeItem* code_item_;
+ // Dex instruction base of the code item.
+ const uint16_t* dex_instructions_;
LockCountData lock_count_data_; // This may contain GC roots when lock counting is active.
const uint32_t number_of_vregs_;
uint32_t dex_pc_;