ART: Fix GenInlined functions
This patch fixes Mir2Lir::GenInlinedReverseBytes,
Mir2Lir::GenInlinedAbsInt, Mir2Lir::GenInlinedAbsLong,
Mir2Lir::GenInlinedFloatCvt, Mir2Lir::GenInlinedDoubleCvt,
X86Mir2Lir::GenInlinedSqrt, X86Mir2Lir::GenInlinedMinMaxFP,
X86Mir2Lir::GenInlinedMinMax, X86Mir2Lir::GenInlinedPeek,
and X86Mir2Lir::GenInlinedReverseBits to generate no code, when results
are unused.
New calls without assignments are added to 082-inline-execute.
Change-Id: I7076e9ddbea43545315f2aeb677c63a8a6e95224
Signed-off-by: Chao-ying Fu <chao-ying.fu@intel.com>
diff --git a/compiler/dex/quick/gen_invoke.cc b/compiler/dex/quick/gen_invoke.cc
index 2a6dfef..d5889f5 100755
--- a/compiler/dex/quick/gen_invoke.cc
+++ b/compiler/dex/quick/gen_invoke.cc
@@ -1048,9 +1048,13 @@
// TODO - add Mips implementation.
return false;
}
+ RegLocation rl_dest = IsWide(size) ? InlineTargetWide(info) : InlineTarget(info); // result reg
+ if (rl_dest.s_reg_low == INVALID_SREG) {
+ // Result is unused, the code is dead. Inlining successful, no code generated.
+ return true;
+ }
RegLocation rl_src_i = info->args[0];
RegLocation rl_i = IsWide(size) ? LoadValueWide(rl_src_i, kCoreReg) : LoadValue(rl_src_i, kCoreReg);
- RegLocation rl_dest = IsWide(size) ? InlineTargetWide(info) : InlineTarget(info); // result reg
RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true);
if (IsWide(size)) {
if (cu_->instruction_set == kArm64 || cu_->instruction_set == kX86_64) {
@@ -1080,9 +1084,13 @@
}
bool Mir2Lir::GenInlinedAbsInt(CallInfo* info) {
+ RegLocation rl_dest = InlineTarget(info);
+ if (rl_dest.s_reg_low == INVALID_SREG) {
+ // Result is unused, the code is dead. Inlining successful, no code generated.
+ return true;
+ }
RegLocation rl_src = info->args[0];
rl_src = LoadValue(rl_src, kCoreReg);
- RegLocation rl_dest = InlineTarget(info);
RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true);
RegStorage sign_reg = AllocTemp();
// abs(x) = y<=x>>31, (x+y)^y.
@@ -1094,9 +1102,13 @@
}
bool Mir2Lir::GenInlinedAbsLong(CallInfo* info) {
+ RegLocation rl_dest = InlineTargetWide(info);
+ if (rl_dest.s_reg_low == INVALID_SREG) {
+ // Result is unused, the code is dead. Inlining successful, no code generated.
+ return true;
+ }
RegLocation rl_src = info->args[0];
rl_src = LoadValueWide(rl_src, kCoreReg);
- RegLocation rl_dest = InlineTargetWide(info);
RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true);
// If on x86 or if we would clobber a register needed later, just copy the source first.
@@ -1171,8 +1183,12 @@
// TODO - add Mips implementation
return false;
}
- RegLocation rl_src = info->args[0];
RegLocation rl_dest = InlineTarget(info);
+ if (rl_dest.s_reg_low == INVALID_SREG) {
+ // Result is unused, the code is dead. Inlining successful, no code generated.
+ return true;
+ }
+ RegLocation rl_src = info->args[0];
StoreValue(rl_dest, rl_src);
return true;
}
@@ -1182,8 +1198,12 @@
// TODO - add Mips implementation
return false;
}
- RegLocation rl_src = info->args[0];
RegLocation rl_dest = InlineTargetWide(info);
+ if (rl_dest.s_reg_low == INVALID_SREG) {
+ // Result is unused, the code is dead. Inlining successful, no code generated.
+ return true;
+ }
+ RegLocation rl_src = info->args[0];
StoreValueWide(rl_dest, rl_src);
return true;
}
diff --git a/compiler/dex/quick/x86/fp_x86.cc b/compiler/dex/quick/x86/fp_x86.cc
index 4825db6..89c5648 100755
--- a/compiler/dex/quick/x86/fp_x86.cc
+++ b/compiler/dex/quick/x86/fp_x86.cc
@@ -599,8 +599,12 @@
}
bool X86Mir2Lir::GenInlinedSqrt(CallInfo* info) {
- RegLocation rl_src = info->args[0];
RegLocation rl_dest = InlineTargetWide(info); // double place for result
+ if (rl_dest.s_reg_low == INVALID_SREG) {
+ // Result is unused, the code is dead. Inlining successful, no code generated.
+ return true;
+ }
+ RegLocation rl_src = info->args[0];
rl_src = LoadValueWide(rl_src, kFPReg);
RegLocation rl_result = EvalLoc(rl_dest, kFPReg, true);
NewLIR2(kX86SqrtsdRR, rl_result.reg.GetReg(), rl_src.reg.GetReg());
@@ -722,9 +726,13 @@
bool X86Mir2Lir::GenInlinedMinMaxFP(CallInfo* info, bool is_min, bool is_double) {
if (is_double) {
+ RegLocation rl_dest = InlineTargetWide(info);
+ if (rl_dest.s_reg_low == INVALID_SREG) {
+ // Result is unused, the code is dead. Inlining successful, no code generated.
+ return true;
+ }
RegLocation rl_src1 = LoadValueWide(info->args[0], kFPReg);
RegLocation rl_src2 = LoadValueWide(info->args[2], kFPReg);
- RegLocation rl_dest = InlineTargetWide(info);
RegLocation rl_result = EvalLocWide(rl_dest, kFPReg, true);
// Avoid src2 corruption by OpRegCopyWide.
@@ -775,9 +783,13 @@
branch_exit_equal->target = NewLIR0(kPseudoTargetLabel);
StoreValueWide(rl_dest, rl_result);
} else {
+ RegLocation rl_dest = InlineTarget(info);
+ if (rl_dest.s_reg_low == INVALID_SREG) {
+ // Result is unused, the code is dead. Inlining successful, no code generated.
+ return true;
+ }
RegLocation rl_src1 = LoadValue(info->args[0], kFPReg);
RegLocation rl_src2 = LoadValue(info->args[1], kFPReg);
- RegLocation rl_dest = InlineTarget(info);
RegLocation rl_result = EvalLoc(rl_dest, kFPReg, true);
// Avoid src2 corruption by OpRegCopyWide.
diff --git a/compiler/dex/quick/x86/int_x86.cc b/compiler/dex/quick/x86/int_x86.cc
index ba9c611..03156dc 100755
--- a/compiler/dex/quick/x86/int_x86.cc
+++ b/compiler/dex/quick/x86/int_x86.cc
@@ -948,12 +948,16 @@
}
// Get the two arguments to the invoke and place them in GP registers.
+ RegLocation rl_dest = (is_long) ? InlineTargetWide(info) : InlineTarget(info);
+ if (rl_dest.s_reg_low == INVALID_SREG) {
+ // Result is unused, the code is dead. Inlining successful, no code generated.
+ return true;
+ }
RegLocation rl_src1 = info->args[0];
RegLocation rl_src2 = (is_long) ? info->args[2] : info->args[1];
rl_src1 = (is_long) ? LoadValueWide(rl_src1, kCoreReg) : LoadValue(rl_src1, kCoreReg);
rl_src2 = (is_long) ? LoadValueWide(rl_src2, kCoreReg) : LoadValue(rl_src2, kCoreReg);
- RegLocation rl_dest = (is_long) ? InlineTargetWide(info) : InlineTarget(info);
RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true);
/*
@@ -988,6 +992,11 @@
}
bool X86Mir2Lir::GenInlinedPeek(CallInfo* info, OpSize size) {
+ RegLocation rl_dest = size == k64 ? InlineTargetWide(info) : InlineTarget(info);
+ if (rl_dest.s_reg_low == INVALID_SREG) {
+ // Result is unused, the code is dead. Inlining successful, no code generated.
+ return true;
+ }
RegLocation rl_src_address = info->args[0]; // long address
RegLocation rl_address;
if (!cu_->target64) {
@@ -996,7 +1005,6 @@
} else {
rl_address = LoadValueWide(rl_src_address, kCoreReg);
}
- RegLocation rl_dest = size == k64 ? InlineTargetWide(info) : InlineTarget(info);
RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true);
// Unaligned access is allowed on x86.
LoadBaseDisp(rl_address.reg, 0, rl_result.reg, size, kNotVolatile);
@@ -1238,10 +1246,14 @@
}
bool X86Mir2Lir::GenInlinedReverseBits(CallInfo* info, OpSize size) {
+ RegLocation rl_dest = (size == k64) ? InlineTargetWide(info) : InlineTarget(info);
+ if (rl_dest.s_reg_low == INVALID_SREG) {
+ // Result is unused, the code is dead. Inlining successful, no code generated.
+ return true;
+ }
RegLocation rl_src_i = info->args[0];
RegLocation rl_i = (size == k64) ? LoadValueWide(rl_src_i, kCoreReg)
: LoadValue(rl_src_i, kCoreReg);
- RegLocation rl_dest = (size == k64) ? InlineTargetWide(info) : InlineTarget(info);
RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true);
if (size == k64) {
if (cu_->instruction_set == kX86_64) {