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Alexandre Rames22aa54b2016-10-18 09:32:29 +01001/*
2 * Copyright (C) 2016 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
Andreas Gampe8cf9cb32017-07-19 09:28:38 -070017#include "scheduler.h"
18
Alexandre Rames22aa54b2016-10-18 09:32:29 +010019#include "base/arena_allocator.h"
20#include "builder.h"
21#include "codegen_test_utils.h"
22#include "common_compiler_test.h"
xueliang.zhong2a3471f2017-05-08 18:36:40 +010023#include "load_store_analysis.h"
Alexandre Rames22aa54b2016-10-18 09:32:29 +010024#include "nodes.h"
25#include "optimizing_unit_test.h"
26#include "pc_relative_fixups_x86.h"
27#include "register_allocator.h"
Alexandre Rames22aa54b2016-10-18 09:32:29 +010028
29#ifdef ART_ENABLE_CODEGEN_arm64
30#include "scheduler_arm64.h"
31#endif
32
xueliang.zhongf7caf682017-03-01 16:07:02 +000033#ifdef ART_ENABLE_CODEGEN_arm
34#include "scheduler_arm.h"
35#endif
36
Alexandre Rames22aa54b2016-10-18 09:32:29 +010037namespace art {
38
39// Return all combinations of ISA and code generator that are executable on
40// hardware, or on simulator, and that we'd like to test.
41static ::std::vector<CodegenTargetConfig> GetTargetConfigs() {
42 ::std::vector<CodegenTargetConfig> v;
43 ::std::vector<CodegenTargetConfig> test_config_candidates = {
44#ifdef ART_ENABLE_CODEGEN_arm
Roland Levillain9983e302017-07-14 14:34:22 +010045 // TODO: Should't this be `kThumb2` instead of `kArm` here?
46 CodegenTargetConfig(kArm, create_codegen_arm_vixl32),
Alexandre Rames22aa54b2016-10-18 09:32:29 +010047#endif
48#ifdef ART_ENABLE_CODEGEN_arm64
49 CodegenTargetConfig(kArm64, create_codegen_arm64),
50#endif
51#ifdef ART_ENABLE_CODEGEN_x86
52 CodegenTargetConfig(kX86, create_codegen_x86),
53#endif
54#ifdef ART_ENABLE_CODEGEN_x86_64
55 CodegenTargetConfig(kX86_64, create_codegen_x86_64),
56#endif
57#ifdef ART_ENABLE_CODEGEN_mips
58 CodegenTargetConfig(kMips, create_codegen_mips),
59#endif
60#ifdef ART_ENABLE_CODEGEN_mips64
61 CodegenTargetConfig(kMips64, create_codegen_mips64)
62#endif
63 };
64
Vladimir Marko7d157fc2017-05-10 16:29:23 +010065 for (const CodegenTargetConfig& test_config : test_config_candidates) {
Alexandre Rames22aa54b2016-10-18 09:32:29 +010066 if (CanExecute(test_config.GetInstructionSet())) {
67 v.push_back(test_config);
68 }
69 }
70
71 return v;
72}
73
xueliang.zhongf7caf682017-03-01 16:07:02 +000074class SchedulerTest : public CommonCompilerTest {
75 public:
76 SchedulerTest() : pool_(), allocator_(&pool_) {
77 graph_ = CreateGraph(&allocator_);
Alexandre Rames22aa54b2016-10-18 09:32:29 +010078 }
79
xueliang.zhongf7caf682017-03-01 16:07:02 +000080 // Build scheduling graph, and run target specific scheduling on it.
81 void TestBuildDependencyGraphAndSchedule(HScheduler* scheduler) {
82 HBasicBlock* entry = new (&allocator_) HBasicBlock(graph_);
83 HBasicBlock* block1 = new (&allocator_) HBasicBlock(graph_);
84 graph_->AddBlock(entry);
85 graph_->AddBlock(block1);
86 graph_->SetEntryBlock(entry);
87
88 // entry:
89 // array ParameterValue
90 // c1 IntConstant
91 // c2 IntConstant
92 // block1:
93 // add1 Add [c1, c2]
94 // add2 Add [add1, c2]
95 // mul Mul [add1, add2]
96 // div_check DivZeroCheck [add2] (env: add2, mul)
97 // div Div [add1, div_check]
98 // array_get1 ArrayGet [array, add1]
99 // array_set1 ArraySet [array, add1, add2]
100 // array_get2 ArrayGet [array, add1]
101 // array_set2 ArraySet [array, add1, add2]
102
103 HInstruction* array = new (&allocator_) HParameterValue(graph_->GetDexFile(),
104 dex::TypeIndex(0),
Alexandre Rames22aa54b2016-10-18 09:32:29 +0100105 0,
xueliang.zhongf7caf682017-03-01 16:07:02 +0000106 Primitive::kPrimNot);
107 HInstruction* c1 = graph_->GetIntConstant(1);
108 HInstruction* c2 = graph_->GetIntConstant(10);
109 HInstruction* add1 = new (&allocator_) HAdd(Primitive::kPrimInt, c1, c2);
110 HInstruction* add2 = new (&allocator_) HAdd(Primitive::kPrimInt, add1, c2);
111 HInstruction* mul = new (&allocator_) HMul(Primitive::kPrimInt, add1, add2);
112 HInstruction* div_check = new (&allocator_) HDivZeroCheck(add2, 0);
113 HInstruction* div = new (&allocator_) HDiv(Primitive::kPrimInt, add1, div_check, 0);
114 HInstruction* array_get1 = new (&allocator_) HArrayGet(array, add1, Primitive::kPrimInt, 0);
115 HInstruction* array_set1 = new (&allocator_) HArraySet(array, add1, add2, Primitive::kPrimInt, 0);
116 HInstruction* array_get2 = new (&allocator_) HArrayGet(array, add1, Primitive::kPrimInt, 0);
117 HInstruction* array_set2 = new (&allocator_) HArraySet(array, add1, add2, Primitive::kPrimInt, 0);
Alexandre Rames22aa54b2016-10-18 09:32:29 +0100118
xueliang.zhongf7caf682017-03-01 16:07:02 +0000119 DCHECK(div_check->CanThrow());
120
121 entry->AddInstruction(array);
122
123 HInstruction* block_instructions[] = {add1,
124 add2,
125 mul,
126 div_check,
127 div,
128 array_get1,
129 array_set1,
130 array_get2,
131 array_set2};
Vladimir Marko7d157fc2017-05-10 16:29:23 +0100132 for (HInstruction* instr : block_instructions) {
xueliang.zhongf7caf682017-03-01 16:07:02 +0000133 block1->AddInstruction(instr);
134 }
135
136 HEnvironment* environment = new (&allocator_) HEnvironment(&allocator_,
137 2,
138 graph_->GetArtMethod(),
139 0,
140 div_check);
141 div_check->SetRawEnvironment(environment);
142 environment->SetRawEnvAt(0, add2);
143 add2->AddEnvUseAt(div_check->GetEnvironment(), 0);
144 environment->SetRawEnvAt(1, mul);
145 mul->AddEnvUseAt(div_check->GetEnvironment(), 1);
146
147 SchedulingGraph scheduling_graph(scheduler, graph_->GetArena());
148 // Instructions must be inserted in reverse order into the scheduling graph.
Vladimir Marko7d157fc2017-05-10 16:29:23 +0100149 for (HInstruction* instr : ReverseRange(block_instructions)) {
xueliang.zhongf7caf682017-03-01 16:07:02 +0000150 scheduling_graph.AddNode(instr);
151 }
152
153 // Should not have dependencies cross basic blocks.
154 ASSERT_FALSE(scheduling_graph.HasImmediateDataDependency(add1, c1));
155 ASSERT_FALSE(scheduling_graph.HasImmediateDataDependency(add2, c2));
156
157 // Define-use dependency.
158 ASSERT_TRUE(scheduling_graph.HasImmediateDataDependency(add2, add1));
159 ASSERT_FALSE(scheduling_graph.HasImmediateDataDependency(add1, add2));
160 ASSERT_TRUE(scheduling_graph.HasImmediateDataDependency(div_check, add2));
161 ASSERT_FALSE(scheduling_graph.HasImmediateDataDependency(div_check, add1));
162 ASSERT_TRUE(scheduling_graph.HasImmediateDataDependency(div, div_check));
163 ASSERT_TRUE(scheduling_graph.HasImmediateDataDependency(array_set1, add1));
164 ASSERT_TRUE(scheduling_graph.HasImmediateDataDependency(array_set1, add2));
165
166 // Read and write dependencies
167 ASSERT_TRUE(scheduling_graph.HasImmediateOtherDependency(array_set1, array_get1));
168 ASSERT_TRUE(scheduling_graph.HasImmediateOtherDependency(array_set2, array_get2));
169 ASSERT_TRUE(scheduling_graph.HasImmediateOtherDependency(array_get2, array_set1));
170 ASSERT_TRUE(scheduling_graph.HasImmediateOtherDependency(array_set2, array_set1));
171
172 // Env dependency.
173 ASSERT_TRUE(scheduling_graph.HasImmediateOtherDependency(div_check, mul));
174 ASSERT_FALSE(scheduling_graph.HasImmediateOtherDependency(mul, div_check));
175
176 // CanThrow.
177 ASSERT_TRUE(scheduling_graph.HasImmediateOtherDependency(array_set1, div_check));
178
179 // Exercise the code path of target specific scheduler and SchedulingLatencyVisitor.
180 scheduler->Schedule(graph_);
Alexandre Rames22aa54b2016-10-18 09:32:29 +0100181 }
182
xueliang.zhongf7caf682017-03-01 16:07:02 +0000183 void CompileWithRandomSchedulerAndRun(const uint16_t* data, bool has_result, int expected) {
184 for (CodegenTargetConfig target_config : GetTargetConfigs()) {
185 HGraph* graph = CreateCFG(&allocator_, data);
Alexandre Rames22aa54b2016-10-18 09:32:29 +0100186
xueliang.zhongf7caf682017-03-01 16:07:02 +0000187 // Schedule the graph randomly.
188 HInstructionScheduling scheduling(graph, target_config.GetInstructionSet());
189 scheduling.Run(/*only_optimize_loop_blocks*/ false, /*schedule_randomly*/ true);
Alexandre Rames22aa54b2016-10-18 09:32:29 +0100190
xueliang.zhongf7caf682017-03-01 16:07:02 +0000191 RunCode(target_config,
192 graph,
193 [](HGraph* graph_arg) { RemoveSuspendChecks(graph_arg); },
194 has_result, expected);
195 }
196 }
Alexandre Rames22aa54b2016-10-18 09:32:29 +0100197
xueliang.zhong2a3471f2017-05-08 18:36:40 +0100198 void TestDependencyGraphOnAliasingArrayAccesses(HScheduler* scheduler) {
199 HBasicBlock* entry = new (&allocator_) HBasicBlock(graph_);
200 graph_->AddBlock(entry);
201 graph_->SetEntryBlock(entry);
202 graph_->BuildDominatorTree();
203
204 HInstruction* arr = new (&allocator_) HParameterValue(graph_->GetDexFile(),
205 dex::TypeIndex(0),
206 0,
207 Primitive::kPrimNot);
208 HInstruction* i = new (&allocator_) HParameterValue(graph_->GetDexFile(),
209 dex::TypeIndex(1),
210 1,
211 Primitive::kPrimInt);
212 HInstruction* j = new (&allocator_) HParameterValue(graph_->GetDexFile(),
213 dex::TypeIndex(1),
214 1,
215 Primitive::kPrimInt);
216 HInstruction* object = new (&allocator_) HParameterValue(graph_->GetDexFile(),
217 dex::TypeIndex(0),
218 0,
219 Primitive::kPrimNot);
220 HInstruction* c0 = graph_->GetIntConstant(0);
221 HInstruction* c1 = graph_->GetIntConstant(1);
222 HInstruction* add0 = new (&allocator_) HAdd(Primitive::kPrimInt, i, c0);
223 HInstruction* add1 = new (&allocator_) HAdd(Primitive::kPrimInt, i, c1);
224 HInstruction* sub0 = new (&allocator_) HSub(Primitive::kPrimInt, i, c0);
225 HInstruction* sub1 = new (&allocator_) HSub(Primitive::kPrimInt, i, c1);
226 HInstruction* arr_set_0 = new (&allocator_) HArraySet(arr, c0, c0, Primitive::kPrimInt, 0);
227 HInstruction* arr_set_1 = new (&allocator_) HArraySet(arr, c1, c0, Primitive::kPrimInt, 0);
228 HInstruction* arr_set_i = new (&allocator_) HArraySet(arr, i, c0, Primitive::kPrimInt, 0);
229 HInstruction* arr_set_add0 = new (&allocator_) HArraySet(arr, add0, c0, Primitive::kPrimInt, 0);
230 HInstruction* arr_set_add1 = new (&allocator_) HArraySet(arr, add1, c0, Primitive::kPrimInt, 0);
231 HInstruction* arr_set_sub0 = new (&allocator_) HArraySet(arr, sub0, c0, Primitive::kPrimInt, 0);
232 HInstruction* arr_set_sub1 = new (&allocator_) HArraySet(arr, sub1, c0, Primitive::kPrimInt, 0);
233 HInstruction* arr_set_j = new (&allocator_) HArraySet(arr, j, c0, Primitive::kPrimInt, 0);
234 HInstanceFieldSet* set_field10 = new (&allocator_) HInstanceFieldSet(object,
235 c1,
236 nullptr,
237 Primitive::kPrimInt,
238 MemberOffset(10),
239 false,
240 kUnknownFieldIndex,
241 kUnknownClassDefIndex,
242 graph_->GetDexFile(),
243 0);
244
245 HInstruction* block_instructions[] = {arr,
246 i,
247 j,
248 object,
249 add0,
250 add1,
251 sub0,
252 sub1,
253 arr_set_0,
254 arr_set_1,
255 arr_set_i,
256 arr_set_add0,
257 arr_set_add1,
258 arr_set_sub0,
259 arr_set_sub1,
260 arr_set_j,
261 set_field10};
262
263 for (HInstruction* instr : block_instructions) {
264 entry->AddInstruction(instr);
265 }
266
267 SchedulingGraph scheduling_graph(scheduler, graph_->GetArena());
268 HeapLocationCollector heap_location_collector(graph_);
269 heap_location_collector.VisitBasicBlock(entry);
270 heap_location_collector.BuildAliasingMatrix();
271 scheduling_graph.SetHeapLocationCollector(heap_location_collector);
272
273 for (HInstruction* instr : ReverseRange(block_instructions)) {
274 // Build scheduling graph with memory access aliasing information
275 // from LSA/heap_location_collector.
276 scheduling_graph.AddNode(instr);
277 }
278
279 // LSA/HeapLocationCollector should see those ArraySet instructions.
280 ASSERT_EQ(heap_location_collector.GetNumberOfHeapLocations(), 9U);
281 ASSERT_TRUE(heap_location_collector.HasHeapStores());
282
283 // Test queries on HeapLocationCollector's aliasing matrix after load store analysis.
284 // HeapLocationCollector and SchedulingGraph should report consistent relationships.
285 size_t loc1 = HeapLocationCollector::kHeapLocationNotFound;
286 size_t loc2 = HeapLocationCollector::kHeapLocationNotFound;
287
288 // Test side effect dependency: array[0] and array[1]
289 loc1 = heap_location_collector.GetArrayAccessHeapLocation(arr, c0);
290 loc2 = heap_location_collector.GetArrayAccessHeapLocation(arr, c1);
291 ASSERT_FALSE(heap_location_collector.MayAlias(loc1, loc2));
292 ASSERT_FALSE(scheduling_graph.HasImmediateOtherDependency(arr_set_1, arr_set_0));
293
294 // Test side effect dependency based on LSA analysis: array[i] and array[j]
295 loc1 = heap_location_collector.GetArrayAccessHeapLocation(arr, i);
296 loc2 = heap_location_collector.GetArrayAccessHeapLocation(arr, j);
297 ASSERT_TRUE(heap_location_collector.MayAlias(loc1, loc2));
298 ASSERT_TRUE(scheduling_graph.HasImmediateOtherDependency(arr_set_j, arr_set_i));
299
300 // Test side effect dependency based on LSA analysis: array[i] and array[i+0]
301 loc1 = heap_location_collector.GetArrayAccessHeapLocation(arr, i);
302 loc2 = heap_location_collector.GetArrayAccessHeapLocation(arr, add0);
303 ASSERT_TRUE(heap_location_collector.MayAlias(loc1, loc2));
304 ASSERT_TRUE(scheduling_graph.HasImmediateOtherDependency(arr_set_add0, arr_set_i));
305
306 // Test side effect dependency based on LSA analysis: array[i] and array[i-0]
307 loc1 = heap_location_collector.GetArrayAccessHeapLocation(arr, i);
308 loc2 = heap_location_collector.GetArrayAccessHeapLocation(arr, sub0);
309 ASSERT_TRUE(heap_location_collector.MayAlias(loc1, loc2));
310 ASSERT_TRUE(scheduling_graph.HasImmediateOtherDependency(arr_set_sub0, arr_set_i));
311
312 // Test side effect dependency based on LSA analysis: array[i] and array[i+1]
313 loc1 = heap_location_collector.GetArrayAccessHeapLocation(arr, i);
314 loc2 = heap_location_collector.GetArrayAccessHeapLocation(arr, add1);
315 ASSERT_FALSE(heap_location_collector.MayAlias(loc1, loc2));
316 ASSERT_FALSE(scheduling_graph.HasImmediateOtherDependency(arr_set_add1, arr_set_i));
317
318 // Test side effect dependency based on LSA analysis: array[i+1] and array[i-1]
319 loc1 = heap_location_collector.GetArrayAccessHeapLocation(arr, add1);
320 loc2 = heap_location_collector.GetArrayAccessHeapLocation(arr, sub1);
321 ASSERT_FALSE(heap_location_collector.MayAlias(loc1, loc2));
322 ASSERT_FALSE(scheduling_graph.HasImmediateOtherDependency(arr_set_sub1, arr_set_add1));
323
324 // Test side effect dependency based on LSA analysis: array[j] and all others array accesses
325 ASSERT_TRUE(scheduling_graph.HasImmediateOtherDependency(arr_set_j, arr_set_i));
326 ASSERT_TRUE(scheduling_graph.HasImmediateOtherDependency(arr_set_j, arr_set_add0));
327 ASSERT_TRUE(scheduling_graph.HasImmediateOtherDependency(arr_set_j, arr_set_sub0));
328 ASSERT_TRUE(scheduling_graph.HasImmediateOtherDependency(arr_set_j, arr_set_add1));
329 ASSERT_TRUE(scheduling_graph.HasImmediateOtherDependency(arr_set_j, arr_set_sub1));
330
331 // Test that ArraySet and FieldSet should not have side effect dependency
332 ASSERT_FALSE(scheduling_graph.HasImmediateOtherDependency(arr_set_i, set_field10));
333 ASSERT_FALSE(scheduling_graph.HasImmediateOtherDependency(arr_set_j, set_field10));
334
335 // Exercise target specific scheduler and SchedulingLatencyVisitor.
336 scheduler->Schedule(graph_);
337 }
338
xueliang.zhongf7caf682017-03-01 16:07:02 +0000339 ArenaPool pool_;
340 ArenaAllocator allocator_;
341 HGraph* graph_;
342};
Alexandre Rames22aa54b2016-10-18 09:32:29 +0100343
xueliang.zhongf7caf682017-03-01 16:07:02 +0000344#if defined(ART_ENABLE_CODEGEN_arm64)
345TEST_F(SchedulerTest, DependencyGraphAndSchedulerARM64) {
346 CriticalPathSchedulingNodeSelector critical_path_selector;
347 arm64::HSchedulerARM64 scheduler(&allocator_, &critical_path_selector);
348 TestBuildDependencyGraphAndSchedule(&scheduler);
Alexandre Rames22aa54b2016-10-18 09:32:29 +0100349}
xueliang.zhong2a3471f2017-05-08 18:36:40 +0100350
351TEST_F(SchedulerTest, ArrayAccessAliasingARM64) {
352 CriticalPathSchedulingNodeSelector critical_path_selector;
353 arm64::HSchedulerARM64 scheduler(&allocator_, &critical_path_selector);
354 TestDependencyGraphOnAliasingArrayAccesses(&scheduler);
355}
Alexandre Rames22aa54b2016-10-18 09:32:29 +0100356#endif
357
xueliang.zhongf7caf682017-03-01 16:07:02 +0000358#if defined(ART_ENABLE_CODEGEN_arm)
xueliang.zhong2a3471f2017-05-08 18:36:40 +0100359TEST_F(SchedulerTest, DependencyGraphAndSchedulerARM) {
xueliang.zhongf7caf682017-03-01 16:07:02 +0000360 CriticalPathSchedulingNodeSelector critical_path_selector;
361 arm::SchedulingLatencyVisitorARM arm_latency_visitor(/*CodeGenerator*/ nullptr);
362 arm::HSchedulerARM scheduler(&allocator_, &critical_path_selector, &arm_latency_visitor);
363 TestBuildDependencyGraphAndSchedule(&scheduler);
Alexandre Rames22aa54b2016-10-18 09:32:29 +0100364}
xueliang.zhong2a3471f2017-05-08 18:36:40 +0100365
366TEST_F(SchedulerTest, ArrayAccessAliasingARM) {
367 CriticalPathSchedulingNodeSelector critical_path_selector;
368 arm::SchedulingLatencyVisitorARM arm_latency_visitor(/*CodeGenerator*/ nullptr);
369 arm::HSchedulerARM scheduler(&allocator_, &critical_path_selector, &arm_latency_visitor);
370 TestDependencyGraphOnAliasingArrayAccesses(&scheduler);
371}
xueliang.zhongf7caf682017-03-01 16:07:02 +0000372#endif
Alexandre Rames22aa54b2016-10-18 09:32:29 +0100373
374TEST_F(SchedulerTest, RandomScheduling) {
375 //
376 // Java source: crafted code to make sure (random) scheduling should get correct result.
377 //
378 // int result = 0;
379 // float fr = 10.0f;
380 // for (int i = 1; i < 10; i++) {
381 // fr ++;
382 // int t1 = result >> i;
383 // int t2 = result * i;
384 // result = result + t1 - t2;
385 // fr = fr / i;
386 // result += (int)fr;
387 // }
388 // return result;
389 //
390 const uint16_t data[] = SIX_REGISTERS_CODE_ITEM(
391 Instruction::CONST_4 | 0 << 12 | 2 << 8, // const/4 v2, #int 0
392 Instruction::CONST_HIGH16 | 0 << 8, 0x4120, // const/high16 v0, #float 10.0 // #41200000
393 Instruction::CONST_4 | 1 << 12 | 1 << 8, // const/4 v1, #int 1
394 Instruction::CONST_16 | 5 << 8, 0x000a, // const/16 v5, #int 10
395 Instruction::IF_GE | 5 << 12 | 1 << 8, 0x0014, // if-ge v1, v5, 001a // +0014
396 Instruction::CONST_HIGH16 | 5 << 8, 0x3f80, // const/high16 v5, #float 1.0 // #3f800000
397 Instruction::ADD_FLOAT_2ADDR | 5 << 12 | 0 << 8, // add-float/2addr v0, v5
398 Instruction::SHR_INT | 3 << 8, 1 << 8 | 2 , // shr-int v3, v2, v1
399 Instruction::MUL_INT | 4 << 8, 1 << 8 | 2, // mul-int v4, v2, v1
400 Instruction::ADD_INT | 5 << 8, 3 << 8 | 2, // add-int v5, v2, v3
401 Instruction::SUB_INT | 2 << 8, 4 << 8 | 5, // sub-int v2, v5, v4
402 Instruction::INT_TO_FLOAT | 1 << 12 | 5 << 8, // int-to-float v5, v1
403 Instruction::DIV_FLOAT_2ADDR | 5 << 12 | 0 << 8, // div-float/2addr v0, v5
404 Instruction::FLOAT_TO_INT | 0 << 12 | 5 << 8, // float-to-int v5, v0
405 Instruction::ADD_INT_2ADDR | 5 << 12 | 2 << 8, // add-int/2addr v2, v5
406 Instruction::ADD_INT_LIT8 | 1 << 8, 1 << 8 | 1, // add-int/lit8 v1, v1, #int 1 // #01
407 Instruction::GOTO | 0xeb << 8, // goto 0004 // -0015
408 Instruction::RETURN | 2 << 8); // return v2
409
410 constexpr int kNumberOfRuns = 10;
411 for (int i = 0; i < kNumberOfRuns; ++i) {
412 CompileWithRandomSchedulerAndRun(data, true, 138774);
413 }
414}
415
416} // namespace art