Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
Roland Levillain | 4d02711 | 2015-07-01 15:41:14 +0100 | [diff] [blame] | 13 | * See the License for the specific language governing permissions and |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #ifndef ART_COMPILER_UTILS_ARM64_ASSEMBLER_ARM64_H_ |
| 18 | #define ART_COMPILER_UTILS_ARM64_ASSEMBLER_ARM64_H_ |
| 19 | |
Stuart Monteith | b95a534 | 2014-03-12 13:32:32 +0000 | [diff] [blame] | 20 | #include <stdint.h> |
Ian Rogers | 700a402 | 2014-05-19 16:49:03 -0700 | [diff] [blame] | 21 | #include <memory> |
| 22 | #include <vector> |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 23 | |
Vladimir Marko | 93205e3 | 2016-04-13 11:59:46 +0100 | [diff] [blame] | 24 | #include "base/arena_containers.h" |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 25 | #include "base/logging.h" |
| 26 | #include "constants_arm64.h" |
| 27 | #include "utils/arm64/managed_register_arm64.h" |
| 28 | #include "utils/assembler.h" |
| 29 | #include "offsets.h" |
Andreas Gampe | 277ccbd | 2014-11-03 21:36:10 -0800 | [diff] [blame] | 30 | |
| 31 | // TODO: make vixl clean wrt -Wshadow. |
| 32 | #pragma GCC diagnostic push |
Andreas Gampe | 65b798e | 2015-04-06 09:35:22 -0700 | [diff] [blame] | 33 | #pragma GCC diagnostic ignored "-Wunknown-pragmas" |
Andreas Gampe | 277ccbd | 2014-11-03 21:36:10 -0800 | [diff] [blame] | 34 | #pragma GCC diagnostic ignored "-Wshadow" |
Andreas Gampe | 65b798e | 2015-04-06 09:35:22 -0700 | [diff] [blame] | 35 | #pragma GCC diagnostic ignored "-Wmissing-noreturn" |
Serban Constantinescu | 82e52ce | 2015-03-26 16:50:57 +0000 | [diff] [blame] | 36 | #include "vixl/a64/macro-assembler-a64.h" |
| 37 | #include "vixl/a64/disasm-a64.h" |
Andreas Gampe | 277ccbd | 2014-11-03 21:36:10 -0800 | [diff] [blame] | 38 | #pragma GCC diagnostic pop |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 39 | |
| 40 | namespace art { |
| 41 | namespace arm64 { |
| 42 | |
Andreas Gampe | c8ccf68 | 2014-09-29 20:07:43 -0700 | [diff] [blame] | 43 | #define MEM_OP(...) vixl::MemOperand(__VA_ARGS__) |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 44 | |
| 45 | enum LoadOperandType { |
| 46 | kLoadSignedByte, |
| 47 | kLoadUnsignedByte, |
| 48 | kLoadSignedHalfword, |
| 49 | kLoadUnsignedHalfword, |
| 50 | kLoadWord, |
| 51 | kLoadCoreWord, |
| 52 | kLoadSWord, |
| 53 | kLoadDWord |
| 54 | }; |
| 55 | |
| 56 | enum StoreOperandType { |
| 57 | kStoreByte, |
| 58 | kStoreHalfword, |
| 59 | kStoreWord, |
| 60 | kStoreCoreWord, |
| 61 | kStoreSWord, |
| 62 | kStoreDWord |
| 63 | }; |
| 64 | |
| 65 | class Arm64Exception; |
| 66 | |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 67 | class Arm64Assembler FINAL : public Assembler { |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 68 | public: |
Alexandre Rames | cee7524 | 2014-10-08 18:41:21 +0100 | [diff] [blame] | 69 | // We indicate the size of the initial code generation buffer to the VIXL |
| 70 | // assembler. From there we it will automatically manage the buffer. |
Vladimir Marko | 93205e3 | 2016-04-13 11:59:46 +0100 | [diff] [blame] | 71 | explicit Arm64Assembler(ArenaAllocator* arena) |
| 72 | : Assembler(arena), |
| 73 | exception_blocks_(arena->Adapter(kArenaAllocAssembler)), |
| 74 | vixl_masm_(new vixl::MacroAssembler(kArm64BaseBufferSize)) {} |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 75 | |
| 76 | virtual ~Arm64Assembler() { |
Serban Constantinescu | 0f89dac | 2014-05-08 13:52:53 +0100 | [diff] [blame] | 77 | delete vixl_masm_; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 78 | } |
| 79 | |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame] | 80 | // Finalize the code. |
| 81 | void FinalizeCode() OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 82 | |
| 83 | // Size of generated code. |
Alexandre Rames | eb7b739 | 2015-06-19 14:47:01 +0100 | [diff] [blame] | 84 | size_t CodeSize() const OVERRIDE; |
| 85 | const uint8_t* CodeBufferBaseAddress() const OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 86 | |
| 87 | // Copy instructions out of assembly buffer into the given region of memory. |
| 88 | void FinalizeInstructions(const MemoryRegion& region); |
| 89 | |
Zheng Xu | 69a5030 | 2015-04-14 20:04:41 +0800 | [diff] [blame] | 90 | void SpillRegisters(vixl::CPURegList registers, int offset); |
| 91 | void UnspillRegisters(vixl::CPURegList registers, int offset); |
| 92 | |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 93 | // Emit code that will create an activation on the stack. |
| 94 | void BuildFrame(size_t frame_size, ManagedRegister method_reg, |
| 95 | const std::vector<ManagedRegister>& callee_save_regs, |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 96 | const ManagedRegisterEntrySpills& entry_spills) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 97 | |
| 98 | // Emit code that will remove an activation from the stack. |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 99 | void RemoveFrame(size_t frame_size, const std::vector<ManagedRegister>& callee_save_regs) |
| 100 | OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 101 | |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 102 | void IncreaseFrameSize(size_t adjust) OVERRIDE; |
| 103 | void DecreaseFrameSize(size_t adjust) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 104 | |
| 105 | // Store routines. |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 106 | void Store(FrameOffset offs, ManagedRegister src, size_t size) OVERRIDE; |
| 107 | void StoreRef(FrameOffset dest, ManagedRegister src) OVERRIDE; |
| 108 | void StoreRawPtr(FrameOffset dest, ManagedRegister src) OVERRIDE; |
| 109 | void StoreImmediateToFrame(FrameOffset dest, uint32_t imm, ManagedRegister scratch) OVERRIDE; |
Serban Constantinescu | 75b9113 | 2014-04-09 18:39:10 +0100 | [diff] [blame] | 110 | void StoreImmediateToThread64(ThreadOffset<8> dest, uint32_t imm, ManagedRegister scratch) |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 111 | OVERRIDE; |
Serban Constantinescu | 75b9113 | 2014-04-09 18:39:10 +0100 | [diff] [blame] | 112 | void StoreStackOffsetToThread64(ThreadOffset<8> thr_offs, FrameOffset fr_offs, |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 113 | ManagedRegister scratch) OVERRIDE; |
Serban Constantinescu | 75b9113 | 2014-04-09 18:39:10 +0100 | [diff] [blame] | 114 | void StoreStackPointerToThread64(ThreadOffset<8> thr_offs) OVERRIDE; |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 115 | void StoreSpanning(FrameOffset dest, ManagedRegister src, FrameOffset in_off, |
| 116 | ManagedRegister scratch) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 117 | |
| 118 | // Load routines. |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 119 | void Load(ManagedRegister dest, FrameOffset src, size_t size) OVERRIDE; |
Serban Constantinescu | 75b9113 | 2014-04-09 18:39:10 +0100 | [diff] [blame] | 120 | void LoadFromThread64(ManagedRegister dest, ThreadOffset<8> src, size_t size) OVERRIDE; |
Mathieu Chartier | e401d14 | 2015-04-22 13:56:20 -0700 | [diff] [blame] | 121 | void LoadRef(ManagedRegister dest, FrameOffset src) OVERRIDE; |
| 122 | void LoadRef(ManagedRegister dest, ManagedRegister base, MemberOffset offs, |
Roland Levillain | 4d02711 | 2015-07-01 15:41:14 +0100 | [diff] [blame] | 123 | bool unpoison_reference) OVERRIDE; |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 124 | void LoadRawPtr(ManagedRegister dest, ManagedRegister base, Offset offs) OVERRIDE; |
Serban Constantinescu | 75b9113 | 2014-04-09 18:39:10 +0100 | [diff] [blame] | 125 | void LoadRawPtrFromThread64(ManagedRegister dest, ThreadOffset<8> offs) OVERRIDE; |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 126 | |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 127 | // Copying routines. |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 128 | void Move(ManagedRegister dest, ManagedRegister src, size_t size) OVERRIDE; |
Serban Constantinescu | 75b9113 | 2014-04-09 18:39:10 +0100 | [diff] [blame] | 129 | void CopyRawPtrFromThread64(FrameOffset fr_offs, ThreadOffset<8> thr_offs, |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 130 | ManagedRegister scratch) OVERRIDE; |
Serban Constantinescu | 75b9113 | 2014-04-09 18:39:10 +0100 | [diff] [blame] | 131 | void CopyRawPtrToThread64(ThreadOffset<8> thr_offs, FrameOffset fr_offs, ManagedRegister scratch) |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 132 | OVERRIDE; |
| 133 | void CopyRef(FrameOffset dest, FrameOffset src, ManagedRegister scratch) OVERRIDE; |
| 134 | void Copy(FrameOffset dest, FrameOffset src, ManagedRegister scratch, size_t size) OVERRIDE; |
| 135 | void Copy(FrameOffset dest, ManagedRegister src_base, Offset src_offset, ManagedRegister scratch, |
| 136 | size_t size) OVERRIDE; |
| 137 | void Copy(ManagedRegister dest_base, Offset dest_offset, FrameOffset src, ManagedRegister scratch, |
| 138 | size_t size) OVERRIDE; |
| 139 | void Copy(FrameOffset dest, FrameOffset src_base, Offset src_offset, ManagedRegister scratch, |
| 140 | size_t size) OVERRIDE; |
| 141 | void Copy(ManagedRegister dest, Offset dest_offset, ManagedRegister src, Offset src_offset, |
| 142 | ManagedRegister scratch, size_t size) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 143 | void Copy(FrameOffset dest, Offset dest_offset, FrameOffset src, Offset src_offset, |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 144 | ManagedRegister scratch, size_t size) OVERRIDE; |
| 145 | void MemoryBarrier(ManagedRegister scratch) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 146 | |
| 147 | // Sign extension. |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 148 | void SignExtend(ManagedRegister mreg, size_t size) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 149 | |
| 150 | // Zero extension. |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 151 | void ZeroExtend(ManagedRegister mreg, size_t size) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 152 | |
| 153 | // Exploit fast access in managed code to Thread::Current(). |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 154 | void GetCurrentThread(ManagedRegister tr) OVERRIDE; |
| 155 | void GetCurrentThread(FrameOffset dest_offset, ManagedRegister scratch) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 156 | |
Mathieu Chartier | 2cebb24 | 2015-04-21 16:50:40 -0700 | [diff] [blame] | 157 | // Set up out_reg to hold a Object** into the handle scope, or to be null if the |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 158 | // value is null and null_allowed. in_reg holds a possibly stale reference |
Mathieu Chartier | eb8167a | 2014-05-07 15:43:14 -0700 | [diff] [blame] | 159 | // that can be used to avoid loading the handle scope entry to see if the value is |
Mathieu Chartier | 2cebb24 | 2015-04-21 16:50:40 -0700 | [diff] [blame] | 160 | // null. |
Mathieu Chartier | eb8167a | 2014-05-07 15:43:14 -0700 | [diff] [blame] | 161 | void CreateHandleScopeEntry(ManagedRegister out_reg, FrameOffset handlescope_offset, |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 162 | ManagedRegister in_reg, bool null_allowed) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 163 | |
Mathieu Chartier | 2cebb24 | 2015-04-21 16:50:40 -0700 | [diff] [blame] | 164 | // Set up out_off to hold a Object** into the handle scope, or to be null if the |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 165 | // value is null and null_allowed. |
Mathieu Chartier | eb8167a | 2014-05-07 15:43:14 -0700 | [diff] [blame] | 166 | void CreateHandleScopeEntry(FrameOffset out_off, FrameOffset handlescope_offset, |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 167 | ManagedRegister scratch, bool null_allowed) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 168 | |
Mathieu Chartier | eb8167a | 2014-05-07 15:43:14 -0700 | [diff] [blame] | 169 | // src holds a handle scope entry (Object**) load this into dst. |
| 170 | void LoadReferenceFromHandleScope(ManagedRegister dst, ManagedRegister src) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 171 | |
| 172 | // Heap::VerifyObject on src. In some cases (such as a reference to this) we |
| 173 | // know that src may not be null. |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 174 | void VerifyObject(ManagedRegister src, bool could_be_null) OVERRIDE; |
| 175 | void VerifyObject(FrameOffset src, bool could_be_null) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 176 | |
| 177 | // Call to address held at [base+offset]. |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 178 | void Call(ManagedRegister base, Offset offset, ManagedRegister scratch) OVERRIDE; |
| 179 | void Call(FrameOffset base, Offset offset, ManagedRegister scratch) OVERRIDE; |
Serban Constantinescu | 75b9113 | 2014-04-09 18:39:10 +0100 | [diff] [blame] | 180 | void CallFromThread64(ThreadOffset<8> offset, ManagedRegister scratch) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 181 | |
Andreas Gampe | c6ee54e | 2014-03-24 16:45:44 -0700 | [diff] [blame] | 182 | // Jump to address (not setting link register) |
| 183 | void JumpTo(ManagedRegister m_base, Offset offs, ManagedRegister m_scratch); |
| 184 | |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 185 | // Generate code to check if Thread::Current()->exception_ is non-null |
| 186 | // and branch to a ExceptionSlowPath if it is. |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 187 | void ExceptionPoll(ManagedRegister scratch, size_t stack_adjust) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 188 | |
Roland Levillain | 4d02711 | 2015-07-01 15:41:14 +0100 | [diff] [blame] | 189 | // |
| 190 | // Heap poisoning. |
| 191 | // |
| 192 | |
| 193 | // Poison a heap reference contained in `reg`. |
| 194 | void PoisonHeapReference(vixl::Register reg); |
| 195 | // Unpoison a heap reference contained in `reg`. |
| 196 | void UnpoisonHeapReference(vixl::Register reg); |
| 197 | // Unpoison a heap reference contained in `reg` if heap poisoning is enabled. |
| 198 | void MaybeUnpoisonHeapReference(vixl::Register reg); |
| 199 | |
Andreas Gampe | 85b62f2 | 2015-09-09 13:15:38 -0700 | [diff] [blame] | 200 | void Bind(Label* label ATTRIBUTE_UNUSED) OVERRIDE { |
| 201 | UNIMPLEMENTED(FATAL) << "Do not use Bind for ARM64"; |
| 202 | } |
| 203 | void Jump(Label* label ATTRIBUTE_UNUSED) OVERRIDE { |
| 204 | UNIMPLEMENTED(FATAL) << "Do not use Jump for ARM64"; |
| 205 | } |
| 206 | |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 207 | private: |
| 208 | static vixl::Register reg_x(int code) { |
Alexandre Rames | 37c92df | 2014-10-17 14:35:27 +0100 | [diff] [blame] | 209 | CHECK(code < kNumberOfXRegisters) << code; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 210 | if (code == SP) { |
| 211 | return vixl::sp; |
Serban Constantinescu | 1552373 | 2014-04-02 13:18:05 +0100 | [diff] [blame] | 212 | } else if (code == XZR) { |
| 213 | return vixl::xzr; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 214 | } |
| 215 | return vixl::Register::XRegFromCode(code); |
| 216 | } |
| 217 | |
| 218 | static vixl::Register reg_w(int code) { |
Alexandre Rames | 37c92df | 2014-10-17 14:35:27 +0100 | [diff] [blame] | 219 | CHECK(code < kNumberOfWRegisters) << code; |
Alexandre Rames | a304f97 | 2014-10-17 14:35:27 +0100 | [diff] [blame] | 220 | if (code == WSP) { |
| 221 | return vixl::wsp; |
| 222 | } else if (code == WZR) { |
| 223 | return vixl::wzr; |
| 224 | } |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 225 | return vixl::Register::WRegFromCode(code); |
| 226 | } |
| 227 | |
| 228 | static vixl::FPRegister reg_d(int code) { |
| 229 | return vixl::FPRegister::DRegFromCode(code); |
| 230 | } |
| 231 | |
| 232 | static vixl::FPRegister reg_s(int code) { |
| 233 | return vixl::FPRegister::SRegFromCode(code); |
| 234 | } |
| 235 | |
| 236 | // Emits Exception block. |
| 237 | void EmitExceptionPoll(Arm64Exception *exception); |
| 238 | |
| 239 | void StoreWToOffset(StoreOperandType type, WRegister source, |
Alexandre Rames | 37c92df | 2014-10-17 14:35:27 +0100 | [diff] [blame] | 240 | XRegister base, int32_t offset); |
| 241 | void StoreToOffset(XRegister source, XRegister base, int32_t offset); |
| 242 | void StoreSToOffset(SRegister source, XRegister base, int32_t offset); |
| 243 | void StoreDToOffset(DRegister source, XRegister base, int32_t offset); |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 244 | |
Alexandre Rames | 37c92df | 2014-10-17 14:35:27 +0100 | [diff] [blame] | 245 | void LoadImmediate(XRegister dest, int32_t value, vixl::Condition cond = vixl::al); |
| 246 | void Load(Arm64ManagedRegister dst, XRegister src, int32_t src_offset, size_t size); |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 247 | void LoadWFromOffset(LoadOperandType type, WRegister dest, |
Alexandre Rames | 37c92df | 2014-10-17 14:35:27 +0100 | [diff] [blame] | 248 | XRegister base, int32_t offset); |
| 249 | void LoadFromOffset(XRegister dest, XRegister base, int32_t offset); |
| 250 | void LoadSFromOffset(SRegister dest, XRegister base, int32_t offset); |
| 251 | void LoadDFromOffset(DRegister dest, XRegister base, int32_t offset); |
| 252 | void AddConstant(XRegister rd, int32_t value, vixl::Condition cond = vixl::al); |
| 253 | void AddConstant(XRegister rd, XRegister rn, int32_t value, vixl::Condition cond = vixl::al); |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 254 | |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 255 | // List of exception blocks to generate at the end of the code cache. |
Vladimir Marko | 93205e3 | 2016-04-13 11:59:46 +0100 | [diff] [blame] | 256 | ArenaVector<Arm64Exception*> exception_blocks_; |
Serban Constantinescu | 1552373 | 2014-04-02 13:18:05 +0100 | [diff] [blame] | 257 | |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 258 | public: |
| 259 | // Vixl assembler. |
| 260 | vixl::MacroAssembler* const vixl_masm_; |
| 261 | |
Serban Constantinescu | 1552373 | 2014-04-02 13:18:05 +0100 | [diff] [blame] | 262 | // Used for testing. |
| 263 | friend class Arm64ManagedRegister_VixlRegisters_Test; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 264 | }; |
| 265 | |
| 266 | class Arm64Exception { |
| 267 | private: |
Roland Levillain | 3887c46 | 2015-08-12 18:15:42 +0100 | [diff] [blame] | 268 | Arm64Exception(Arm64ManagedRegister scratch, size_t stack_adjust) |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 269 | : scratch_(scratch), stack_adjust_(stack_adjust) { |
| 270 | } |
| 271 | |
| 272 | vixl::Label* Entry() { return &exception_entry_; } |
| 273 | |
| 274 | // Register used for passing Thread::Current()->exception_ . |
| 275 | const Arm64ManagedRegister scratch_; |
| 276 | |
| 277 | // Stack adjust for ExceptionPool. |
| 278 | const size_t stack_adjust_; |
| 279 | |
| 280 | vixl::Label exception_entry_; |
| 281 | |
| 282 | friend class Arm64Assembler; |
| 283 | DISALLOW_COPY_AND_ASSIGN(Arm64Exception); |
| 284 | }; |
| 285 | |
| 286 | } // namespace arm64 |
| 287 | } // namespace art |
| 288 | |
| 289 | #endif // ART_COMPILER_UTILS_ARM64_ASSEMBLER_ARM64_H_ |