1. e1811ed ARM64: Share address computation across SIMD LDRs/STRs. by Artem Serov · 8 years ago
  2. 74234da ARM: Merge data-processing instructions and shifts/(un)signed extensions by Anton Kirilov · 8 years ago
  3. ec88abd Merge "Remove the `CanTriggerGC` side-effects on a few instructions." by Roland Levillain · 9 years ago
  4. ebc3280 Include `nodes.h` in `nodes_shared.h` to help editing tools. by Alexandre Rames · 9 years ago
  5. 91a6516 Remove the `CanTriggerGC` side-effects on a few instructions. by Alexandre Rames · 9 years ago
  6. 328429f ARM: Port instr simplification of array accesses. by Artem Serov · 9 years ago
  7. 372f10e Refactor handling of input records. by Vladimir Marko · 9 years ago
  8. fcb503c Mark concrete HIR instructions as FINAL. by Vladimir Marko · 9 years ago
  9. 7fc6350 Integrate BitwiseNegated into shared framework. by Artem Serov · 9 years ago
  10. 4a0dad6 Revert "Revert "ARM/ARM64: Extend support of instruction combining."" by Artem Udovichenko · 9 years ago
  11. 6b5afdd Revert "ARM/ARM64: Extend support of instruction combining." by Nicolas Geoffray · 9 years ago
  12. debeb98 ARM/ARM64: Extend support of instruction combining. by Ilmir Usmanov · 10 years ago