1. 715f43e MIPS32: Improve stack alignment, use sdc1/ldc1, where possible. by Chris Larsen · 8 years ago
  2. 0cab656 MIPS: Eliminate hard-coded offsets in branches by Alexey Frunze · 8 years ago
  3. 9983e30 Remove the old ARM code generator from ART's Optimizing compiler. by Roland Levillain · 8 years ago
  4. 97c4646 Introduce a Marking Register in ARM64 code generation. by Roland Levillain · 8 years ago
  5. e104d6e MIPS64: Improve method entry/exit code by Alexey Frunze · 8 years ago
  6. 467d94a Revert "Revert "ARM: VIXL32: Use VIXL backend by default."" by Nicolas Geoffray · 8 years ago
  7. 25275be Revert "ARM: VIXL32: Use VIXL backend by default." by Nicolas Geoffray · 8 years ago
  8. e631689 ARM: VIXL32: Use VIXL backend by default. by Scott Wakeling · 9 years ago
  9. 90ab673 ARM: VIXL32: Test both current and new assemblers with optimizing_cfi_test. by Scott Wakeling · 9 years ago
  10. 9989b16 Fix optimizing_cfi_test and arm64 code generation. by Nicolas Geoffray · 9 years ago
  11. 57eb0f5 MIPS32: Fill branch delay slots by Alexey Frunze · 9 years ago
  12. bde6ae1 ARM64: Ensure stricter alignment when loading and storing register pairs by Anton Kirilov · 9 years ago
  13. 73296a7 MIPS32: Improve method entry/exit code by Alexey Frunze · 9 years ago
  14. ba70200 Add MIPS floating point register mapping to DWARF. by David Srbecky · 9 years ago
  15. a0e87b0 MIPS64: Support short and long branches by Alexey Frunze · 10 years ago
  16. 10ef694 Delay emitting CFI PC adjustments until after Thumb2/Mips fixup. by Vladimir Marko · 10 years ago
  17. e401d14 Move mirror::ArtMethod to native by Mathieu Chartier · 10 years ago
  18. 9bd88b0 ARM64: Move xSELF from x18 to x19. by Serban Constantinescu · 10 years ago
  19. c6b4dd8 Implement CFI for Optimizing. by David Srbecky · 10 years ago