Merge "Count references for groups instead of instances"
diff --git a/benchmarks/Android.mk b/benchmarks/Android.mk
index 00250a5..f163463 100644
--- a/benchmarks/Android.mk
+++ b/benchmarks/Android.mk
@@ -32,7 +32,6 @@
benchmark_src_files = \
benchmark_main.cpp \
math_benchmark.cpp \
- property_benchmark.cpp \
pthread_benchmark.cpp \
semaphore_benchmark.cpp \
stdio_benchmark.cpp \
@@ -41,7 +40,8 @@
unistd_benchmark.cpp \
# Build benchmarks for the device (with bionic's .so). Run with:
-# adb shell bionic-benchmarks
+# adb shell bionic-benchmarks32
+# adb shell bionic-benchmarks64
include $(CLEAR_VARS)
LOCAL_MODULE := bionic-benchmarks
LOCAL_MODULE_STEM_32 := bionic-benchmarks32
@@ -49,10 +49,29 @@
LOCAL_MULTILIB := both
LOCAL_ADDITIONAL_DEPENDENCIES := $(LOCAL_PATH)/Android.mk
LOCAL_CFLAGS += $(benchmark_c_flags)
-LOCAL_SRC_FILES := $(benchmark_src_files)
+LOCAL_SRC_FILES := $(benchmark_src_files) property_benchmark.cpp
LOCAL_CXX_STL := libc++
include $(BUILD_EXECUTABLE)
+# We don't build a static benchmark executable because it's not usually
+# useful. If you're trying to run the current benchmarks on an older
+# release, it's (so far at least) always because you want to measure the
+# performance of the old release's libc, and a static benchmark isn't
+# going to let you do that.
+
+# Build benchmarks for the host (against glibc!). Run with:
+include $(CLEAR_VARS)
+LOCAL_MODULE := bionic-benchmarks-glibc
+LOCAL_MODULE_STEM_32 := bionic-benchmarks-glibc32
+LOCAL_MODULE_STEM_64 := bionic-benchmarks-glibc64
+LOCAL_MULTILIB := both
+LOCAL_ADDITIONAL_DEPENDENCIES := $(LOCAL_PATH)/Android.mk
+LOCAL_CFLAGS += $(benchmark_c_flags)
+LOCAL_LDFLAGS += -lrt
+LOCAL_SRC_FILES := $(benchmark_src_files)
+LOCAL_CXX_STL := libc++
+include $(BUILD_HOST_EXECUTABLE)
+
ifeq ($(HOST_OS)-$(HOST_ARCH),$(filter $(HOST_OS)-$(HOST_ARCH),linux-x86 linux-x86_64))
ifeq ($(TARGET_ARCH),x86)
LINKER = linker
@@ -63,13 +82,13 @@
endif
bionic-benchmarks-run-on-host: bionic-benchmarks $(TARGET_OUT_EXECUTABLES)/$(LINKER) $(TARGET_OUT_EXECUTABLES)/sh
- if [ ! -d /system -o ! -d /system/bin ]; then \
- echo "Attempting to create /system/bin"; \
- sudo mkdir -p -m 0777 /system/bin; \
+ if [ ! -d /system ]; then \
+ echo "Attempting to create /system"; \
+ sudo mkdir -p -m 0777 /system; \
fi
mkdir -p $(TARGET_OUT_DATA)/local/tmp
- cp $(TARGET_OUT_EXECUTABLES)/$(LINKER) /system/bin
- cp $(TARGET_OUT_EXECUTABLES)/sh /system/bin
+ ln -fs `realpath $(TARGET_OUT)/bin` /system/
+ ln -fs `realpath $(TARGET_OUT)/etc` /system/
ANDROID_DATA=$(TARGET_OUT_DATA) \
ANDROID_ROOT=$(TARGET_OUT) \
LD_LIBRARY_PATH=$(TARGET_OUT_SHARED_LIBRARIES) \
diff --git a/benchmarks/benchmark_main.cpp b/benchmarks/benchmark_main.cpp
index d60670b..815d56b 100644
--- a/benchmarks/benchmark_main.cpp
+++ b/benchmarks/benchmark_main.cpp
@@ -19,6 +19,7 @@
#include <regex.h>
#include <stdio.h>
#include <stdlib.h>
+#include <time.h>
#include <string>
#include <map>
diff --git a/benchmarks/pthread_benchmark.cpp b/benchmarks/pthread_benchmark.cpp
index 11db56d..92e5998 100644
--- a/benchmarks/pthread_benchmark.cpp
+++ b/benchmarks/pthread_benchmark.cpp
@@ -80,7 +80,7 @@
static void BM_pthread_mutex_lock_ERRORCHECK(int iters) {
StopBenchmarkTiming();
- pthread_mutex_t mutex = PTHREAD_ERRORCHECK_MUTEX_INITIALIZER;
+ pthread_mutex_t mutex = PTHREAD_ERRORCHECK_MUTEX_INITIALIZER_NP;
StartBenchmarkTiming();
for (int i = 0; i < iters; ++i) {
@@ -94,7 +94,7 @@
static void BM_pthread_mutex_lock_RECURSIVE(int iters) {
StopBenchmarkTiming();
- pthread_mutex_t mutex = PTHREAD_RECURSIVE_MUTEX_INITIALIZER;
+ pthread_mutex_t mutex = PTHREAD_RECURSIVE_MUTEX_INITIALIZER_NP;
StartBenchmarkTiming();
for (int i = 0; i < iters; ++i) {
diff --git a/benchmarks/stdio_benchmark.cpp b/benchmarks/stdio_benchmark.cpp
index e899df7..386ea04 100644
--- a/benchmarks/stdio_benchmark.cpp
+++ b/benchmarks/stdio_benchmark.cpp
@@ -25,14 +25,19 @@
Arg(1)->Arg(2)->Arg(3)->Arg(4)->Arg(8)->Arg(16)->Arg(32)->Arg(64)->Arg(512)-> \
Arg(1*KB)->Arg(4*KB)->Arg(8*KB)->Arg(16*KB)->Arg(64*KB)
-static void BM_stdio_fread(int iters, int chunk_size) {
+template <typename Fn>
+static void ReadWriteTest(int iters, int chunk_size, Fn f, bool buffered) {
StopBenchmarkTiming();
FILE* fp = fopen("/dev/zero", "rw");
char* buf = new char[chunk_size];
StartBenchmarkTiming();
+ if (!buffered) {
+ setvbuf(fp, 0, _IONBF, 0);
+ }
+
for (int i = 0; i < iters; ++i) {
- fread(buf, chunk_size, 1, fp);
+ f(buf, chunk_size, 1, fp);
}
StopBenchmarkTiming();
@@ -40,22 +45,23 @@
delete[] buf;
fclose(fp);
}
+
+static void BM_stdio_fread(int iters, int chunk_size) {
+ ReadWriteTest(iters, chunk_size, fread, true);
+}
BENCHMARK(BM_stdio_fread)->AT_COMMON_SIZES;
-
static void BM_stdio_fwrite(int iters, int chunk_size) {
- StopBenchmarkTiming();
- FILE* fp = fopen("/dev/zero", "rw");
- char* buf = new char[chunk_size];
- StartBenchmarkTiming();
-
- for (int i = 0; i < iters; ++i) {
- fwrite(buf, chunk_size, 1, fp);
- }
-
- StopBenchmarkTiming();
- SetBenchmarkBytesProcessed(int64_t(iters) * int64_t(chunk_size));
- delete[] buf;
- fclose(fp);
+ ReadWriteTest(iters, chunk_size, fwrite, true);
}
BENCHMARK(BM_stdio_fwrite)->AT_COMMON_SIZES;
+
+static void BM_stdio_fread_unbuffered(int iters, int chunk_size) {
+ ReadWriteTest(iters, chunk_size, fread, false);
+}
+BENCHMARK(BM_stdio_fread_unbuffered)->AT_COMMON_SIZES;
+
+static void BM_stdio_fwrite_unbuffered(int iters, int chunk_size) {
+ ReadWriteTest(iters, chunk_size, fwrite, false);
+}
+BENCHMARK(BM_stdio_fwrite_unbuffered)->AT_COMMON_SIZES;
diff --git a/benchmarks/time_benchmark.cpp b/benchmarks/time_benchmark.cpp
index 22f6e8e..f093ec1 100644
--- a/benchmarks/time_benchmark.cpp
+++ b/benchmarks/time_benchmark.cpp
@@ -16,7 +16,9 @@
#include "benchmark.h"
+#include <unistd.h>
#include <sys/syscall.h>
+#include <sys/time.h>
#include <time.h>
static void BM_time_clock_gettime(int iters) {
diff --git a/benchmarks/unistd_benchmark.cpp b/benchmarks/unistd_benchmark.cpp
index 7e2ac30..94be1dd 100644
--- a/benchmarks/unistd_benchmark.cpp
+++ b/benchmarks/unistd_benchmark.cpp
@@ -41,6 +41,8 @@
}
BENCHMARK(BM_unistd_getpid_syscall);
+#if defined(__BIONIC__)
+
// Stop GCC optimizing out our pure function.
/* Must not be static! */ pid_t (*gettid_fp)() = gettid;
@@ -55,6 +57,8 @@
}
BENCHMARK(BM_unistd_gettid);
+#endif
+
static void BM_unistd_gettid_syscall(int iters) {
StartBenchmarkTiming();
diff --git a/libc/Android.mk b/libc/Android.mk
index ef1fb9b..13fc297 100644
--- a/libc/Android.mk
+++ b/libc/Android.mk
@@ -98,6 +98,7 @@
bionic/chown.cpp \
bionic/clearenv.cpp \
bionic/clock.cpp \
+ bionic/clock_getcpuclockid.cpp \
bionic/clock_nanosleep.cpp \
bionic/clone.cpp \
bionic/__cmsg_nxthdr.cpp \
diff --git a/libc/arch-arm/denver/bionic/memset.S b/libc/arch-arm/denver/bionic/memset.S
index bf3d9ad..d77c244 100644
--- a/libc/arch-arm/denver/bionic/memset.S
+++ b/libc/arch-arm/denver/bionic/memset.S
@@ -37,6 +37,7 @@
* memset() returns its first argument.
*/
+ .cpu cortex-a15
.fpu neon
.syntax unified
diff --git a/libc/arch-mips/bionic/_setjmp.S b/libc/arch-mips/bionic/_setjmp.S
index d237e6d..052dacb 100644
--- a/libc/arch-mips/bionic/_setjmp.S
+++ b/libc/arch-mips/bionic/_setjmp.S
@@ -30,13 +30,11 @@
*/
#include <private/bionic_asm.h>
-#include <machine/regnum.h>
#include <machine/signal.h>
/*
* _setjmp, _longjmp (not restoring signal state)
*
- * XXX FPSET should probably be taken from SR setting. hmmm...
* GPOFF and FRAMESIZE must be the same for both _setjmp and _longjmp!
*
*/
@@ -48,103 +46,127 @@
PTR_SUBU sp, FRAMESZ
SETUP_GP64(GPOFF, _setjmp)
SAVE_GP(GPOFF)
- .set noreorder
-#if defined(__mips64)
- dli v0, 0xACEDBADE # sigcontext magic number
-#else
- li v0, 0xACEDBADE # sigcontext magic number
-#endif
- REG_S v0, SC_REGS+ZERO*REGSZ(a0)
- REG_S s0, SC_REGS+S0*REGSZ(a0)
- REG_S s1, SC_REGS+S1*REGSZ(a0)
- REG_S s2, SC_REGS+S2*REGSZ(a0)
- REG_S s3, SC_REGS+S3*REGSZ(a0)
- REG_S s4, SC_REGS+S4*REGSZ(a0)
- REG_S s5, SC_REGS+S5*REGSZ(a0)
- REG_S s6, SC_REGS+S6*REGSZ(a0)
- REG_S s7, SC_REGS+S7*REGSZ(a0)
- REG_S s8, SC_REGS+S8*REGSZ(a0)
- REG_L v0, GPOFF(sp)
- REG_S v0, SC_REGS+GP*REGSZ(a0)
- PTR_ADDU v0, sp, FRAMESZ
- REG_S v0, SC_REGS+SP*REGSZ(a0)
- REG_S ra, SC_PC(a0)
+ .set reorder
-#if !defined(SOFTFLOAT)
- li v0, 1 # be nice if we could tell
- REG_S v0, SC_FPUSED(a0) # sc_fpused = 1
- cfc1 v0, $31
- s.d $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
- s.d $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
- s.d $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
- s.d $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
- s.d $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
- s.d $f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
-#if _MIPS_FPSET == 32
- s.d $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
- s.d $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
- s.d $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
- s.d $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
- s.d $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
- s.d $f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
+#ifndef __LP64__
+ addiu a0, 7 # roundup jmpbuf addr to 8-byte boundary
+ li t0, ~7
+ and a0, t0
#endif
- REG_S v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
-#endif /* !SOFTFLOAT */
+
+ # SC_MASK is unused here
+
+ li v0, 0xACEDBADE # sigcontext magic number
+ sw v0, SC_MAGIC(a0)
+ # callee-saved long-sized regs:
+ REG_S ra, SC_REGS+0*REGSZ(a0)
+ REG_S s0, SC_REGS+1*REGSZ(a0)
+ REG_S s1, SC_REGS+2*REGSZ(a0)
+ REG_S s2, SC_REGS+3*REGSZ(a0)
+ REG_S s3, SC_REGS+4*REGSZ(a0)
+ REG_S s4, SC_REGS+5*REGSZ(a0)
+ REG_S s5, SC_REGS+6*REGSZ(a0)
+ REG_S s6, SC_REGS+7*REGSZ(a0)
+ REG_S s7, SC_REGS+8*REGSZ(a0)
+ REG_S s8, SC_REGS+9*REGSZ(a0)
+ REG_L v0, GPOFF(sp)
+ REG_S v0, SC_REGS+10*REGSZ(a0)
+ PTR_ADDU v0, sp, FRAMESZ
+ REG_S v0, SC_REGS+11*REGSZ(a0)
+
+ cfc1 v0, $31
+
+#ifdef __LP64__
+ # callee-saved fp regs on mips n64 ABI are $f24..$f31
+ s.d $f24, SC_FPREGS+0*REGSZ_FP(a0)
+ s.d $f25, SC_FPREGS+1*REGSZ_FP(a0)
+ s.d $f26, SC_FPREGS+2*REGSZ_FP(a0)
+ s.d $f27, SC_FPREGS+3*REGSZ_FP(a0)
+ s.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
+ s.d $f29, SC_FPREGS+5*REGSZ_FP(a0)
+ s.d $f30, SC_FPREGS+6*REGSZ_FP(a0)
+ s.d $f31, SC_FPREGS+7*REGSZ_FP(a0)
+#else
+ # callee-saved fp regs on mips o32 ABI are
+ # the even-numbered fp regs $f20,$f22,...$f30
+ s.d $f20, SC_FPREGS+0*REGSZ_FP(a0)
+ s.d $f22, SC_FPREGS+1*REGSZ_FP(a0)
+ s.d $f24, SC_FPREGS+2*REGSZ_FP(a0)
+ s.d $f26, SC_FPREGS+3*REGSZ_FP(a0)
+ s.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
+ s.d $f30, SC_FPREGS+5*REGSZ_FP(a0)
+#endif
+ sw v0, SC_FPSR(a0)
+ move v0, zero
RESTORE_GP64
PTR_ADDU sp, FRAMESZ
j ra
- move v0, zero
END(_setjmp)
+
LEAF(_longjmp, FRAMESZ)
PTR_SUBU sp, FRAMESZ
SETUP_GP64(GPOFF, _longjmp)
SAVE_GP(GPOFF)
- .set noreorder
- REG_L v0, SC_REGS+ZERO*REGSZ(a0)
- bne v0, 0xACEDBADE, botch # jump if error
- REG_L ra, SC_PC(a0)
- REG_L v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
- REG_L s0, SC_REGS+S0*REGSZ(a0)
- REG_L s1, SC_REGS+S1*REGSZ(a0)
- REG_L s2, SC_REGS+S2*REGSZ(a0)
- REG_L s3, SC_REGS+S3*REGSZ(a0)
- REG_L s4, SC_REGS+S4*REGSZ(a0)
- REG_L s5, SC_REGS+S5*REGSZ(a0)
- REG_L s6, SC_REGS+S6*REGSZ(a0)
- REG_L s7, SC_REGS+S7*REGSZ(a0)
- REG_L s8, SC_REGS+S8*REGSZ(a0)
- REG_L gp, SC_REGS+GP*REGSZ(a0)
- REG_L sp, SC_REGS+SP*REGSZ(a0)
-#if !defined(SOFTFLOAT)
- ctc1 v0, $31
- l.d $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
- l.d $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
- l.d $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
- l.d $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
- l.d $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
- l.d $f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
-#if _MIPS_FPSET == 32
- l.d $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
- l.d $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
- l.d $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
- l.d $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
- l.d $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
- l.d $f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
+ .set reorder
+
+#ifndef __LP64__
+ addiu a0, 7 # roundup jmpbuf addr to 8-byte boundary
+ li t0, ~7
+ and a0, t0
#endif
-#endif /* !SOFTFLOAT */
+
+ # SC_MASK is unused here
+
+ lw v0, SC_MAGIC(a0)
+ li t0, 0xACEDBADE
+ bne v0, t0, botch # jump if error
+
+ # callee-saved long-sized regs:
+ REG_L ra, SC_REGS+0*REGSZ(a0)
+ REG_L s0, SC_REGS+1*REGSZ(a0)
+ REG_L s1, SC_REGS+2*REGSZ(a0)
+ REG_L s2, SC_REGS+3*REGSZ(a0)
+ REG_L s3, SC_REGS+4*REGSZ(a0)
+ REG_L s4, SC_REGS+5*REGSZ(a0)
+ REG_L s5, SC_REGS+6*REGSZ(a0)
+ REG_L s6, SC_REGS+7*REGSZ(a0)
+ REG_L s7, SC_REGS+8*REGSZ(a0)
+ REG_L s8, SC_REGS+9*REGSZ(a0)
+ REG_L gp, SC_REGS+10*REGSZ(a0)
+ REG_L sp, SC_REGS+11*REGSZ(a0)
+
+ lw v0, SC_FPSR(a0)
+ ctc1 v0, $31
+#ifdef __LP64__
+ # callee-saved fp regs on mips n64 ABI are $f24..$f31
+ l.d $f24, SC_FPREGS+0*REGSZ_FP(a0)
+ l.d $f25, SC_FPREGS+1*REGSZ_FP(a0)
+ l.d $f26, SC_FPREGS+2*REGSZ_FP(a0)
+ l.d $f27, SC_FPREGS+3*REGSZ_FP(a0)
+ l.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
+ l.d $f29, SC_FPREGS+5*REGSZ_FP(a0)
+ l.d $f30, SC_FPREGS+6*REGSZ_FP(a0)
+ l.d $f31, SC_FPREGS+7*REGSZ_FP(a0)
+#else
+ # callee-saved fp regs on mips o32 ABI are
+ # the even-numbered fp regs $f20,$f22,...$f30
+ l.d $f20, SC_FPREGS+0*REGSZ_FP(a0)
+ l.d $f22, SC_FPREGS+1*REGSZ_FP(a0)
+ l.d $f24, SC_FPREGS+2*REGSZ_FP(a0)
+ l.d $f26, SC_FPREGS+3*REGSZ_FP(a0)
+ l.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
+ l.d $f30, SC_FPREGS+5*REGSZ_FP(a0)
+#endif
bne a1, zero, 1f
- nop
li a1, 1 # never return 0!
1:
+ move v0, a1
j ra
- move v0, a1
botch:
jal longjmperror
- nop
jal abort
- nop
RESTORE_GP64
PTR_ADDU sp, FRAMESZ
END(_longjmp)
diff --git a/libc/arch-mips/bionic/setjmp.S b/libc/arch-mips/bionic/setjmp.S
index 31786be..a1d4695 100644
--- a/libc/arch-mips/bionic/setjmp.S
+++ b/libc/arch-mips/bionic/setjmp.S
@@ -30,12 +30,12 @@
*/
#include <private/bionic_asm.h>
-#include <machine/regnum.h>
#include <machine/signal.h>
/*
- * setjmp, longjmp implementation for libc. this code depends
- * on the layout of the struct sigcontext in machine/signal.h.
+ * _setjmp, _longjmp (restoring signal state)
+ *
+ * GPOFF and FRAMESIZE must be the same for both _setjmp and _longjmp!
*
*/
@@ -51,124 +51,139 @@
SETUP_GP64(GPOFF, setjmp)
SAVE_GP(GPOFF)
.set reorder
+
+#ifndef __LP64__
+ addiu a0, 7 # roundup jmpbuf addr to 8-byte boundary
+ li t0, ~7
+ and a0, t0
+#endif
+
REG_S ra, RAOFF(sp) # save state
REG_S a0, A0OFF(sp)
-
move a0, zero # get current signal mask
jal sigblock
-
- REG_L v1, A0OFF(sp) # v1 = jmpbuf
- REG_S v0, SC_MASK(v1) # save sc_mask = sigblock(0)
-
- REG_L a0, A0OFF(sp) # restore jmpbuf
+ REG_L a0, A0OFF(sp)
REG_L ra, RAOFF(sp)
- REG_S ra, SC_PC(a0) # sc_pc = return address
-#if defined(__mips64)
- dli v0, 0xACEDBADE # sigcontext magic number
-#else
- li v0, 0xACEDBADE # sigcontext magic number
-#endif
- REG_S v0, SC_REGS+ZERO*REGSZ(a0)
- REG_S s0, SC_REGS+S0*REGSZ(a0)
- REG_S s1, SC_REGS+S1*REGSZ(a0)
- REG_S s2, SC_REGS+S2*REGSZ(a0)
- REG_S s3, SC_REGS+S3*REGSZ(a0)
- REG_S s4, SC_REGS+S4*REGSZ(a0)
- REG_S s5, SC_REGS+S5*REGSZ(a0)
- REG_S s6, SC_REGS+S6*REGSZ(a0)
- REG_S s7, SC_REGS+S7*REGSZ(a0)
- REG_S s8, SC_REGS+S8*REGSZ(a0)
- REG_L v0, GPOFF(sp)
- REG_S v0, SC_REGS+GP*REGSZ(a0)
- PTR_ADDU v0, sp, FRAMESZ
- REG_S v0, SC_REGS+SP*REGSZ(a0)
-#if !defined(SOFTFLOAT)
- li v0, 1 # be nice if we could tell
- REG_S v0, SC_FPUSED(a0) # sc_fpused = 1
+ REG_S v0, SC_MASK(a0) # save sc_mask = sigblock(0)
+
+ li v0, 0xACEDBADE # sigcontext magic number
+ sw v0, SC_MAGIC(a0)
+ # callee-saved long-sized regs:
+ REG_S ra, SC_REGS+0*REGSZ(a0)
+ REG_S s0, SC_REGS+1*REGSZ(a0)
+ REG_S s1, SC_REGS+2*REGSZ(a0)
+ REG_S s2, SC_REGS+3*REGSZ(a0)
+ REG_S s3, SC_REGS+4*REGSZ(a0)
+ REG_S s4, SC_REGS+5*REGSZ(a0)
+ REG_S s5, SC_REGS+6*REGSZ(a0)
+ REG_S s6, SC_REGS+7*REGSZ(a0)
+ REG_S s7, SC_REGS+8*REGSZ(a0)
+ REG_S s8, SC_REGS+9*REGSZ(a0)
+ REG_L v0, GPOFF(sp)
+ REG_S v0, SC_REGS+10*REGSZ(a0)
+ PTR_ADDU v0, sp, FRAMESZ
+ REG_S v0, SC_REGS+11*REGSZ(a0)
+
cfc1 v0, $31
- s.d $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
- s.d $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
- s.d $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
- s.d $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
- s.d $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
- s.d $f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
-#if _MIPS_FPSET == 32
- s.d $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
- s.d $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
- s.d $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
- s.d $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
- s.d $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
- s.d $f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
+
+#ifdef __LP64__
+ # callee-saved fp regs on mips n64 ABI are $f24..$f31
+ s.d $f24, SC_FPREGS+0*REGSZ_FP(a0)
+ s.d $f25, SC_FPREGS+1*REGSZ_FP(a0)
+ s.d $f26, SC_FPREGS+2*REGSZ_FP(a0)
+ s.d $f27, SC_FPREGS+3*REGSZ_FP(a0)
+ s.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
+ s.d $f29, SC_FPREGS+5*REGSZ_FP(a0)
+ s.d $f30, SC_FPREGS+6*REGSZ_FP(a0)
+ s.d $f31, SC_FPREGS+7*REGSZ_FP(a0)
+#else
+ # callee-saved fp regs on mips o32 ABI are
+ # the even-numbered fp regs $f20,$f22,...$f30
+ s.d $f20, SC_FPREGS+0*REGSZ_FP(a0)
+ s.d $f22, SC_FPREGS+1*REGSZ_FP(a0)
+ s.d $f24, SC_FPREGS+2*REGSZ_FP(a0)
+ s.d $f26, SC_FPREGS+3*REGSZ_FP(a0)
+ s.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
+ s.d $f30, SC_FPREGS+5*REGSZ_FP(a0)
#endif
- REG_S v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
-#endif /* !SOFTFLOAT */
+ sw v0, SC_FPSR(a0)
move v0, zero
RESTORE_GP64
PTR_ADDU sp, FRAMESZ
j ra
+END(setjmp)
+
+
+NON_LEAF(longjmp, FRAMESZ, ra)
+ .mask 0x80000000, RAOFF
+ PTR_SUBU sp, FRAMESZ
+ SETUP_GP64(GPOFF, longjmp)
+ SAVE_GP(GPOFF)
+ .set reorder
+
+#ifndef __LP64__
+ addiu a0, 7 # roundup jmpbuf addr to 8-byte boundary
+ li t0, ~7
+ and a0, t0
+#endif
+
+ REG_S a1, A1OFF(sp)
+ REG_S a0, A0OFF(sp)
+ lw a0, SC_MASK(a0)
+ jal sigsetmask
+ REG_L a0, A0OFF(sp)
+ REG_L a1, A1OFF(sp)
+
+ lw v0, SC_MAGIC(a0)
+ li t0, 0xACEDBADE
+ bne v0, t0, botch # jump if error
+
+ # callee-saved long-sized regs:
+ REG_L ra, SC_REGS+0*REGSZ(a0)
+ REG_L s0, SC_REGS+1*REGSZ(a0)
+ REG_L s1, SC_REGS+2*REGSZ(a0)
+ REG_L s2, SC_REGS+3*REGSZ(a0)
+ REG_L s3, SC_REGS+4*REGSZ(a0)
+ REG_L s4, SC_REGS+5*REGSZ(a0)
+ REG_L s5, SC_REGS+6*REGSZ(a0)
+ REG_L s6, SC_REGS+7*REGSZ(a0)
+ REG_L s7, SC_REGS+8*REGSZ(a0)
+ REG_L s8, SC_REGS+9*REGSZ(a0)
+ REG_L gp, SC_REGS+10*REGSZ(a0)
+ REG_L sp, SC_REGS+11*REGSZ(a0)
+
+ lw v0, SC_FPSR(a0)
+ ctc1 v0, $31
+#ifdef __LP64__
+ # callee-saved fp regs on mips n64 ABI are $f24..$f31
+ l.d $f24, SC_FPREGS+0*REGSZ_FP(a0)
+ l.d $f25, SC_FPREGS+1*REGSZ_FP(a0)
+ l.d $f26, SC_FPREGS+2*REGSZ_FP(a0)
+ l.d $f27, SC_FPREGS+3*REGSZ_FP(a0)
+ l.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
+ l.d $f29, SC_FPREGS+5*REGSZ_FP(a0)
+ l.d $f30, SC_FPREGS+6*REGSZ_FP(a0)
+ l.d $f31, SC_FPREGS+7*REGSZ_FP(a0)
+#else
+ # callee-saved fp regs on mips o32 ABI are
+ # the even-numbered fp regs $f20,$f22,...$f30
+ l.d $f20, SC_FPREGS+0*REGSZ_FP(a0)
+ l.d $f22, SC_FPREGS+1*REGSZ_FP(a0)
+ l.d $f24, SC_FPREGS+2*REGSZ_FP(a0)
+ l.d $f26, SC_FPREGS+3*REGSZ_FP(a0)
+ l.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
+ l.d $f30, SC_FPREGS+5*REGSZ_FP(a0)
+#endif
+ bne a1, zero, 1f
+ li a1, 1 # never return 0!
+1:
+ move v0, a1
+ j ra
botch:
jal longjmperror
jal abort
RESTORE_GP64
PTR_ADDU sp, FRAMESZ
-END(setjmp)
-
-
-LEAF(longjmp, FRAMESZ)
- PTR_SUBU sp, FRAMESZ
- SETUP_GP64(GPOFF, longjmp)
- SAVE_GP(GPOFF)
- .set reorder
- sw a1, A1OFF(sp)
- sw a0, A0OFF(sp)
-
- lw a0, SC_MASK(a0)
- jal sigsetmask
-
- lw a0, A0OFF(sp)
- lw a1, A1OFF(sp)
-
- .set noreorder
- REG_L v0, SC_REGS+ZERO*REGSZ(a0)
- bne v0, 0xACEDBADE, botch # jump if error
- REG_L ra, SC_PC(a0)
- REG_L s0, SC_REGS+S0*REGSZ(a0)
- REG_L s1, SC_REGS+S1*REGSZ(a0)
- REG_L s2, SC_REGS+S2*REGSZ(a0)
- REG_L s3, SC_REGS+S3*REGSZ(a0)
- REG_L s4, SC_REGS+S4*REGSZ(a0)
- REG_L s5, SC_REGS+S5*REGSZ(a0)
- REG_L s6, SC_REGS+S6*REGSZ(a0)
- REG_L s7, SC_REGS+S7*REGSZ(a0)
- REG_L s8, SC_REGS+S8*REGSZ(a0)
- REG_L gp, SC_REGS+GP*REGSZ(a0)
- REG_L sp, SC_REGS+SP*REGSZ(a0)
-
-#if !defined(SOFTFLOAT)
- REG_L v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
- ctc1 v0, $31
- l.d $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
- l.d $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
- l.d $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
- l.d $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
- l.d $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
- l.d $f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
-#if _MIPS_FPSET == 32
- l.d $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
- l.d $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
- l.d $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
- l.d $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
- l.d $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
- l.d $f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
-#endif
-#endif /* !SOFTFLOAT */
- bne a1, zero, 1f
- nop
- li a1, 1 # never return 0!
-1:
- j ra
- move v0, a1
-
END(longjmp)
diff --git a/libc/arch-mips/bionic/sigsetjmp.S b/libc/arch-mips/bionic/sigsetjmp.S
index 9d2e5ea..3ef0a6f 100644
--- a/libc/arch-mips/bionic/sigsetjmp.S
+++ b/libc/arch-mips/bionic/sigsetjmp.S
@@ -32,7 +32,6 @@
*/
#include <private/bionic_asm.h>
-#include <machine/regnum.h>
#include <machine/setjmp.h>
/*
@@ -46,7 +45,7 @@
PTR_SUBU sp, FRAMESZ
SETUP_GP64(GPOFF, sigsetjmp)
.set reorder
- REG_S a1, (_JBLEN*REGSZ)(a0) # save "savemask"
+ sw a1, _JBLEN*REGSZ(a0) # save "savemask"
bne a1, 0x0, 1f # do saving of signal mask?
LA t9, _setjmp
RESTORE_GP64
@@ -63,7 +62,7 @@
PTR_SUBU sp, FRAMESZ
SETUP_GP64(GPOFF, siglongjmp)
.set reorder
- REG_L t0, (_JBLEN*REGSZ)(a0) # get "savemask"
+ lw t0, _JBLEN*REGSZ(a0) # get "savemask"
bne t0, 0x0, 1f # restore signal mask?
LA t9, _longjmp
RESTORE_GP64
diff --git a/libc/arch-mips/include/machine/regdef.h b/libc/arch-mips/include/machine/regdef.h
index ae18392..3a7cd68 100644
--- a/libc/arch-mips/include/machine/regdef.h
+++ b/libc/arch-mips/include/machine/regdef.h
@@ -37,6 +37,13 @@
#ifndef _MIPS_REGDEF_H_
#define _MIPS_REGDEF_H_
+#if (_MIPS_SIM == _ABI64) && !defined(__mips_n64)
+#define __mips_n64 1
+#endif
+#if (_MIPS_SIM == _ABIN32) && !defined(__mips_n32)
+#define __mips_n32 1
+#endif
+
#define zero $0 /* always zero */
#define AT $at /* assembler temp */
#define v0 $2 /* return value */
diff --git a/libc/arch-mips/include/machine/regnum.h b/libc/arch-mips/include/machine/regnum.h
deleted file mode 100644
index bfe1280..0000000
--- a/libc/arch-mips/include/machine/regnum.h
+++ /dev/null
@@ -1,119 +0,0 @@
-/* $OpenBSD: regnum.h,v 1.3 2004/08/10 20:28:13 deraadt Exp $ */
-
-/*
- * Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#ifndef _MIPS64_REGNUM_H_
-#define _MIPS64_REGNUM_H_
-
-/*
- * Location of the saved registers relative to ZERO.
- * Usage is p->p_regs[XX].
- */
-#define ZERO 0
-#define AST 1
-#define V0 2
-#define V1 3
-#define A0 4
-#define A1 5
-#define A2 6
-#define A3 7
-#define T0 8
-#define T1 9
-#define T2 10
-#define T3 11
-#define T4 12
-#define T5 13
-#define T6 14
-#define T7 15
-#define S0 16
-#define S1 17
-#define S2 18
-#define S3 19
-#define S4 20
-#define S5 21
-#define S6 22
-#define S7 23
-#define T8 24
-#define T9 25
-#define K0 26
-#define K1 27
-#define GP 28
-#define SP 29
-#define S8 30
-#define RA 31
-#define SR 32
-#define PS SR /* alias for SR */
-#define MULLO 33
-#define MULHI 34
-#define BADVADDR 35
-#define CAUSE 36
-#define PC 37
-#define IC 38
-#define CPL 39
-
-#define NUMSAVEREGS 40 /* Number of registers saved in trap */
-
-#define FPBASE NUMSAVEREGS
-#define F0 (FPBASE+0)
-#define F1 (FPBASE+1)
-#define F2 (FPBASE+2)
-#define F3 (FPBASE+3)
-#define F4 (FPBASE+4)
-#define F5 (FPBASE+5)
-#define F6 (FPBASE+6)
-#define F7 (FPBASE+7)
-#define F8 (FPBASE+8)
-#define F9 (FPBASE+9)
-#define F10 (FPBASE+10)
-#define F11 (FPBASE+11)
-#define F12 (FPBASE+12)
-#define F13 (FPBASE+13)
-#define F14 (FPBASE+14)
-#define F15 (FPBASE+15)
-#define F16 (FPBASE+16)
-#define F17 (FPBASE+17)
-#define F18 (FPBASE+18)
-#define F19 (FPBASE+19)
-#define F20 (FPBASE+20)
-#define F21 (FPBASE+21)
-#define F22 (FPBASE+22)
-#define F23 (FPBASE+23)
-#define F24 (FPBASE+24)
-#define F25 (FPBASE+25)
-#define F26 (FPBASE+26)
-#define F27 (FPBASE+27)
-#define F28 (FPBASE+28)
-#define F29 (FPBASE+29)
-#define F30 (FPBASE+30)
-#define F31 (FPBASE+31)
-#define FSR (FPBASE+32)
-
-#define NUMFPREGS 33
-
-#define NREGS (NUMSAVEREGS + NUMFPREGS)
-
-#endif /* !_MIPS64_REGNUM_H_ */
diff --git a/libc/arch-mips/include/machine/setjmp.h b/libc/arch-mips/include/machine/setjmp.h
index 55ba7be..a9707dc 100644
--- a/libc/arch-mips/include/machine/setjmp.h
+++ b/libc/arch-mips/include/machine/setjmp.h
@@ -5,6 +5,10 @@
#ifndef _MIPS_SETJMP_H_
#define _MIPS_SETJMP_H_
-#define _JBLEN 157 /* size, in longs, of a jmp_buf */
+#ifdef __LP64__
+#define _JBLEN 22 /* size, in 8-byte longs, of a mips64 jmp_buf */
+#else
+#define _JBLEN 29 /* size, in 4-byte longs, of a mips32 jmp_buf */
+#endif
#endif /* !_MIPS_SETJMP_H_ */
diff --git a/libc/arch-mips/include/machine/signal.h b/libc/arch-mips/include/machine/signal.h
index b31715c..b9c1367 100644
--- a/libc/arch-mips/include/machine/signal.h
+++ b/libc/arch-mips/include/machine/signal.h
@@ -37,15 +37,42 @@
#ifndef _MIPS_SIGNAL_H_
#define _MIPS_SIGNAL_H_
-#define SC_REGMASK (0*REGSZ)
-#define SC_STATUS (1*REGSZ)
-#define SC_PC (2*REGSZ)
-#define SC_REGS (SC_PC+8)
-#define SC_FPREGS (SC_REGS+32*8)
-#define SC_ACX (SC_FPREGS+32*REGSZ_FP)
-#define SC_USED_MATH (SC_ACX+3*REGSZ)
-/* OpenBSD compatibility */
-#define SC_MASK SC_REGMASK
-#define SC_FPUSED SC_USED_MATH
+/* On Mips32, jmpbuf begins with optional 4-byte filler so that
+ * all saved FP regs are aligned on 8-byte boundary, despite this whole
+ * struct being mis-declared to users as an array of (4-byte) longs.
+ * All the following offsets are then from the rounded-up base addr
+ */
+
+/* Fields of same size on all MIPS abis: */
+#define SC_MAGIC (0*4) /* 4 bytes, identify jmpbuf */
+#define SC_MASK (1*4) /* 4 bytes, saved signal mask */
+#define SC_FPSR (2*4) /* 4 bytes, floating point control/status reg */
+/* filler2 (3*4) 4 bytes, pad to 8-byte boundary */
+
+/* Registers that are 4-byte on mips32 o32, and 8-byte on mips64 n64 abi */
+#define SC_REGS_SAVED 12 /* ra,gp,sp,s0-s8 */
+#define SC_REGS (4*4) /* SC_REGS_SAVED*REGSZ bytes */
+
+/* Floating pt registers are 8-bytes on all abis,
+ * but the number of saved fp regs varies for o32/n32 versus n64 abis:
+ */
+
+#ifdef __LP64__
+#define SC_FPREGS_SAVED 8 /* all fp regs f24,f25,f26,f27,f28,f29,f30,f31 */
+#else
+#define SC_FPREGS_SAVED 6 /* even fp regs f20,f22,f24,f26,f28,f30 */
+#endif
+
+#define SC_FPREGS (SC_REGS + SC_REGS_SAVED*REGSZ) /* SC_FPREGS_SAVED*REGSZ_FP bytes */
+
+#define SC_BYTES (SC_FPREGS + SC_FPREGS_SAVED*REGSZ_FP)
+#define SC_LONGS (SC_BYTES/REGSZ)
+
+#ifdef __LP64__
+/* SC_LONGS is 22, so _JBLEN should be 22 or larger */
+#else
+/* SC_LONGS is 28, but must also allocate dynamic-roundup filler.
+ so _JBLEN should be 29 or larger */
+#endif
#endif /* !_MIPS_SIGNAL_H_ */
diff --git a/libc/arch-mips64/bionic/_setjmp.S b/libc/arch-mips64/bionic/_setjmp.S
index d237e6d..052dacb 100644
--- a/libc/arch-mips64/bionic/_setjmp.S
+++ b/libc/arch-mips64/bionic/_setjmp.S
@@ -30,13 +30,11 @@
*/
#include <private/bionic_asm.h>
-#include <machine/regnum.h>
#include <machine/signal.h>
/*
* _setjmp, _longjmp (not restoring signal state)
*
- * XXX FPSET should probably be taken from SR setting. hmmm...
* GPOFF and FRAMESIZE must be the same for both _setjmp and _longjmp!
*
*/
@@ -48,103 +46,127 @@
PTR_SUBU sp, FRAMESZ
SETUP_GP64(GPOFF, _setjmp)
SAVE_GP(GPOFF)
- .set noreorder
-#if defined(__mips64)
- dli v0, 0xACEDBADE # sigcontext magic number
-#else
- li v0, 0xACEDBADE # sigcontext magic number
-#endif
- REG_S v0, SC_REGS+ZERO*REGSZ(a0)
- REG_S s0, SC_REGS+S0*REGSZ(a0)
- REG_S s1, SC_REGS+S1*REGSZ(a0)
- REG_S s2, SC_REGS+S2*REGSZ(a0)
- REG_S s3, SC_REGS+S3*REGSZ(a0)
- REG_S s4, SC_REGS+S4*REGSZ(a0)
- REG_S s5, SC_REGS+S5*REGSZ(a0)
- REG_S s6, SC_REGS+S6*REGSZ(a0)
- REG_S s7, SC_REGS+S7*REGSZ(a0)
- REG_S s8, SC_REGS+S8*REGSZ(a0)
- REG_L v0, GPOFF(sp)
- REG_S v0, SC_REGS+GP*REGSZ(a0)
- PTR_ADDU v0, sp, FRAMESZ
- REG_S v0, SC_REGS+SP*REGSZ(a0)
- REG_S ra, SC_PC(a0)
+ .set reorder
-#if !defined(SOFTFLOAT)
- li v0, 1 # be nice if we could tell
- REG_S v0, SC_FPUSED(a0) # sc_fpused = 1
- cfc1 v0, $31
- s.d $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
- s.d $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
- s.d $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
- s.d $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
- s.d $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
- s.d $f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
-#if _MIPS_FPSET == 32
- s.d $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
- s.d $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
- s.d $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
- s.d $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
- s.d $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
- s.d $f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
+#ifndef __LP64__
+ addiu a0, 7 # roundup jmpbuf addr to 8-byte boundary
+ li t0, ~7
+ and a0, t0
#endif
- REG_S v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
-#endif /* !SOFTFLOAT */
+
+ # SC_MASK is unused here
+
+ li v0, 0xACEDBADE # sigcontext magic number
+ sw v0, SC_MAGIC(a0)
+ # callee-saved long-sized regs:
+ REG_S ra, SC_REGS+0*REGSZ(a0)
+ REG_S s0, SC_REGS+1*REGSZ(a0)
+ REG_S s1, SC_REGS+2*REGSZ(a0)
+ REG_S s2, SC_REGS+3*REGSZ(a0)
+ REG_S s3, SC_REGS+4*REGSZ(a0)
+ REG_S s4, SC_REGS+5*REGSZ(a0)
+ REG_S s5, SC_REGS+6*REGSZ(a0)
+ REG_S s6, SC_REGS+7*REGSZ(a0)
+ REG_S s7, SC_REGS+8*REGSZ(a0)
+ REG_S s8, SC_REGS+9*REGSZ(a0)
+ REG_L v0, GPOFF(sp)
+ REG_S v0, SC_REGS+10*REGSZ(a0)
+ PTR_ADDU v0, sp, FRAMESZ
+ REG_S v0, SC_REGS+11*REGSZ(a0)
+
+ cfc1 v0, $31
+
+#ifdef __LP64__
+ # callee-saved fp regs on mips n64 ABI are $f24..$f31
+ s.d $f24, SC_FPREGS+0*REGSZ_FP(a0)
+ s.d $f25, SC_FPREGS+1*REGSZ_FP(a0)
+ s.d $f26, SC_FPREGS+2*REGSZ_FP(a0)
+ s.d $f27, SC_FPREGS+3*REGSZ_FP(a0)
+ s.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
+ s.d $f29, SC_FPREGS+5*REGSZ_FP(a0)
+ s.d $f30, SC_FPREGS+6*REGSZ_FP(a0)
+ s.d $f31, SC_FPREGS+7*REGSZ_FP(a0)
+#else
+ # callee-saved fp regs on mips o32 ABI are
+ # the even-numbered fp regs $f20,$f22,...$f30
+ s.d $f20, SC_FPREGS+0*REGSZ_FP(a0)
+ s.d $f22, SC_FPREGS+1*REGSZ_FP(a0)
+ s.d $f24, SC_FPREGS+2*REGSZ_FP(a0)
+ s.d $f26, SC_FPREGS+3*REGSZ_FP(a0)
+ s.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
+ s.d $f30, SC_FPREGS+5*REGSZ_FP(a0)
+#endif
+ sw v0, SC_FPSR(a0)
+ move v0, zero
RESTORE_GP64
PTR_ADDU sp, FRAMESZ
j ra
- move v0, zero
END(_setjmp)
+
LEAF(_longjmp, FRAMESZ)
PTR_SUBU sp, FRAMESZ
SETUP_GP64(GPOFF, _longjmp)
SAVE_GP(GPOFF)
- .set noreorder
- REG_L v0, SC_REGS+ZERO*REGSZ(a0)
- bne v0, 0xACEDBADE, botch # jump if error
- REG_L ra, SC_PC(a0)
- REG_L v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
- REG_L s0, SC_REGS+S0*REGSZ(a0)
- REG_L s1, SC_REGS+S1*REGSZ(a0)
- REG_L s2, SC_REGS+S2*REGSZ(a0)
- REG_L s3, SC_REGS+S3*REGSZ(a0)
- REG_L s4, SC_REGS+S4*REGSZ(a0)
- REG_L s5, SC_REGS+S5*REGSZ(a0)
- REG_L s6, SC_REGS+S6*REGSZ(a0)
- REG_L s7, SC_REGS+S7*REGSZ(a0)
- REG_L s8, SC_REGS+S8*REGSZ(a0)
- REG_L gp, SC_REGS+GP*REGSZ(a0)
- REG_L sp, SC_REGS+SP*REGSZ(a0)
-#if !defined(SOFTFLOAT)
- ctc1 v0, $31
- l.d $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
- l.d $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
- l.d $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
- l.d $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
- l.d $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
- l.d $f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
-#if _MIPS_FPSET == 32
- l.d $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
- l.d $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
- l.d $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
- l.d $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
- l.d $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
- l.d $f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
+ .set reorder
+
+#ifndef __LP64__
+ addiu a0, 7 # roundup jmpbuf addr to 8-byte boundary
+ li t0, ~7
+ and a0, t0
#endif
-#endif /* !SOFTFLOAT */
+
+ # SC_MASK is unused here
+
+ lw v0, SC_MAGIC(a0)
+ li t0, 0xACEDBADE
+ bne v0, t0, botch # jump if error
+
+ # callee-saved long-sized regs:
+ REG_L ra, SC_REGS+0*REGSZ(a0)
+ REG_L s0, SC_REGS+1*REGSZ(a0)
+ REG_L s1, SC_REGS+2*REGSZ(a0)
+ REG_L s2, SC_REGS+3*REGSZ(a0)
+ REG_L s3, SC_REGS+4*REGSZ(a0)
+ REG_L s4, SC_REGS+5*REGSZ(a0)
+ REG_L s5, SC_REGS+6*REGSZ(a0)
+ REG_L s6, SC_REGS+7*REGSZ(a0)
+ REG_L s7, SC_REGS+8*REGSZ(a0)
+ REG_L s8, SC_REGS+9*REGSZ(a0)
+ REG_L gp, SC_REGS+10*REGSZ(a0)
+ REG_L sp, SC_REGS+11*REGSZ(a0)
+
+ lw v0, SC_FPSR(a0)
+ ctc1 v0, $31
+#ifdef __LP64__
+ # callee-saved fp regs on mips n64 ABI are $f24..$f31
+ l.d $f24, SC_FPREGS+0*REGSZ_FP(a0)
+ l.d $f25, SC_FPREGS+1*REGSZ_FP(a0)
+ l.d $f26, SC_FPREGS+2*REGSZ_FP(a0)
+ l.d $f27, SC_FPREGS+3*REGSZ_FP(a0)
+ l.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
+ l.d $f29, SC_FPREGS+5*REGSZ_FP(a0)
+ l.d $f30, SC_FPREGS+6*REGSZ_FP(a0)
+ l.d $f31, SC_FPREGS+7*REGSZ_FP(a0)
+#else
+ # callee-saved fp regs on mips o32 ABI are
+ # the even-numbered fp regs $f20,$f22,...$f30
+ l.d $f20, SC_FPREGS+0*REGSZ_FP(a0)
+ l.d $f22, SC_FPREGS+1*REGSZ_FP(a0)
+ l.d $f24, SC_FPREGS+2*REGSZ_FP(a0)
+ l.d $f26, SC_FPREGS+3*REGSZ_FP(a0)
+ l.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
+ l.d $f30, SC_FPREGS+5*REGSZ_FP(a0)
+#endif
bne a1, zero, 1f
- nop
li a1, 1 # never return 0!
1:
+ move v0, a1
j ra
- move v0, a1
botch:
jal longjmperror
- nop
jal abort
- nop
RESTORE_GP64
PTR_ADDU sp, FRAMESZ
END(_longjmp)
diff --git a/libc/arch-mips64/bionic/setjmp.S b/libc/arch-mips64/bionic/setjmp.S
index 31786be..a1d4695 100644
--- a/libc/arch-mips64/bionic/setjmp.S
+++ b/libc/arch-mips64/bionic/setjmp.S
@@ -30,12 +30,12 @@
*/
#include <private/bionic_asm.h>
-#include <machine/regnum.h>
#include <machine/signal.h>
/*
- * setjmp, longjmp implementation for libc. this code depends
- * on the layout of the struct sigcontext in machine/signal.h.
+ * _setjmp, _longjmp (restoring signal state)
+ *
+ * GPOFF and FRAMESIZE must be the same for both _setjmp and _longjmp!
*
*/
@@ -51,124 +51,139 @@
SETUP_GP64(GPOFF, setjmp)
SAVE_GP(GPOFF)
.set reorder
+
+#ifndef __LP64__
+ addiu a0, 7 # roundup jmpbuf addr to 8-byte boundary
+ li t0, ~7
+ and a0, t0
+#endif
+
REG_S ra, RAOFF(sp) # save state
REG_S a0, A0OFF(sp)
-
move a0, zero # get current signal mask
jal sigblock
-
- REG_L v1, A0OFF(sp) # v1 = jmpbuf
- REG_S v0, SC_MASK(v1) # save sc_mask = sigblock(0)
-
- REG_L a0, A0OFF(sp) # restore jmpbuf
+ REG_L a0, A0OFF(sp)
REG_L ra, RAOFF(sp)
- REG_S ra, SC_PC(a0) # sc_pc = return address
-#if defined(__mips64)
- dli v0, 0xACEDBADE # sigcontext magic number
-#else
- li v0, 0xACEDBADE # sigcontext magic number
-#endif
- REG_S v0, SC_REGS+ZERO*REGSZ(a0)
- REG_S s0, SC_REGS+S0*REGSZ(a0)
- REG_S s1, SC_REGS+S1*REGSZ(a0)
- REG_S s2, SC_REGS+S2*REGSZ(a0)
- REG_S s3, SC_REGS+S3*REGSZ(a0)
- REG_S s4, SC_REGS+S4*REGSZ(a0)
- REG_S s5, SC_REGS+S5*REGSZ(a0)
- REG_S s6, SC_REGS+S6*REGSZ(a0)
- REG_S s7, SC_REGS+S7*REGSZ(a0)
- REG_S s8, SC_REGS+S8*REGSZ(a0)
- REG_L v0, GPOFF(sp)
- REG_S v0, SC_REGS+GP*REGSZ(a0)
- PTR_ADDU v0, sp, FRAMESZ
- REG_S v0, SC_REGS+SP*REGSZ(a0)
-#if !defined(SOFTFLOAT)
- li v0, 1 # be nice if we could tell
- REG_S v0, SC_FPUSED(a0) # sc_fpused = 1
+ REG_S v0, SC_MASK(a0) # save sc_mask = sigblock(0)
+
+ li v0, 0xACEDBADE # sigcontext magic number
+ sw v0, SC_MAGIC(a0)
+ # callee-saved long-sized regs:
+ REG_S ra, SC_REGS+0*REGSZ(a0)
+ REG_S s0, SC_REGS+1*REGSZ(a0)
+ REG_S s1, SC_REGS+2*REGSZ(a0)
+ REG_S s2, SC_REGS+3*REGSZ(a0)
+ REG_S s3, SC_REGS+4*REGSZ(a0)
+ REG_S s4, SC_REGS+5*REGSZ(a0)
+ REG_S s5, SC_REGS+6*REGSZ(a0)
+ REG_S s6, SC_REGS+7*REGSZ(a0)
+ REG_S s7, SC_REGS+8*REGSZ(a0)
+ REG_S s8, SC_REGS+9*REGSZ(a0)
+ REG_L v0, GPOFF(sp)
+ REG_S v0, SC_REGS+10*REGSZ(a0)
+ PTR_ADDU v0, sp, FRAMESZ
+ REG_S v0, SC_REGS+11*REGSZ(a0)
+
cfc1 v0, $31
- s.d $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
- s.d $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
- s.d $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
- s.d $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
- s.d $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
- s.d $f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
-#if _MIPS_FPSET == 32
- s.d $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
- s.d $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
- s.d $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
- s.d $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
- s.d $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
- s.d $f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
+
+#ifdef __LP64__
+ # callee-saved fp regs on mips n64 ABI are $f24..$f31
+ s.d $f24, SC_FPREGS+0*REGSZ_FP(a0)
+ s.d $f25, SC_FPREGS+1*REGSZ_FP(a0)
+ s.d $f26, SC_FPREGS+2*REGSZ_FP(a0)
+ s.d $f27, SC_FPREGS+3*REGSZ_FP(a0)
+ s.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
+ s.d $f29, SC_FPREGS+5*REGSZ_FP(a0)
+ s.d $f30, SC_FPREGS+6*REGSZ_FP(a0)
+ s.d $f31, SC_FPREGS+7*REGSZ_FP(a0)
+#else
+ # callee-saved fp regs on mips o32 ABI are
+ # the even-numbered fp regs $f20,$f22,...$f30
+ s.d $f20, SC_FPREGS+0*REGSZ_FP(a0)
+ s.d $f22, SC_FPREGS+1*REGSZ_FP(a0)
+ s.d $f24, SC_FPREGS+2*REGSZ_FP(a0)
+ s.d $f26, SC_FPREGS+3*REGSZ_FP(a0)
+ s.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
+ s.d $f30, SC_FPREGS+5*REGSZ_FP(a0)
#endif
- REG_S v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
-#endif /* !SOFTFLOAT */
+ sw v0, SC_FPSR(a0)
move v0, zero
RESTORE_GP64
PTR_ADDU sp, FRAMESZ
j ra
+END(setjmp)
+
+
+NON_LEAF(longjmp, FRAMESZ, ra)
+ .mask 0x80000000, RAOFF
+ PTR_SUBU sp, FRAMESZ
+ SETUP_GP64(GPOFF, longjmp)
+ SAVE_GP(GPOFF)
+ .set reorder
+
+#ifndef __LP64__
+ addiu a0, 7 # roundup jmpbuf addr to 8-byte boundary
+ li t0, ~7
+ and a0, t0
+#endif
+
+ REG_S a1, A1OFF(sp)
+ REG_S a0, A0OFF(sp)
+ lw a0, SC_MASK(a0)
+ jal sigsetmask
+ REG_L a0, A0OFF(sp)
+ REG_L a1, A1OFF(sp)
+
+ lw v0, SC_MAGIC(a0)
+ li t0, 0xACEDBADE
+ bne v0, t0, botch # jump if error
+
+ # callee-saved long-sized regs:
+ REG_L ra, SC_REGS+0*REGSZ(a0)
+ REG_L s0, SC_REGS+1*REGSZ(a0)
+ REG_L s1, SC_REGS+2*REGSZ(a0)
+ REG_L s2, SC_REGS+3*REGSZ(a0)
+ REG_L s3, SC_REGS+4*REGSZ(a0)
+ REG_L s4, SC_REGS+5*REGSZ(a0)
+ REG_L s5, SC_REGS+6*REGSZ(a0)
+ REG_L s6, SC_REGS+7*REGSZ(a0)
+ REG_L s7, SC_REGS+8*REGSZ(a0)
+ REG_L s8, SC_REGS+9*REGSZ(a0)
+ REG_L gp, SC_REGS+10*REGSZ(a0)
+ REG_L sp, SC_REGS+11*REGSZ(a0)
+
+ lw v0, SC_FPSR(a0)
+ ctc1 v0, $31
+#ifdef __LP64__
+ # callee-saved fp regs on mips n64 ABI are $f24..$f31
+ l.d $f24, SC_FPREGS+0*REGSZ_FP(a0)
+ l.d $f25, SC_FPREGS+1*REGSZ_FP(a0)
+ l.d $f26, SC_FPREGS+2*REGSZ_FP(a0)
+ l.d $f27, SC_FPREGS+3*REGSZ_FP(a0)
+ l.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
+ l.d $f29, SC_FPREGS+5*REGSZ_FP(a0)
+ l.d $f30, SC_FPREGS+6*REGSZ_FP(a0)
+ l.d $f31, SC_FPREGS+7*REGSZ_FP(a0)
+#else
+ # callee-saved fp regs on mips o32 ABI are
+ # the even-numbered fp regs $f20,$f22,...$f30
+ l.d $f20, SC_FPREGS+0*REGSZ_FP(a0)
+ l.d $f22, SC_FPREGS+1*REGSZ_FP(a0)
+ l.d $f24, SC_FPREGS+2*REGSZ_FP(a0)
+ l.d $f26, SC_FPREGS+3*REGSZ_FP(a0)
+ l.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
+ l.d $f30, SC_FPREGS+5*REGSZ_FP(a0)
+#endif
+ bne a1, zero, 1f
+ li a1, 1 # never return 0!
+1:
+ move v0, a1
+ j ra
botch:
jal longjmperror
jal abort
RESTORE_GP64
PTR_ADDU sp, FRAMESZ
-END(setjmp)
-
-
-LEAF(longjmp, FRAMESZ)
- PTR_SUBU sp, FRAMESZ
- SETUP_GP64(GPOFF, longjmp)
- SAVE_GP(GPOFF)
- .set reorder
- sw a1, A1OFF(sp)
- sw a0, A0OFF(sp)
-
- lw a0, SC_MASK(a0)
- jal sigsetmask
-
- lw a0, A0OFF(sp)
- lw a1, A1OFF(sp)
-
- .set noreorder
- REG_L v0, SC_REGS+ZERO*REGSZ(a0)
- bne v0, 0xACEDBADE, botch # jump if error
- REG_L ra, SC_PC(a0)
- REG_L s0, SC_REGS+S0*REGSZ(a0)
- REG_L s1, SC_REGS+S1*REGSZ(a0)
- REG_L s2, SC_REGS+S2*REGSZ(a0)
- REG_L s3, SC_REGS+S3*REGSZ(a0)
- REG_L s4, SC_REGS+S4*REGSZ(a0)
- REG_L s5, SC_REGS+S5*REGSZ(a0)
- REG_L s6, SC_REGS+S6*REGSZ(a0)
- REG_L s7, SC_REGS+S7*REGSZ(a0)
- REG_L s8, SC_REGS+S8*REGSZ(a0)
- REG_L gp, SC_REGS+GP*REGSZ(a0)
- REG_L sp, SC_REGS+SP*REGSZ(a0)
-
-#if !defined(SOFTFLOAT)
- REG_L v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
- ctc1 v0, $31
- l.d $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
- l.d $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
- l.d $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
- l.d $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
- l.d $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
- l.d $f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
-#if _MIPS_FPSET == 32
- l.d $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
- l.d $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
- l.d $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
- l.d $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
- l.d $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
- l.d $f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
-#endif
-#endif /* !SOFTFLOAT */
- bne a1, zero, 1f
- nop
- li a1, 1 # never return 0!
-1:
- j ra
- move v0, a1
-
END(longjmp)
diff --git a/libc/arch-mips64/bionic/sigsetjmp.S b/libc/arch-mips64/bionic/sigsetjmp.S
index 9d2e5ea..3ef0a6f 100644
--- a/libc/arch-mips64/bionic/sigsetjmp.S
+++ b/libc/arch-mips64/bionic/sigsetjmp.S
@@ -32,7 +32,6 @@
*/
#include <private/bionic_asm.h>
-#include <machine/regnum.h>
#include <machine/setjmp.h>
/*
@@ -46,7 +45,7 @@
PTR_SUBU sp, FRAMESZ
SETUP_GP64(GPOFF, sigsetjmp)
.set reorder
- REG_S a1, (_JBLEN*REGSZ)(a0) # save "savemask"
+ sw a1, _JBLEN*REGSZ(a0) # save "savemask"
bne a1, 0x0, 1f # do saving of signal mask?
LA t9, _setjmp
RESTORE_GP64
@@ -63,7 +62,7 @@
PTR_SUBU sp, FRAMESZ
SETUP_GP64(GPOFF, siglongjmp)
.set reorder
- REG_L t0, (_JBLEN*REGSZ)(a0) # get "savemask"
+ lw t0, _JBLEN*REGSZ(a0) # get "savemask"
bne t0, 0x0, 1f # restore signal mask?
LA t9, _longjmp
RESTORE_GP64
diff --git a/libc/arch-mips64/include/machine/regnum.h b/libc/arch-mips64/include/machine/regnum.h
deleted file mode 100644
index bfe1280..0000000
--- a/libc/arch-mips64/include/machine/regnum.h
+++ /dev/null
@@ -1,119 +0,0 @@
-/* $OpenBSD: regnum.h,v 1.3 2004/08/10 20:28:13 deraadt Exp $ */
-
-/*
- * Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#ifndef _MIPS64_REGNUM_H_
-#define _MIPS64_REGNUM_H_
-
-/*
- * Location of the saved registers relative to ZERO.
- * Usage is p->p_regs[XX].
- */
-#define ZERO 0
-#define AST 1
-#define V0 2
-#define V1 3
-#define A0 4
-#define A1 5
-#define A2 6
-#define A3 7
-#define T0 8
-#define T1 9
-#define T2 10
-#define T3 11
-#define T4 12
-#define T5 13
-#define T6 14
-#define T7 15
-#define S0 16
-#define S1 17
-#define S2 18
-#define S3 19
-#define S4 20
-#define S5 21
-#define S6 22
-#define S7 23
-#define T8 24
-#define T9 25
-#define K0 26
-#define K1 27
-#define GP 28
-#define SP 29
-#define S8 30
-#define RA 31
-#define SR 32
-#define PS SR /* alias for SR */
-#define MULLO 33
-#define MULHI 34
-#define BADVADDR 35
-#define CAUSE 36
-#define PC 37
-#define IC 38
-#define CPL 39
-
-#define NUMSAVEREGS 40 /* Number of registers saved in trap */
-
-#define FPBASE NUMSAVEREGS
-#define F0 (FPBASE+0)
-#define F1 (FPBASE+1)
-#define F2 (FPBASE+2)
-#define F3 (FPBASE+3)
-#define F4 (FPBASE+4)
-#define F5 (FPBASE+5)
-#define F6 (FPBASE+6)
-#define F7 (FPBASE+7)
-#define F8 (FPBASE+8)
-#define F9 (FPBASE+9)
-#define F10 (FPBASE+10)
-#define F11 (FPBASE+11)
-#define F12 (FPBASE+12)
-#define F13 (FPBASE+13)
-#define F14 (FPBASE+14)
-#define F15 (FPBASE+15)
-#define F16 (FPBASE+16)
-#define F17 (FPBASE+17)
-#define F18 (FPBASE+18)
-#define F19 (FPBASE+19)
-#define F20 (FPBASE+20)
-#define F21 (FPBASE+21)
-#define F22 (FPBASE+22)
-#define F23 (FPBASE+23)
-#define F24 (FPBASE+24)
-#define F25 (FPBASE+25)
-#define F26 (FPBASE+26)
-#define F27 (FPBASE+27)
-#define F28 (FPBASE+28)
-#define F29 (FPBASE+29)
-#define F30 (FPBASE+30)
-#define F31 (FPBASE+31)
-#define FSR (FPBASE+32)
-
-#define NUMFPREGS 33
-
-#define NREGS (NUMSAVEREGS + NUMFPREGS)
-
-#endif /* !_MIPS64_REGNUM_H_ */
diff --git a/libc/arch-mips64/include/machine/setjmp.h b/libc/arch-mips64/include/machine/setjmp.h
index 55ba7be..a9707dc 100644
--- a/libc/arch-mips64/include/machine/setjmp.h
+++ b/libc/arch-mips64/include/machine/setjmp.h
@@ -5,6 +5,10 @@
#ifndef _MIPS_SETJMP_H_
#define _MIPS_SETJMP_H_
-#define _JBLEN 157 /* size, in longs, of a jmp_buf */
+#ifdef __LP64__
+#define _JBLEN 22 /* size, in 8-byte longs, of a mips64 jmp_buf */
+#else
+#define _JBLEN 29 /* size, in 4-byte longs, of a mips32 jmp_buf */
+#endif
#endif /* !_MIPS_SETJMP_H_ */
diff --git a/libc/arch-mips64/include/machine/signal.h b/libc/arch-mips64/include/machine/signal.h
index b31715c..b9c1367 100644
--- a/libc/arch-mips64/include/machine/signal.h
+++ b/libc/arch-mips64/include/machine/signal.h
@@ -37,15 +37,42 @@
#ifndef _MIPS_SIGNAL_H_
#define _MIPS_SIGNAL_H_
-#define SC_REGMASK (0*REGSZ)
-#define SC_STATUS (1*REGSZ)
-#define SC_PC (2*REGSZ)
-#define SC_REGS (SC_PC+8)
-#define SC_FPREGS (SC_REGS+32*8)
-#define SC_ACX (SC_FPREGS+32*REGSZ_FP)
-#define SC_USED_MATH (SC_ACX+3*REGSZ)
-/* OpenBSD compatibility */
-#define SC_MASK SC_REGMASK
-#define SC_FPUSED SC_USED_MATH
+/* On Mips32, jmpbuf begins with optional 4-byte filler so that
+ * all saved FP regs are aligned on 8-byte boundary, despite this whole
+ * struct being mis-declared to users as an array of (4-byte) longs.
+ * All the following offsets are then from the rounded-up base addr
+ */
+
+/* Fields of same size on all MIPS abis: */
+#define SC_MAGIC (0*4) /* 4 bytes, identify jmpbuf */
+#define SC_MASK (1*4) /* 4 bytes, saved signal mask */
+#define SC_FPSR (2*4) /* 4 bytes, floating point control/status reg */
+/* filler2 (3*4) 4 bytes, pad to 8-byte boundary */
+
+/* Registers that are 4-byte on mips32 o32, and 8-byte on mips64 n64 abi */
+#define SC_REGS_SAVED 12 /* ra,gp,sp,s0-s8 */
+#define SC_REGS (4*4) /* SC_REGS_SAVED*REGSZ bytes */
+
+/* Floating pt registers are 8-bytes on all abis,
+ * but the number of saved fp regs varies for o32/n32 versus n64 abis:
+ */
+
+#ifdef __LP64__
+#define SC_FPREGS_SAVED 8 /* all fp regs f24,f25,f26,f27,f28,f29,f30,f31 */
+#else
+#define SC_FPREGS_SAVED 6 /* even fp regs f20,f22,f24,f26,f28,f30 */
+#endif
+
+#define SC_FPREGS (SC_REGS + SC_REGS_SAVED*REGSZ) /* SC_FPREGS_SAVED*REGSZ_FP bytes */
+
+#define SC_BYTES (SC_FPREGS + SC_FPREGS_SAVED*REGSZ_FP)
+#define SC_LONGS (SC_BYTES/REGSZ)
+
+#ifdef __LP64__
+/* SC_LONGS is 22, so _JBLEN should be 22 or larger */
+#else
+/* SC_LONGS is 28, but must also allocate dynamic-roundup filler.
+ so _JBLEN should be 29 or larger */
+#endif
#endif /* !_MIPS_SIGNAL_H_ */
diff --git a/libc/bionic/clock_getcpuclockid.cpp b/libc/bionic/clock_getcpuclockid.cpp
new file mode 100644
index 0000000..5511eb4
--- /dev/null
+++ b/libc/bionic/clock_getcpuclockid.cpp
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2014 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <errno.h>
+#include <time.h>
+
+#include "private/ErrnoRestorer.h"
+
+int clock_getcpuclockid(pid_t pid, clockid_t* clockid) {
+ ErrnoRestorer errno_restorer;
+
+ // The tid is stored in the top bits, but negated.
+ clockid_t result = ~static_cast<clockid_t>(pid) << 3;
+ // Bits 0 and 1: clock type (0 = CPUCLOCK_PROF, 1 = CPUCLOCK_VIRT, 2 = CPUCLOCK_SCHED).
+ result |= 2;
+ // Bit 2: thread (set) or process (clear). Bit 2 already 0.
+
+ timespec ts;
+ if (clock_getres(result, &ts) == -1) {
+ return ESRCH;
+ }
+
+ *clockid = result;
+ return 0;
+}
diff --git a/libc/bionic/pthread_atfork.cpp b/libc/bionic/pthread_atfork.cpp
index 82e2b59..d1c4ad0 100644
--- a/libc/bionic/pthread_atfork.cpp
+++ b/libc/bionic/pthread_atfork.cpp
@@ -44,7 +44,7 @@
atfork_t* last;
};
-static pthread_mutex_t g_atfork_list_mutex = PTHREAD_RECURSIVE_MUTEX_INITIALIZER;
+static pthread_mutex_t g_atfork_list_mutex = PTHREAD_RECURSIVE_MUTEX_INITIALIZER_NP;
static atfork_list_t g_atfork_list = { NULL, NULL };
void __bionic_atfork_run_prepare() {
@@ -73,7 +73,7 @@
}
}
- g_atfork_list_mutex = PTHREAD_RECURSIVE_MUTEX_INITIALIZER;
+ g_atfork_list_mutex = PTHREAD_RECURSIVE_MUTEX_INITIALIZER_NP;
}
void __bionic_atfork_run_parent() {
diff --git a/libc/dns/net/getaddrinfo.c b/libc/dns/net/getaddrinfo.c
index 132a090..1ebd222 100644
--- a/libc/dns/net/getaddrinfo.c
+++ b/libc/dns/net/getaddrinfo.c
@@ -463,6 +463,15 @@
// Send the request.
proxy = fdopen(sock, "r+");
+ if (proxy == NULL) {
+ // Failed to map sock to FILE*. Check errno for the cause.
+ // @sonymobile.com saw failures in automated testing, but
+ // couldn't reproduce it for debugging.
+ // Fail with EAI_SYSTEM and let callers handle the failure.
+ close(sock);
+ return EAI_SYSTEM;
+ }
+
if (fprintf(proxy, "getaddrinfo %s %s %d %d %d %d %u",
hostname == NULL ? "^" : hostname,
servname == NULL ? "^" : servname,
diff --git a/libc/include/android/dlext.h b/libc/include/android/dlext.h
index f27e4e5..90daf30 100644
--- a/libc/include/android/dlext.h
+++ b/libc/include/android/dlext.h
@@ -18,7 +18,9 @@
#define __ANDROID_DLEXT_H__
#include <stddef.h>
+#include <stdint.h>
#include <sys/cdefs.h>
+#include <sys/types.h> /* for off64_t */
__BEGIN_DECLS
diff --git a/libc/include/fts.h b/libc/include/fts.h
index da26a88..cde0349 100644
--- a/libc/include/fts.h
+++ b/libc/include/fts.h
@@ -35,6 +35,8 @@
#ifndef _FTS_H_
#define _FTS_H_
+#include <sys/types.h>
+
typedef struct {
struct _ftsent *fts_cur; /* current node */
struct _ftsent *fts_child; /* linked list of children */
@@ -111,8 +113,6 @@
char fts_name[1]; /* file name */
} FTSENT;
-#include <sys/cdefs.h>
-
__BEGIN_DECLS
FTSENT *fts_children(FTS *, int);
int fts_close(FTS *);
diff --git a/libc/include/machine/posix_limits.h b/libc/include/machine/posix_limits.h
index e5a299b..939a1de 100644
--- a/libc/include/machine/posix_limits.h
+++ b/libc/include/machine/posix_limits.h
@@ -41,7 +41,7 @@
#define _POSIX_CHILD_MAX 25
#define _POSIX_CHOWN_RESTRICTED 1 /* yes, chown requires appropriate privileges */
#define _POSIX_CLOCK_SELECTION 200809L
-#define _POSIX_CPUTIME -1 /* clock_getcpuclockid() not implemented */
+#define _POSIX_CPUTIME 200809L
#define _POSIX_DELAYTIMER_MAX 32
#define _POSIX_FSYNC 200809L /* fdatasync() supported */
#define _POSIX_HOST_NAME_MAX 255
diff --git a/libc/include/pthread.h b/libc/include/pthread.h
index 24dba1b..2178789 100644
--- a/libc/include/pthread.h
+++ b/libc/include/pthread.h
@@ -53,9 +53,13 @@
#define __PTHREAD_RECURSIVE_MUTEX_INIT_VALUE 0x4000
#define __PTHREAD_ERRORCHECK_MUTEX_INIT_VALUE 0x8000
-#define PTHREAD_MUTEX_INITIALIZER {__PTHREAD_MUTEX_INIT_VALUE __RESERVED_INITIALIZER}
-#define PTHREAD_RECURSIVE_MUTEX_INITIALIZER {__PTHREAD_RECURSIVE_MUTEX_INIT_VALUE __RESERVED_INITIALIZER}
-#define PTHREAD_ERRORCHECK_MUTEX_INITIALIZER {__PTHREAD_ERRORCHECK_MUTEX_INIT_VALUE __RESERVED_INITIALIZER}
+#define PTHREAD_MUTEX_INITIALIZER {__PTHREAD_MUTEX_INIT_VALUE __RESERVED_INITIALIZER}
+#define PTHREAD_ERRORCHECK_MUTEX_INITIALIZER_NP {__PTHREAD_ERRORCHECK_MUTEX_INIT_VALUE __RESERVED_INITIALIZER}
+#define PTHREAD_RECURSIVE_MUTEX_INITIALIZER_NP {__PTHREAD_RECURSIVE_MUTEX_INIT_VALUE __RESERVED_INITIALIZER}
+
+/* TODO: remove this namespace pollution. */
+#define PTHREAD_ERRORCHECK_MUTEX_INITIALIZER PTHREAD_ERRORCHECK_MUTEX_INITIALIZER_NP
+#define PTHREAD_RECURSIVE_MUTEX_INITIALIZER PTHREAD_RECURSIVE_MUTEX_INITIALIZER_NP
enum {
PTHREAD_MUTEX_NORMAL = 0,
diff --git a/libc/include/sys/user.h b/libc/include/sys/user.h
index 0e36825..b370add 100644
--- a/libc/include/sys/user.h
+++ b/libc/include/sys/user.h
@@ -31,6 +31,7 @@
#include <sys/cdefs.h>
#include <limits.h> /* For PAGE_SIZE. */
+#include <stddef.h> /* For size_t. */
__BEGIN_DECLS
diff --git a/libc/include/time.h b/libc/include/time.h
index e34eb34..1b0f6a1 100644
--- a/libc/include/time.h
+++ b/libc/include/time.h
@@ -85,6 +85,8 @@
extern clock_t clock(void) __LIBC_ABI_PUBLIC__;
+extern int clock_getcpuclockid(pid_t, clockid_t*) __LIBC_ABI_PUBLIC__;
+
extern int clock_getres(clockid_t, struct timespec*) __LIBC_ABI_PUBLIC__;
extern int clock_gettime(clockid_t, struct timespec*) __LIBC_ABI_PUBLIC__;
extern int clock_nanosleep(clockid_t, int, const struct timespec*, struct timespec*) __LIBC_ABI_PUBLIC__;
diff --git a/libc/arch-x86_64/include/machine/fpu.h b/libm/include/amd64/machine/fpu.h
similarity index 100%
rename from libc/arch-x86_64/include/machine/fpu.h
rename to libm/include/amd64/machine/fpu.h
diff --git a/linker/dlfcn.cpp b/linker/dlfcn.cpp
index 6aa9cd7..7ef94c0 100644
--- a/linker/dlfcn.cpp
+++ b/linker/dlfcn.cpp
@@ -29,7 +29,7 @@
/* This file hijacks the symbols stubbed out in libdl.so. */
-static pthread_mutex_t g_dl_mutex = PTHREAD_RECURSIVE_MUTEX_INITIALIZER;
+static pthread_mutex_t g_dl_mutex = PTHREAD_RECURSIVE_MUTEX_INITIALIZER_NP;
static const char* __bionic_set_dlerror(char* new_value) {
char** dlerror_slot = &reinterpret_cast<char**>(__get_tls())[TLS_SLOT_DLERROR];
diff --git a/linker/linker.cpp b/linker/linker.cpp
index f2b3d8b..fcd4824 100644
--- a/linker/linker.cpp
+++ b/linker/linker.cpp
@@ -2419,6 +2419,8 @@
case DT_VERSYM:
case DT_VERDEF:
case DT_VERDEFNUM:
+ case DT_VERNEED:
+ case DT_VERNEEDNUM:
break;
default:
diff --git a/tests/Android.mk b/tests/Android.mk
index 92d7976..4c4ee13 100644
--- a/tests/Android.mk
+++ b/tests/Android.mk
@@ -76,6 +76,7 @@
sched_test.cpp \
search_test.cpp \
semaphore_test.cpp \
+ setjmp_test.cpp \
signal_test.cpp \
stack_protector_test.cpp \
stack_unwinding_test.cpp \
diff --git a/tests/setjmp_test.cpp b/tests/setjmp_test.cpp
new file mode 100644
index 0000000..2df0135
--- /dev/null
+++ b/tests/setjmp_test.cpp
@@ -0,0 +1,155 @@
+/*
+ * Copyright (C) 2014 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <gtest/gtest.h>
+
+#include <setjmp.h>
+#include <stdlib.h>
+
+TEST(setjmp, setjmp_smoke) {
+ int value;
+ jmp_buf jb;
+ if ((value = setjmp(jb)) == 0) {
+ longjmp(jb, 123);
+ FAIL(); // Unreachable.
+ } else {
+ ASSERT_EQ(123, value);
+ }
+}
+
+TEST(setjmp, _setjmp_smoke) {
+ int value;
+ jmp_buf jb;
+ if ((value = _setjmp(jb)) == 0) {
+ _longjmp(jb, 456);
+ FAIL(); // Unreachable.
+ } else {
+ ASSERT_EQ(456, value);
+ }
+}
+
+TEST(setjmp, sigsetjmp_0_smoke) {
+ int value;
+ sigjmp_buf jb;
+ if ((value = sigsetjmp(jb, 0)) == 0) {
+ siglongjmp(jb, 789);
+ FAIL(); // Unreachable.
+ } else {
+ ASSERT_EQ(789, value);
+ }
+}
+
+TEST(setjmp, sigsetjmp_1_smoke) {
+ int value;
+ sigjmp_buf jb;
+ if ((value = sigsetjmp(jb, 0)) == 0) {
+ siglongjmp(jb, 0xabc);
+ FAIL(); // Unreachable.
+ } else {
+ ASSERT_EQ(0xabc, value);
+ }
+}
+
+static sigset_t SigSetOf(int signal) {
+ sigset_t ss;
+ sigemptyset(&ss);
+ sigaddset(&ss, signal);
+ return ss;
+}
+
+TEST(setjmp, _setjmp_signal_mask) {
+ // _setjmp/_longjmp do not save/restore the signal mask.
+ sigset_t ss1(SigSetOf(SIGUSR1));
+ sigset_t ss2(SigSetOf(SIGUSR2));
+ sigset_t original_set;
+ sigprocmask(SIG_SETMASK, &ss1, &original_set);
+ jmp_buf jb;
+ if (_setjmp(jb) == 0) {
+ sigprocmask(SIG_SETMASK, &ss2, NULL);
+ _longjmp(jb, 1);
+ FAIL(); // Unreachable.
+ } else {
+ sigset_t ss;
+ sigprocmask(SIG_SETMASK, NULL, &ss);
+ EXPECT_TRUE(sigismember(&ss, SIGUSR2));
+ }
+ sigprocmask(SIG_SETMASK, &original_set, NULL);
+}
+
+TEST(setjmp, setjmp_signal_mask) {
+ // setjmp/longjmp do save/restore the signal mask on bionic, but not on glibc.
+ // This is a BSD versus System V historical accident. POSIX leaves the
+ // behavior unspecified, so any code that cares needs to use sigsetjmp.
+ sigset_t ss1(SigSetOf(SIGUSR1));
+ sigset_t ss2(SigSetOf(SIGUSR2));
+ sigset_t original_set;
+ sigprocmask(SIG_SETMASK, &ss1, &original_set);
+ jmp_buf jb;
+ if (setjmp(jb) == 0) {
+ sigprocmask(SIG_SETMASK, &ss2, NULL);
+ longjmp(jb, 1);
+ FAIL(); // Unreachable.
+ } else {
+ sigset_t ss;
+ sigprocmask(SIG_SETMASK, NULL, &ss);
+#if defined(__BIONIC__)
+ // bionic behaves like BSD and does save/restore the signal mask.
+ EXPECT_TRUE(sigismember(&ss, SIGUSR1));
+#else
+ // glibc behaves like System V and doesn't save/restore the signal mask.
+ EXPECT_TRUE(sigismember(&ss, SIGUSR2));
+#endif
+ }
+ sigprocmask(SIG_SETMASK, &original_set, NULL);
+}
+
+TEST(setjmp, sigsetjmp_0_signal_mask) {
+ // sigsetjmp(0)/siglongjmp do not save/restore the signal mask.
+ sigset_t ss1(SigSetOf(SIGUSR1));
+ sigset_t ss2(SigSetOf(SIGUSR2));
+ sigset_t original_set;
+ sigprocmask(SIG_SETMASK, &ss1, &original_set);
+ sigjmp_buf sjb;
+ if (sigsetjmp(sjb, 0) == 0) {
+ sigprocmask(SIG_SETMASK, &ss2, NULL);
+ siglongjmp(sjb, 1);
+ FAIL(); // Unreachable.
+ } else {
+ sigset_t ss;
+ sigprocmask(SIG_SETMASK, NULL, &ss);
+ EXPECT_TRUE(sigismember(&ss, SIGUSR2));
+ }
+ sigprocmask(SIG_SETMASK, &original_set, NULL);
+}
+
+TEST(setjmp, sigsetjmp_1_signal_mask) {
+ // sigsetjmp(1)/siglongjmp does save/restore the signal mask.
+ sigset_t ss1(SigSetOf(SIGUSR1));
+ sigset_t ss2(SigSetOf(SIGUSR2));
+ sigset_t original_set;
+ sigprocmask(SIG_SETMASK, &ss1, &original_set);
+ sigjmp_buf sjb;
+ if (sigsetjmp(sjb, 1) == 0) {
+ sigprocmask(SIG_SETMASK, &ss2, NULL);
+ siglongjmp(sjb, 1);
+ FAIL(); // Unreachable.
+ } else {
+ sigset_t ss;
+ sigprocmask(SIG_SETMASK, NULL, &ss);
+ EXPECT_TRUE(sigismember(&ss, SIGUSR1));
+ }
+ sigprocmask(SIG_SETMASK, &original_set, NULL);
+}
diff --git a/tests/stack_unwinding_test.cpp b/tests/stack_unwinding_test.cpp
index 3fc45c5..3d3f22d 100644
--- a/tests/stack_unwinding_test.cpp
+++ b/tests/stack_unwinding_test.cpp
@@ -73,6 +73,7 @@
ASSERT_EQ(count + 1, deeper_count);
}
+static volatile bool signal_handler_run = false;
static int killer_count = 0;
static int handler_count = 0;
static int handler_one_deeper_count = 0;
@@ -83,6 +84,7 @@
handler_one_deeper_count = unwind_one_frame_deeper();
ASSERT_EQ(handler_count + 1, handler_one_deeper_count);
+ signal_handler_run = true;
}
TEST(stack_unwinding, unwind_through_signal_frame) {
@@ -90,8 +92,9 @@
ScopedSignalHandler ssh(SIGUSR1, UnwindSignalHandler);
_Unwind_Backtrace(FrameCounter, &killer_count);
-
+ signal_handler_run = false;
ASSERT_EQ(0, kill(getpid(), SIGUSR1));
+ while (!signal_handler_run) {}
}
// On LP32, the SA_SIGINFO flag gets you __restore_rt instead of __restore.
@@ -100,6 +103,7 @@
ScopedSignalHandler ssh(SIGUSR1, UnwindSignalHandler, SA_SIGINFO);
_Unwind_Backtrace(FrameCounter, &killer_count);
-
+ signal_handler_run = false;
ASSERT_EQ(0, kill(getpid(), SIGUSR1));
+ while (!signal_handler_run) {}
}
diff --git a/tests/time_test.cpp b/tests/time_test.cpp
index e0231b1..691d8ff 100644
--- a/tests/time_test.cpp
+++ b/tests/time_test.cpp
@@ -23,6 +23,7 @@
#include <sys/syscall.h>
#include <sys/types.h>
#include <sys/wait.h>
+#include <unistd.h>
#include "ScopedSignalHandler.h"
@@ -458,6 +459,34 @@
ASSERT_LT(t1 - t0, CLOCKS_PER_SEC / 1000);
}
+pid_t GetInvalidPid() {
+ FILE* fp = fopen("/proc/sys/kernel/pid_max", "r");
+ long pid_max;
+ fscanf(fp, "%ld", &pid_max);
+ pid_t invalid_pid = static_cast<pid_t>(pid_max + 1);
+ fclose(fp);
+ return invalid_pid;
+}
+
+TEST(time, clock_getcpuclockid) {
+ // For current process.
+ clockid_t clockid;
+ ASSERT_EQ(0, clock_getcpuclockid(getpid(), &clockid));
+
+ timespec ts;
+ ASSERT_EQ(0, clock_gettime(clockid, &ts));
+
+ // For parent process.
+ ASSERT_EQ(0, clock_getcpuclockid(getppid(), &clockid));
+ ASSERT_EQ(0, clock_gettime(clockid, &ts));
+
+ // For invalid process.
+ // We can't use -1 for invalid pid here, because clock_getcpuclockid() can't detect it.
+ errno = 0;
+ ASSERT_EQ(ESRCH, clock_getcpuclockid(GetInvalidPid(), &clockid));
+ ASSERT_EQ(0, errno);
+}
+
TEST(time, clock_settime) {
errno = 0;
timespec ts;
diff --git a/tests/unistd_test.cpp b/tests/unistd_test.cpp
index f0aeb09..34b7bf3 100644
--- a/tests/unistd_test.cpp
+++ b/tests/unistd_test.cpp
@@ -529,6 +529,7 @@
EXPECT_GT(_POSIX_CHILD_MAX, 0);
EXPECT_NE(_POSIX_CHOWN_RESTRICTED, -1);
EXPECT_EQ(_POSIX_VERSION, _POSIX_CLOCK_SELECTION);
+ EXPECT_EQ(_POSIX_VERSION, _POSIX_CPUTIME);
EXPECT_GT(_POSIX_DELAYTIMER_MAX, 0);
EXPECT_EQ(_POSIX_VERSION, _POSIX_FSYNC);
EXPECT_GT(_POSIX_HOST_NAME_MAX, 0);
@@ -614,7 +615,6 @@
EXPECT_EQ(-1, _POSIX_ADVISORY_INFO);
EXPECT_EQ(-1, _POSIX_ASYNCHRONOUS_IO);
EXPECT_EQ(-1, _POSIX_BARRIERS);
- EXPECT_EQ(-1, _POSIX_CPUTIME);
EXPECT_EQ(-1, _POSIX_MESSAGE_PASSING);
EXPECT_EQ(-1, _POSIX_PRIORITIZED_IO);
EXPECT_EQ(-1, _POSIX_REALTIME_SIGNALS);
@@ -665,6 +665,7 @@
VERIFY_SYSCONF_POSITIVE(_SC_CHILD_MAX);
VERIFY_SYSCONF_POSITIVE(_SC_CLK_TCK);
VERIFY_SYSCONF_POSITIVE(_SC_COLL_WEIGHTS_MAX);
+ VERIFY_SYSCONF_POSIX_VERSION(_SC_CPUTIME);
VERIFY_SYSCONF_POSITIVE(_SC_EXPR_NEST_MAX);
VERIFY_SYSCONF_POSITIVE(_SC_LINE_MAX);
VERIFY_SYSCONF_POSITIVE(_SC_NGROUPS_MAX);
@@ -775,7 +776,6 @@
VERIFY_SYSCONF_NOT_SUPPORT(_SC_ADVISORY_INFO);
VERIFY_SYSCONF_NOT_SUPPORT(_SC_ASYNCHRONOUS_IO);
VERIFY_SYSCONF_NOT_SUPPORT(_SC_BARRIERS);
- VERIFY_SYSCONF_NOT_SUPPORT(_SC_CPUTIME);
VERIFY_SYSCONF_NOT_SUPPORT(_SC_MESSAGE_PASSING);
VERIFY_SYSCONF_NOT_SUPPORT(_SC_PRIORITIZED_IO);
VERIFY_SYSCONF_NOT_SUPPORT(_SC_REALTIME_SIGNALS);