commit 40a8f214a5264efe5feaaffd55cea67fb87d097b
author Yabin Cui <yabinc@google.com> Mon May 18 11:19:11 2015 -0700
committer Yabin Cui <yabinc@google.com> Mon May 18 11:29:20 2015 -0700
tree 50e1b2ab531de2767251244e8545351384b818de
parent a42b5bcd896daa83b479e7964c0fa8cf1abf5a1d

Hide rt_sigqueueinfo.

Bug: 19358804
Change-Id: I38a53ad64c81d0eefdd1d24599e769fd8a477a56

libc/arch-mips64/syscalls/___rt_sigqueueinfo.S

diff --git a/libc/arch-mips64/syscalls/___rt_sigqueueinfo.S b/libc/arch-mips64/syscalls/___rt_sigqueueinfo.S
new file mode 100644
index 0000000..1503f51
--- /dev/null
+++ b/libc/arch-mips64/syscalls/___rt_sigqueueinfo.S
@@ -0,0 +1,26 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <private/bionic_asm.h>
+
+ENTRY(___rt_sigqueueinfo)
+    .set push
+    .set noreorder
+    li v0, __NR_rt_sigqueueinfo
+    syscall
+    bnez a3, 1f
+    move a0, v0
+    j ra
+    nop
+1:
+    move t0, ra
+    bal     2f
+    nop
+2:
+    .cpsetup ra, t1, 2b
+    LA t9,__set_errno_internal
+    .cpreturn
+    j t9
+    move ra, t0
+    .set pop
+END(___rt_sigqueueinfo)
+.hidden ___rt_sigqueueinfo