[MIPS64] libc/libm support

libc/libm support for MIPS64 targets

Change-Id: I8271941d418612a286be55495f0e95822f90004f
Signed-off-by: Chris Dearman <chris.dearman@imgtec.com>
Signed-off-by: Raghu Gandham <raghu.gandham@imgtec.com>
diff --git a/libc/arch-mips64/bionic/memcmp16.S b/libc/arch-mips64/bionic/memcmp16.S
new file mode 100644
index 0000000..b70c078
--- /dev/null
+++ b/libc/arch-mips64/bionic/memcmp16.S
@@ -0,0 +1,53 @@
+/*
+ * Copyright (C) 2008 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+	.text
+
+#include <machine/asm.h>
+
+/*
+ * u4 __memcmp16(const u2* s0, const u2* s1, size_t count);
+ */
+LEAF(__memcmp16,0)
+	move	t0,$0
+	move	t1,$0
+	beqz	a2,.L_done		/* 0 length string */
+	beq	a0,a1,.L_done		/* strings are identical */
+
+	/* Unoptimised... */
+1:	lhu	t0,0(a0)
+	lhu	t1,0(a1)
+	PTR_ADDU a1,2
+	bne	t0,t1,.L_done
+	PTR_ADDU a0,2
+	SUBU	a2,1
+	bnez	a2,1b
+
+.L_done:
+	SUBU	v0,t0,t1
+	j	ra
+	END(__memcmp16)