Unify our assembler macros.
Our <machine/asm.h> files were modified from upstream, to the extent
that no architecture was actually using the upstream ENTRY or END macros,
assuming that architecture even had such a macro upstream. This patch moves
everyone to the same macros, with just a few tweaks remaining in the
<machine/asm.h> files, which no one should now use directly.
I've removed most of the unused cruft from the <machine/asm.h> files, though
there's still rather a lot in the mips/mips64 ones.
Bug: 12229603
Change-Id: I2fff287dc571ac1087abe9070362fb9420d85d6d
diff --git a/libc/arch-mips/bionic/setjmp.S b/libc/arch-mips/bionic/setjmp.S
index 7c21195..2af1fbd 100644
--- a/libc/arch-mips/bionic/setjmp.S
+++ b/libc/arch-mips/bionic/setjmp.S
@@ -29,7 +29,7 @@
*
*/
-#include <machine/asm.h>
+#include <private/bionic_asm.h>
#include <machine/regnum.h>
#include <machine/signal.h>
@@ -49,13 +49,13 @@
swc1 FPR, OFF(BASE) ; \
mfhc1 t0, FPR ; \
sw t0, OFF+4(BASE) ;
-
+
#define FPREG64_L(FPR, OFF, BASE) \
lw t0, OFF+4(BASE) ; \
lw t1, OFF(BASE) ; \
mtc1 t1, FPR ; \
mthc1 t0, FPR ; \
-
+
NON_LEAF(setjmp, FRAMESZ, ra)
.mask 0x80000000, RAOFF
PTR_SUBU sp, FRAMESZ # allocate stack frame
@@ -154,7 +154,7 @@
lw a0, A0OFF(sp)
lw a1, A1OFF(sp)
- .set noreorder
+ .set noreorder
REG_L v0, SC_REGS+ZERO*REGSZ(a0)
bne v0, 0xACEDBADE, botch # jump if error
REG_L ra, SC_PC(a0)
@@ -169,9 +169,9 @@
REG_L s8, SC_REGS+S8*REGSZ(a0)
REG_L gp, SC_REGS+GP*REGSZ(a0)
REG_L sp, SC_REGS+SP*REGSZ(a0)
-
+
#if !defined(SOFTFLOAT)
- REG_L v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
+ REG_L v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
ctc1 v0, $31
#if _MIPS_FPSET == 32
FPREG64_L($f20, SC_FPREGS+((F20-F0)*REGSZ_FP), a0)