Unify our assembler macros.

Our <machine/asm.h> files were modified from upstream, to the extent
that no architecture was actually using the upstream ENTRY or END macros,
assuming that architecture even had such a macro upstream. This patch moves
everyone to the same macros, with just a few tweaks remaining in the
<machine/asm.h> files, which no one should now use directly.

I've removed most of the unused cruft from the <machine/asm.h> files, though
there's still rather a lot in the mips/mips64 ones.

Bug: 12229603
Change-Id: I2fff287dc571ac1087abe9070362fb9420d85d6d
diff --git a/libc/arch-mips64/bionic/__bionic_clone.S b/libc/arch-mips64/bionic/__bionic_clone.S
index 2a9a2b0..e1ade30 100644
--- a/libc/arch-mips64/bionic/__bionic_clone.S
+++ b/libc/arch-mips64/bionic/__bionic_clone.S
@@ -26,8 +26,7 @@
  * SUCH DAMAGE.
  */
 
-#include <machine/asm.h>
-#include <asm/unistd.h>
+#include <private/bionic_asm.h>
 #include <linux/errno.h>
 #include <linux/sched.h>
 
@@ -43,8 +42,7 @@
 #endif
 
 // pid_t __bionic_clone(int flags, void* child_stack, pid_t* parent_tid, void* tls, pid_t* child_tid, int (*fn)(void*), void* arg);
-	.text
-LEAF(__bionic_clone,FRAMESZ)
+LEAF(__bionic_clone, FRAMESZ)
 	PTR_SUBU sp, FRAMESZ			# allocate stack frame
 	SETUP_GP64(FRAME_GP,__bionic_clone)
 	SAVE_GP(FRAME_GP)
diff --git a/libc/arch-mips64/bionic/__get_sp.S b/libc/arch-mips64/bionic/__get_sp.S
index 834c89d..8488102 100644
--- a/libc/arch-mips64/bionic/__get_sp.S
+++ b/libc/arch-mips64/bionic/__get_sp.S
@@ -25,15 +25,10 @@
  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  */
-	.text
 
-/* void *__get_sp(void) */
+#include <private/bionic_asm.h>
 
-	.type	__get_sp, @function
-	.global	__get_sp
-	.align	4
-	.ent	__get_sp
-__get_sp:
-	move	$v0, $sp
-	j	$ra
-	.end	__get_sp
+ENTRY(__get_sp)
+  move v0, sp
+  j ra
+END(__get_sp)
diff --git a/libc/arch-mips64/bionic/_exit_with_stack_teardown.S b/libc/arch-mips64/bionic/_exit_with_stack_teardown.S
index 8f624c3..3b537eb 100644
--- a/libc/arch-mips64/bionic/_exit_with_stack_teardown.S
+++ b/libc/arch-mips64/bionic/_exit_with_stack_teardown.S
@@ -26,23 +26,16 @@
  * SUCH DAMAGE.
  */
 
-#include <asm/unistd.h>
-
-	.text
+#include <private/bionic_asm.h>
 
 // void _exit_with_stack_teardown(void* stackBase, size_t stackSize)
+ENTRY(_exit_with_stack_teardown)
+  li	v0, __NR_munmap
+  syscall
+  // If munmap failed, we ignore the failure and exit anyway.
 
-	.type	_exit_with_stack_teardown, @function
-	.global	_exit_with_stack_teardown
-	.align	4
-	.ent	_exit_with_stack_teardown
-_exit_with_stack_teardown:
-	li	$v0, __NR_munmap
-	syscall
-	// If munmap failed, we ignore the failure and exit anyway.
-
-	li	$a0, 0
-	li	$v0, __NR_exit
-	syscall
-        // The exit syscall does not return.
-	.end	_exit_with_stack_teardown
+  li	a0, 0
+  li	v0, __NR_exit
+  syscall
+  // The exit syscall does not return.
+END(_exit_with_stack_teardown)
diff --git a/libc/arch-mips64/bionic/_setjmp.S b/libc/arch-mips64/bionic/_setjmp.S
index e7083ae..4465cd2 100644
--- a/libc/arch-mips64/bionic/_setjmp.S
+++ b/libc/arch-mips64/bionic/_setjmp.S
@@ -2,7 +2,7 @@
 
 /*
  * Copyright (c) 2002 Opsycon AB  (www.opsycon.se / www.opsycon.com)
- * 
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
@@ -29,7 +29,7 @@
  *
  */
 
-#include <machine/asm.h>
+#include <private/bionic_asm.h>
 #include <machine/regnum.h>
 #include <machine/signal.h>
 
@@ -48,13 +48,13 @@
         swc1    FPR, OFF(BASE)  ;       \
         mfhc1   t0, FPR         ;       \
         sw      t0, OFF+4(BASE) ;
-        
+
 #define FPREG64_L(FPR, OFF, BASE)       \
         lw      t0, OFF+4(BASE) ;       \
         lw      t1, OFF(BASE)   ;       \
         mtc1    t1, FPR         ;       \
         mthc1   t0, FPR         ;       \
-        
+
 LEAF(_setjmp, FRAMESZ)
 	PTR_SUBU sp, FRAMESZ
 	SETUP_GP64(GPOFF, _setjmp)
@@ -185,4 +185,3 @@
 	RESTORE_GP64
 	PTR_ADDU sp, FRAMESZ
 END(_longjmp)
-
diff --git a/libc/arch-mips64/bionic/bzero.S b/libc/arch-mips64/bionic/bzero.S
index d0b5c84..76c6bc2 100644
--- a/libc/arch-mips64/bionic/bzero.S
+++ b/libc/arch-mips64/bionic/bzero.S
@@ -25,9 +25,8 @@
  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  */
-	.text
 
-#include <machine/asm.h>
+#include <private/bionic_asm.h>
 
 /*
  * void bzero(void *s, size_t n);
@@ -40,4 +39,3 @@
 	RESTORE_GP64
 	j	t9
 END(bzero)
-
diff --git a/libc/arch-mips64/bionic/memcmp16.S b/libc/arch-mips64/bionic/memcmp16.S
index b70c078..1c58c1b 100644
--- a/libc/arch-mips64/bionic/memcmp16.S
+++ b/libc/arch-mips64/bionic/memcmp16.S
@@ -27,7 +27,7 @@
  */
 	.text
 
-#include <machine/asm.h>
+#include <private/bionic_asm.h>
 
 /*
  * u4 __memcmp16(const u2* s0, const u2* s1, size_t count);
diff --git a/libc/arch-mips64/bionic/setjmp.S b/libc/arch-mips64/bionic/setjmp.S
index 7c21195..2af1fbd 100644
--- a/libc/arch-mips64/bionic/setjmp.S
+++ b/libc/arch-mips64/bionic/setjmp.S
@@ -29,7 +29,7 @@
  *
  */
 
-#include <machine/asm.h>
+#include <private/bionic_asm.h>
 #include <machine/regnum.h>
 #include <machine/signal.h>
 
@@ -49,13 +49,13 @@
         swc1    FPR, OFF(BASE)  ;       \
         mfhc1   t0, FPR         ;       \
         sw      t0, OFF+4(BASE) ;
-        
+
 #define FPREG64_L(FPR, OFF, BASE)       \
         lw      t0, OFF+4(BASE) ;       \
         lw      t1, OFF(BASE)   ;       \
         mtc1    t1, FPR         ;       \
         mthc1   t0, FPR         ;       \
-        
+
 NON_LEAF(setjmp, FRAMESZ, ra)
 	.mask	0x80000000, RAOFF
 	PTR_SUBU sp, FRAMESZ			# allocate stack frame
@@ -154,7 +154,7 @@
 	lw	a0, A0OFF(sp)
 	lw	a1, A1OFF(sp)
 
-	.set	noreorder	
+	.set	noreorder
 	REG_L	v0, SC_REGS+ZERO*REGSZ(a0)
 	bne	v0, 0xACEDBADE, botch		# jump if error
 	REG_L	ra, SC_PC(a0)
@@ -169,9 +169,9 @@
 	REG_L	s8, SC_REGS+S8*REGSZ(a0)
 	REG_L	gp, SC_REGS+GP*REGSZ(a0)
 	REG_L	sp, SC_REGS+SP*REGSZ(a0)
-	
+
 #if !defined(SOFTFLOAT)
-	REG_L	v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)	
+	REG_L	v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
 	ctc1	v0, $31
 #if _MIPS_FPSET == 32
         FPREG64_L($f20, SC_FPREGS+((F20-F0)*REGSZ_FP), a0)
diff --git a/libc/arch-mips64/bionic/sigsetjmp.S b/libc/arch-mips64/bionic/sigsetjmp.S
index b05454c..9d2e5ea 100644
--- a/libc/arch-mips64/bionic/sigsetjmp.S
+++ b/libc/arch-mips64/bionic/sigsetjmp.S
@@ -31,7 +31,7 @@
  * SUCH DAMAGE.
  */
 
-#include <machine/asm.h>
+#include <private/bionic_asm.h>
 #include <machine/regnum.h>
 #include <machine/setjmp.h>
 
diff --git a/libc/arch-mips64/bionic/syscall.S b/libc/arch-mips64/bionic/syscall.S
index 08aa705..c4fd009 100644
--- a/libc/arch-mips64/bionic/syscall.S
+++ b/libc/arch-mips64/bionic/syscall.S
@@ -26,8 +26,7 @@
  * SUCH DAMAGE.
  */
 
-#include <machine/asm.h>
-#include <asm/unistd.h>
+#include <private/bionic_asm.h>
 
 #if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
 FRAMESZ		=	MKFSIZ(6,0)
diff --git a/libc/arch-mips64/bionic/vfork.S b/libc/arch-mips64/bionic/vfork.S
index c936945..911a264 100644
--- a/libc/arch-mips64/bionic/vfork.S
+++ b/libc/arch-mips64/bionic/vfork.S
@@ -26,8 +26,7 @@
  * SUCH DAMAGE.
  */
 
-#include <machine/asm.h>
-#include <asm/unistd.h>
+#include <private/bionic_asm.h>
 #include <linux/sched.h>
 
 // TODO: mips' uapi signal.h is missing #ifndef __ASSEMBLY__.
@@ -46,7 +45,7 @@
 #if FRAMESZ!=0
 	PTR_SUBU sp, FRAMESZ
 #endif
-	SETUP_GP64(a5,vfork)
+	SETUP_GP64(a5, vfork)
 	LI	a0, (CLONE_VM | CLONE_VFORK | SIGCHLD)
 	move	a1, $0
 	move	a2, $0
diff --git a/libc/arch-mips64/include/machine/asm.h b/libc/arch-mips64/include/machine/asm.h
index eabb1bf..5eacde3 100644
--- a/libc/arch-mips64/include/machine/asm.h
+++ b/libc/arch-mips64/include/machine/asm.h
@@ -28,25 +28,24 @@
 #ifndef _MIPS64_ASM_H
 #define _MIPS64_ASM_H
 
-#include <machine/regdef.h>
-
-#ifdef NEED_OLD_RM7KFIX
-#define ITLBNOPFIX      nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;
-#else
-#define ITLBNOPFIX      nop;nop;nop;nop
+#ifndef _ALIGN_TEXT
+# define _ALIGN_TEXT .align 4
 #endif
 
+#undef __bionic_asm_custom_entry
+#undef __bionic_asm_custom_end
+#define __bionic_asm_custom_entry(f) .ent f
+#define __bionic_asm_custom_end(f) .end f
+
+#include <machine/regdef.h>
+
 #define	_MIPS_ISA_MIPS1	1	/* R2000/R3000 */
 #define	_MIPS_ISA_MIPS2	2	/* R4000/R6000 */
 #define	_MIPS_ISA_MIPS3	3	/* R4000 */
 #define	_MIPS_ISA_MIPS4	4	/* TFP (R1x000) */
-#ifdef __linux__
 #define	_MIPS_ISA_MIPS5 5
 #define	_MIPS_ISA_MIPS32 6
 #define	_MIPS_ISA_MIPS64 7
-#else
-#define	_MIPS_ISA_MIPS32 32	/* MIPS32 */
-#endif
 
 #if !defined(ABICALLS) && !defined(_NO_ABICALLS)
 #define	ABICALLS	.abicalls
@@ -56,8 +55,6 @@
 	ABICALLS
 #endif
 
-#define _C_LABEL(x) x		/* XXX Obsolete but keep for a while */
-
 #if !defined(__MIPSEL__) && !defined(__MIPSEB__)
 #error "__MIPSEL__ or __MIPSEB__ must be defined"
 #endif
@@ -90,15 +87,6 @@
  */
 #if defined(ABICALLS) && !defined(_KERNEL) && !defined(_STANDALONE)
 
-#ifndef _MIPS_SIM
-#define _MIPS_SIM 1
-#define _ABIO32	1
-#endif
-#ifndef _MIPS_ISA
-#define _MIPS_ISA 2
-#define _MIPS_ISA_MIPS2 2
-#endif
-
 #if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
 #define NARGSAVE	4
 
@@ -190,28 +178,6 @@
 #endif
 
 /*
- * Define -pg profile entry code.
- */
-#if defined(XGPROF) || defined(XPROF)
-#define	MCOUNT			\
-	PTR_SUBU sp, sp, 64;	\
-	SAVE_GP(16);		\
-	sd	ra, 56(sp);	\
-	sd	gp, 48(sp);	\
-	.set	noat;		\
-	.set	noreorder;	\
-	move	AT, ra;		\
-	jal	_mcount;	\
-	PTR_SUBU sp, sp, 16;	\
-	ld	ra, 56(sp);	\
-	PTR_ADDU sp, sp, 64;	\
-	.set reorder;		\
-	.set	at;
-#else
-#define	MCOUNT
-#endif
-
-/*
  * LEAF(x, fsize)
  *
  *	Declare a leaf routine.
@@ -221,26 +187,9 @@
 	.globl x;		\
 	.ent x, 0;		\
 x: ;				\
+	.cfi_startproc; \
 	.frame sp, fsize, ra;	\
 	SETUP_GP		\
-	MCOUNT
-
-#define	ALEAF(x)		\
-	.globl	x;		\
-x:
-
-/*
- * NLEAF(x)
- *
- *	Declare a non-profiled leaf routine.
- */
-#define NLEAF(x, fsize)		\
-	.align	3;		\
-	.globl x;		\
-	.ent x, 0;		\
-x: ;				\
-	.frame sp, fsize, ra;	\
-	SETUP_GP
 
 /*
  * NON_LEAF(x)
@@ -252,54 +201,8 @@
 	.globl x;		\
 	.ent x, 0;		\
 x: ;				\
+	.cfi_startproc; \
 	.frame sp, fsize, retpc; \
 	SETUP_GP		\
-	MCOUNT
-
-/*
- * NNON_LEAF(x)
- *
- *	Declare a non-profiled non-leaf routine
- *	(a routine that makes other C calls).
- */
-#define NNON_LEAF(x, fsize, retpc) \
-	.align	3;		\
-	.globl x;		\
-	.ent x, 0;		\
-x: ;				\
-	.frame sp, fsize, retpc	\
-	SETUP_GP
-
-/*
- * END(x)
- *
- *	Mark end of a procedure.
- */
-#define END(x) \
-	.end x
-
-/*
- * Macros to panic and printf from assembly language.
- */
-#define PANIC(msg) \
-	LA	a0, 9f; \
-	jal	panic;	\
-	nop	;	\
-	MSG(msg)
-
-#define	PRINTF(msg) \
-	LA	a0, 9f; \
-	jal	printf; \
-	nop	;	\
-	MSG(msg)
-
-#define	MSG(msg) \
-	.rdata; \
-9:	.asciiz	msg; \
-	.text
-
-#define ASMSTR(str) \
-	.asciiz str; \
-	.align	3
 
 #endif /* !_MIPS_ASM_H */
diff --git a/libc/arch-mips64/include/machine/signal.h b/libc/arch-mips64/include/machine/signal.h
index f02ec0d..b31715c 100644
--- a/libc/arch-mips64/include/machine/signal.h
+++ b/libc/arch-mips64/include/machine/signal.h
@@ -37,8 +37,6 @@
 #ifndef _MIPS_SIGNAL_H_
 #define _MIPS_SIGNAL_H_
 
-#include <machine/asm.h>
-
 #define	SC_REGMASK	(0*REGSZ)
 #define	SC_STATUS	(1*REGSZ)
 #define	SC_PC		(2*REGSZ)
diff --git a/libc/arch-mips64/string/memcpy.S b/libc/arch-mips64/string/memcpy.S
index aabdfcf..dc91096 100644
--- a/libc/arch-mips64/string/memcpy.S
+++ b/libc/arch-mips64/string/memcpy.S
@@ -39,13 +39,13 @@
  *  Include files
  ************************************************************************/
 
-#include "machine/asm.h"
+#include <private/bionic_asm.h>
 
 
-/* 
+/*
  * This routine could be optimized for MIPS64. The current code only
  * uses MIPS32 instructions.
- */	
+ */
 #if defined(__MIPSEB__)
 #  define LWHI	lwl		/* high part is left in big-endian	*/
 #  define SWHI	swl		/* high part is left in big-endian	*/
diff --git a/libc/arch-mips64/string/memset.S b/libc/arch-mips64/string/memset.S
index a1c5055..3e630ca 100644
--- a/libc/arch-mips64/string/memset.S
+++ b/libc/arch-mips64/string/memset.S
@@ -39,12 +39,12 @@
  *  Include files
  ************************************************************************/
 
-#include "machine/asm.h"
+#include <private/bionic_asm.h>
 
-/* 
+/*
  * This routine could be optimized for MIPS64. The current code only
  * uses MIPS32 instructions.
- */	
+ */
 
 #if defined(__MIPSEB__)
 #  define SWHI	swl		/* high part is left in big-endian	*/
@@ -220,7 +220,7 @@
 	sw	a1,-36(a0)
 	nop
 	nop			# the extra nop instructions help to balance
-	nop			# cycles needed for "store" + "fill" + "evict" 
+	nop			# cycles needed for "store" + "fill" + "evict"
 	nop			# For 64byte store there are needed 8 fill
 	nop			# and 8 evict cycles, i.e. at least 32 instr.
 	nop
@@ -320,4 +320,3 @@
 /************************************************************************
  *  Implementation : Static functions
  ************************************************************************/
-