[MIPS] Add CONFIG_32BIT to kernel_default_arch_macros for MIPS.
Some of the required structure definitons are defined under this macro.

Change-Id: I7a9a986e371381697dcb56bd8ea362856ffa7509
diff --git a/libc/kernel/arch-mips/asm/processor.h b/libc/kernel/arch-mips/asm/processor.h
index 3563121..fe9ee76 100644
--- a/libc/kernel/arch-mips/asm/processor.h
+++ b/libc/kernel/arch-mips/asm/processor.h
@@ -29,61 +29,65 @@
 #include <asm/prefetch.h>
 #include <asm/system.h>
 #define current_text_addr() ({ __label__ _l; _l: &&_l;})
-#define NUM_FPU_REGS 32
+#define TASK_SIZE 0x7fff8000UL
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define STACK_TOP TASK_SIZE
+#define TASK_UNMAPPED_BASE ((TASK_SIZE / 3) & ~(PAGE_SIZE))
+#define NUM_FPU_REGS 32
 typedef __u64 fpureg_t;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct mips_fpu_struct {
  fpureg_t fpr[NUM_FPU_REGS];
  unsigned int fcr31;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define NUM_DSP_REGS 6
 typedef __u32 dspreg_t;
 struct mips_dsp_state {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  dspreg_t dspr[NUM_DSP_REGS];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  unsigned int dspcontrol;
 };
 #define INIT_CPUMASK {   {0,}  }
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 typedef struct {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  unsigned long seg;
 } mm_segment_t;
 #define ARCH_MIN_TASKALIGN 8
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct mips_abi;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct thread_struct {
  unsigned long reg16;
  unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  unsigned long reg29, reg30, reg31;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  unsigned long cp0_status;
  struct mips_fpu_struct fpu;
  struct mips_dsp_state dsp;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  unsigned long cp0_badvaddr;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  unsigned long cp0_baduaddr;
  unsigned long error_code;
  unsigned long trap_no;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  unsigned long irix_trampoline;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  unsigned long irix_oldctx;
  struct mips_abi *abi;
 };
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define FPAFF_INIT
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define INIT_THREAD {       .reg16 = 0,   .reg17 = 0,   .reg18 = 0,   .reg19 = 0,   .reg20 = 0,   .reg21 = 0,   .reg22 = 0,   .reg23 = 0,   .reg29 = 0,   .reg30 = 0,   .reg31 = 0,       .cp0_status = 0,       .fpu = {   .fpr = {0,},   .fcr31 = 0,   },       FPAFF_INIT       .dsp = {   .dspr = {0, },   .dspcontrol = 0,   },       .cp0_badvaddr = 0,   .cp0_baduaddr = 0,   .error_code = 0,   .trap_no = 0,   .irix_trampoline = 0,   .irix_oldctx = 0,  }
 struct task_struct;
 #define release_thread(thread) do { } while(0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define prepare_to_copy(tsk) do { } while (0)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define __KSTK_TOS(tsk) ((unsigned long)task_stack_page(tsk) + THREAD_SIZE - 32)
 #define task_pt_regs(tsk) ((struct pt_regs *)__KSTK_TOS(tsk) - 1)
 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->cp0_epc)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[29])
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define KSTK_STATUS(tsk) (task_pt_regs(tsk)->cp0_status)
 #define cpu_relax() barrier()
 #define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);})
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #endif
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */