Clean up some ARMv4/ARMv5 cruft.

Change-Id: I29e836fea4b53901e29f96c6888869c35f6726be
diff --git a/libc/arch-arm/generic/bionic/memcpy.S b/libc/arch-arm/generic/bionic/memcpy.S
index 87ebc44..699b88d 100644
--- a/libc/arch-arm/generic/bionic/memcpy.S
+++ b/libc/arch-arm/generic/bionic/memcpy.S
@@ -57,9 +57,9 @@
 
         // preload the destination because we'll align it to a cache line
         // with small writes. Also start the source "pump".
-        PLD         (r0, #0)
-        PLD         (r1, #0)
-        PLD         (r1, #32)
+        pld         [r0, #0]
+        pld         [r1, #0]
+        pld         [r1, #32]
 
         /* it simplifies things to take care of len<4 early */
         cmp         r2, #4
@@ -147,7 +147,7 @@
         add         r12, r12, #64
 
 1:      ldmia       r1!, { r4-r11 }
-        PLD         (r12, #64)
+        pld         [r12, #64]
         subs        r2, r2, #32
 
         // NOTE: if r12 is more than 64 ahead of r1, the following ldrhi
@@ -268,7 +268,7 @@
         ldr         r12, [r1], #4
 1:      mov         r4, r12
         ldmia       r1!, {   r5,r6,r7,  r8,r9,r10,r11}
-        PLD         (r1, #64)
+        pld         [r1, #64]
         subs        r2, r2, #32
         ldrhs       r12, [r1], #4
         orr         r3, r3, r4,     lsl #16
@@ -295,7 +295,7 @@
         ldr         r12, [r1], #4
 1:      mov         r4, r12
         ldmia       r1!, {   r5,r6,r7,  r8,r9,r10,r11}
-        PLD         (r1, #64)
+        pld         [r1, #64]
         subs        r2, r2, #32
         ldrhs       r12, [r1], #4
         orr         r3, r3, r4,     lsl #24
@@ -322,7 +322,7 @@
         ldr         r12, [r1], #4
 1:      mov         r4, r12
         ldmia       r1!, {   r5,r6,r7,  r8,r9,r10,r11}
-        PLD         (r1, #64)
+        pld         [r1, #64]
         subs        r2, r2, #32
         ldrhs       r12, [r1], #4
         orr         r3, r3, r4,     lsl #8
diff --git a/libc/arch-arm/generic/bionic/strcmp.S b/libc/arch-arm/generic/bionic/strcmp.S
index 764a531..42d41d1 100644
--- a/libc/arch-arm/generic/bionic/strcmp.S
+++ b/libc/arch-arm/generic/bionic/strcmp.S
@@ -52,8 +52,8 @@
 #define magic2(REG) REG, lsl #7
 
 ENTRY(strcmp)
-	PLD(r0, #0)
-	PLD(r1, #0)
+	pld	[r0, #0]
+	pld	[r1, #0]
 	eor	r2, r0, r1
 	tst	r2, #3
 
@@ -88,8 +88,8 @@
 	orr	r4, r4, r4, lsl #16
 	.p2align	2
 4:
-	PLD(r0, #8)
-	PLD(r1, #8)
+	pld	[r0, #8]
+	pld	[r1, #8]
 	sub	r2, ip, magic1(r4)
 	cmp	ip, r3
 	itttt	eq
diff --git a/libc/arch-arm/generic/bionic/strcpy.S b/libc/arch-arm/generic/bionic/strcpy.S
index 21dafda..cc997f4 100644
--- a/libc/arch-arm/generic/bionic/strcpy.S
+++ b/libc/arch-arm/generic/bionic/strcpy.S
@@ -33,7 +33,7 @@
 #include <machine/asm.h>
 
 ENTRY(strcpy)
-	PLD(r1, #0)
+	pld	[r1, #0]
 	eor	r2, r0, r1
 	mov	ip, r0
 	tst	r2, #3
@@ -62,7 +62,7 @@
 	  load stalls.  */
 	.p2align 2
 2:
-	PLD(r1, #8)
+	pld	[r1, #8]
 	ldr	r4, [r1], #4
 	sub	r2, r3, r5
 	bics	r2, r2, r3
diff --git a/libc/arch-arm/generic/bionic/strlen.c b/libc/arch-arm/generic/bionic/strlen.c
index 824cf78..811e1e0 100644
--- a/libc/arch-arm/generic/bionic/strlen.c
+++ b/libc/arch-arm/generic/bionic/strlen.c
@@ -63,9 +63,7 @@
         "ldr     %[v], [%[s]], #4           \n"
         "sub     %[l], %[l], %[s]           \n"
         "0:                                 \n"
-#if __ARM_HAVE_PLD
         "pld     [%[s], #64]                \n"
-#endif
         "sub     %[t], %[v], %[mask], lsr #7\n"
         "and     %[t], %[t], %[mask]        \n"
         "bics    %[t], %[t], %[v]           \n"